ath: Convert ath_print to ath_dbg

Remove ath/debug.h and the includes of these files.
Coalesce long formats.
Correct a few misspellings and missing "\n"s from these logging messages.
Remove unnecessary trailing space before a newline.
Remove ARRAY_SIZE casts, use printf type %zu

Signed-off-by: Joe Perches <joe@perches.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>

1 files changed, 41 insertions, 42 deletions

diff --git a/drivers/net/wireless/ath/ath9k/hw.c b/drivers/net/wireless/ath/ath9k/hw.c
index 00ecbfa07df5..9d3be0392a9b 100644
--- a/drivers/net/wireless/ath/ath9k/hw.c
+++ b/drivers/net/wireless/ath/ath9k/hw.c
@@ -129,9 +129,9 @@ bool ath9k_hw_wait(struct ath_hw *ah, u32 reg, u32 mask, u32 val, u32 timeout)
                 udelay(AH_TIME_QUANTUM);
         }
 
-        ath_print(ath9k_hw_common(ah), ATH_DBG_ANY,
-                  "timeout (%d us) on reg 0x%x: 0x%08x & 0x%08x != 0x%08x\n",
-                  timeout, reg, REG_READ(ah, reg), mask, val);
+        ath_dbg(ath9k_hw_common(ah), ATH_DBG_ANY,
+                "timeout (%d us) on reg 0x%x: 0x%08x & 0x%08x != 0x%08x\n",
+                timeout, reg, REG_READ(ah, reg), mask, val);
 
         return false;
 }
@@ -465,10 +465,10 @@ static int ath9k_hw_post_init(struct ath_hw *ah)
         if (ecode != 0)
                 return ecode;
 
-        ath_print(ath9k_hw_common(ah), ATH_DBG_CONFIG,
-                  "Eeprom VER: %d, REV: %d\n",
-                  ah->eep_ops->get_eeprom_ver(ah),
-                  ah->eep_ops->get_eeprom_rev(ah));
+        ath_dbg(ath9k_hw_common(ah), ATH_DBG_CONFIG,
+                "Eeprom VER: %d, REV: %d\n",
+                ah->eep_ops->get_eeprom_ver(ah),
+                ah->eep_ops->get_eeprom_rev(ah));
 
         ecode = ath9k_hw_rf_alloc_ext_banks(ah);
         if (ecode) {
@@ -530,7 +530,7 @@ static int __ath9k_hw_init(struct ath_hw *ah)
                 }
         }
 
-        ath_print(common, ATH_DBG_RESET, "serialize_regmode is %d\n",
+        ath_dbg(common, ATH_DBG_RESET, "serialize_regmode is %d\n",
                 ah->config.serialize_regmode);
 
         if (AR_SREV_9285(ah) || AR_SREV_9271(ah))
@@ -758,8 +758,8 @@ static void ath9k_hw_set_cts_timeout(struct ath_hw *ah, u32 us)
 static bool ath9k_hw_set_global_txtimeout(struct ath_hw *ah, u32 tu)
 {
         if (tu > 0xFFFF) {
-                ath_print(ath9k_hw_common(ah), ATH_DBG_XMIT,
-                          "bad global tx timeout %u\n", tu);
+                ath_dbg(ath9k_hw_common(ah), ATH_DBG_XMIT,
+                        "bad global tx timeout %u\n", tu);
                 ah->globaltxtimeout = (u32) -1;
                 return false;
         } else {
@@ -776,8 +776,8 @@ void ath9k_hw_init_global_settings(struct ath_hw *ah)
         int slottime;
         int sifstime;
 
-        ath_print(ath9k_hw_common(ah), ATH_DBG_RESET, "ah->misc_mode 0x%x\n",
-                  ah->misc_mode);
+        ath_dbg(ath9k_hw_common(ah), ATH_DBG_RESET, "ah->misc_mode 0x%x\n",
+                ah->misc_mode);
 
         if (ah->misc_mode != 0)
                 REG_WRITE(ah, AR_PCU_MISC,
@@ -1020,8 +1020,8 @@ static bool ath9k_hw_set_reset(struct ath_hw *ah, int type)
 
         REG_WRITE(ah, AR_RTC_RC, 0);
         if (!ath9k_hw_wait(ah, AR_RTC_RC, AR_RTC_RC_M, 0, AH_WAIT_TIMEOUT)) {
-                ath_print(ath9k_hw_common(ah), ATH_DBG_RESET,
-                          "RTC stuck in MAC reset\n");
+                ath_dbg(ath9k_hw_common(ah), ATH_DBG_RESET,
+                        "RTC stuck in MAC reset\n");
                 return false;
         }
 
@@ -1067,8 +1067,8 @@ static bool ath9k_hw_set_reset_power_on(struct ath_hw *ah)
                            AR_RTC_STATUS_M,
                            AR_RTC_STATUS_ON,
                            AH_WAIT_TIMEOUT)) {
-                ath_print(ath9k_hw_common(ah), ATH_DBG_RESET,
-                          "RTC not waking up\n");
+                ath_dbg(ath9k_hw_common(ah), ATH_DBG_RESET,
+                        "RTC not waking up\n");
                 return false;
         }
 
@@ -1128,9 +1128,8 @@ static bool ath9k_hw_channel_change(struct ath_hw *ah,
 
         for (qnum = 0; qnum < AR_NUM_QCU; qnum++) {
                 if (ath9k_hw_numtxpending(ah, qnum)) {
-                        ath_print(common, ATH_DBG_QUEUE,
-                                  "Transmit frames pending on "
-                                  "queue %d\n", qnum);
+                        ath_dbg(common, ATH_DBG_QUEUE,
+                                "Transmit frames pending on queue %d\n", qnum);
                         return false;
                 }
         }
@@ -1211,7 +1210,7 @@ int ath9k_hw_reset(struct ath_hw *ah, struct ath9k_channel *chan,
         if (!ah->chip_fullsleep) {
                 ath9k_hw_abortpcurecv(ah);
                 if (!ath9k_hw_stopdmarecv(ah)) {
-                        ath_print(common, ATH_DBG_XMIT,
+                        ath_dbg(common, ATH_DBG_XMIT,
                                 "Failed to stop receive dma\n");
                         bChannelChange = false;
                 }
@@ -1423,13 +1422,13 @@ int ath9k_hw_reset(struct ath_hw *ah, struct ath9k_channel *chan,
                 u32 mask;
                 mask = REG_READ(ah, AR_CFG);
                 if (mask & (AR_CFG_SWRB | AR_CFG_SWTB | AR_CFG_SWRG)) {
-                        ath_print(common, ATH_DBG_RESET,
+                        ath_dbg(common, ATH_DBG_RESET,
                                 "CFG Byte Swap Set 0x%x\n", mask);
                 } else {
                         mask =
                                 INIT_CONFIG_STATUS | AR_CFG_SWRB | AR_CFG_SWTB;
                         REG_WRITE(ah, AR_CFG, mask);
-                        ath_print(common, ATH_DBG_RESET,
+                        ath_dbg(common, ATH_DBG_RESET,
                                 "Setting CFG 0x%x\n", REG_READ(ah, AR_CFG));
                 }
         } else {
@@ -1583,8 +1582,8 @@ bool ath9k_hw_setpower(struct ath_hw *ah, enum ath9k_power_mode mode)
         if (ah->power_mode == mode)
                 return status;
 
-        ath_print(common, ATH_DBG_RESET, "%s -> %s\n",
-                  modes[ah->power_mode], modes[mode]);
+        ath_dbg(common, ATH_DBG_RESET, "%s -> %s\n",
+                modes[ah->power_mode], modes[mode]);
 
         switch (mode) {
         case ATH9K_PM_AWAKE:
@@ -1657,9 +1656,9 @@ void ath9k_hw_beaconinit(struct ath_hw *ah, u32 next_beacon, u32 beacon_period)
                         flags |= AR_TBTT_TIMER_EN;
                         break;
                 }
-                ath_print(ath9k_hw_common(ah), ATH_DBG_BEACON,
-                          "%s: unsupported opmode: %d\n",
-                          __func__, ah->opmode);
+                ath_dbg(ath9k_hw_common(ah), ATH_DBG_BEACON,
+                        "%s: unsupported opmode: %d\n",
+                        __func__, ah->opmode);
                 return;
                 break;
         }
@@ -1715,10 +1714,10 @@ void ath9k_hw_set_sta_beacon_timers(struct ath_hw *ah,
         else
                 nextTbtt = bs->bs_nexttbtt;
 
-        ath_print(common, ATH_DBG_BEACON, "next DTIM %d\n", bs->bs_nextdtim);
-        ath_print(common, ATH_DBG_BEACON, "next beacon %d\n", nextTbtt);
-        ath_print(common, ATH_DBG_BEACON, "beacon period %d\n", beaconintval);
-        ath_print(common, ATH_DBG_BEACON, "DTIM period %d\n", dtimperiod);
+        ath_dbg(common, ATH_DBG_BEACON, "next DTIM %d\n", bs->bs_nextdtim);
+        ath_dbg(common, ATH_DBG_BEACON, "next beacon %d\n", nextTbtt);
+        ath_dbg(common, ATH_DBG_BEACON, "beacon period %d\n", beaconintval);
+        ath_dbg(common, ATH_DBG_BEACON, "DTIM period %d\n", dtimperiod);
 
         ENABLE_REGWRITE_BUFFER(ah);
 
@@ -1783,8 +1782,8 @@ int ath9k_hw_fill_cap_info(struct ath_hw *ah)
                         regulatory->current_rd += 5;
                 else if (regulatory->current_rd == 0x41)
                         regulatory->current_rd = 0x43;
-                ath_print(common, ATH_DBG_REGULATORY,
-                          "regdomain mapped to 0x%x\n", regulatory->current_rd);
+                ath_dbg(common, ATH_DBG_REGULATORY,
+                        "regdomain mapped to 0x%x\n", regulatory->current_rd);
         }
 
         eeval = ah->eep_ops->get_eeprom(ah, EEP_OP_MODE);
@@ -2245,8 +2244,8 @@ void ath9k_hw_reset_tsf(struct ath_hw *ah)
 {
         if (!ath9k_hw_wait(ah, AR_SLP32_MODE, AR_SLP32_TSF_WRITE_STATUS, 0,
                            AH_TSF_WRITE_TIMEOUT))
-                ath_print(ath9k_hw_common(ah), ATH_DBG_RESET,
-                          "AR_SLP32_TSF_WRITE_STATUS limit exceeded\n");
+                ath_dbg(ath9k_hw_common(ah), ATH_DBG_RESET,
+                        "AR_SLP32_TSF_WRITE_STATUS limit exceeded\n");
 
         REG_WRITE(ah, AR_RESET_TSF, AR_RESET_TSF_ONCE);
 }
@@ -2367,9 +2366,9 @@ void ath9k_hw_gen_timer_start(struct ath_hw *ah,
 
         tsf = ath9k_hw_gettsf32(ah);
 
-        ath_print(ath9k_hw_common(ah), ATH_DBG_HWTIMER,
-                  "curent tsf %x period %x"
-                  "timer_next %x\n", tsf, timer_period, timer_next);
+        ath_dbg(ath9k_hw_common(ah), ATH_DBG_HWTIMER,
+                "current tsf %x period %x timer_next %x\n",
+                tsf, timer_period, timer_next);
 
         /*
          * Pull timer_next forward if the current TSF already passed it
@@ -2449,8 +2448,8 @@ void ath_gen_timer_isr(struct ath_hw *ah)
                 index = rightmost_index(timer_table, &thresh_mask);
                 timer = timer_table->timers[index];
                 BUG_ON(!timer);
-                ath_print(common, ATH_DBG_HWTIMER,
-                          "TSF overflow for Gen timer %d\n", index);
+                ath_dbg(common, ATH_DBG_HWTIMER,
+                        "TSF overflow for Gen timer %d\n", index);
                 timer->overflow(timer->arg);
         }
 
@@ -2458,8 +2457,8 @@ void ath_gen_timer_isr(struct ath_hw *ah)
                 index = rightmost_index(timer_table, &trigger_mask);
                 timer = timer_table->timers[index];
                 BUG_ON(!timer);
-                ath_print(common, ATH_DBG_HWTIMER,
-                          "Gen timer[%d] trigger\n", index);
+                ath_dbg(common, ATH_DBG_HWTIMER,
+                        "Gen timer[%d] trigger\n", index);
                 timer->trigger(timer->arg);
         }
 }