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authorDavid S. Miller <davem@davemloft.net>2009-12-04 16:25:15 -0500
committerDavid S. Miller <davem@davemloft.net>2009-12-04 16:25:15 -0500
commit8f56874bd7e8bee73ed6a1cf80dcec2753616262 (patch)
treeaebd15dea662ef5efd89402b8fd92fec540a98eb /drivers/net/wireless/ath/ath9k/hw.c
parent47e1c323069bcef0acb8a2b48921688573f5ca63 (diff)
parent159bcfeb9123c91f0dc885a42b6387a98192f896 (diff)
Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/linville/wireless-next-2.6
Diffstat (limited to 'drivers/net/wireless/ath/ath9k/hw.c')
-rw-r--r--drivers/net/wireless/ath/ath9k/hw.c38
1 files changed, 27 insertions, 11 deletions
diff --git a/drivers/net/wireless/ath/ath9k/hw.c b/drivers/net/wireless/ath/ath9k/hw.c
index 53a7b980d8f6..2ec61f08cfdb 100644
--- a/drivers/net/wireless/ath/ath9k/hw.c
+++ b/drivers/net/wireless/ath/ath9k/hw.c
@@ -148,22 +148,19 @@ bool ath9k_get_channel_edges(struct ath_hw *ah,
148} 148}
149 149
150u16 ath9k_hw_computetxtime(struct ath_hw *ah, 150u16 ath9k_hw_computetxtime(struct ath_hw *ah,
151 const struct ath_rate_table *rates, 151 u8 phy, int kbps,
152 u32 frameLen, u16 rateix, 152 u32 frameLen, u16 rateix,
153 bool shortPreamble) 153 bool shortPreamble)
154{ 154{
155 u32 bitsPerSymbol, numBits, numSymbols, phyTime, txTime; 155 u32 bitsPerSymbol, numBits, numSymbols, phyTime, txTime;
156 u32 kbps;
157
158 kbps = rates->info[rateix].ratekbps;
159 156
160 if (kbps == 0) 157 if (kbps == 0)
161 return 0; 158 return 0;
162 159
163 switch (rates->info[rateix].phy) { 160 switch (phy) {
164 case WLAN_RC_PHY_CCK: 161 case WLAN_RC_PHY_CCK:
165 phyTime = CCK_PREAMBLE_BITS + CCK_PLCP_BITS; 162 phyTime = CCK_PREAMBLE_BITS + CCK_PLCP_BITS;
166 if (shortPreamble && rates->info[rateix].short_preamble) 163 if (shortPreamble)
167 phyTime >>= 1; 164 phyTime >>= 1;
168 numBits = frameLen << 3; 165 numBits = frameLen << 3;
169 txTime = CCK_SIFS_TIME + phyTime + ((numBits * 1000) / kbps); 166 txTime = CCK_SIFS_TIME + phyTime + ((numBits * 1000) / kbps);
@@ -194,8 +191,7 @@ u16 ath9k_hw_computetxtime(struct ath_hw *ah,
194 break; 191 break;
195 default: 192 default:
196 ath_print(ath9k_hw_common(ah), ATH_DBG_FATAL, 193 ath_print(ath9k_hw_common(ah), ATH_DBG_FATAL,
197 "Unknown phy %u (rate ix %u)\n", 194 "Unknown phy %u (rate ix %u)\n", phy, rateix);
198 rates->info[rateix].phy, rateix);
199 txTime = 0; 195 txTime = 0;
200 break; 196 break;
201 } 197 }
@@ -922,6 +918,11 @@ int ath9k_hw_init(struct ath_hw *ah)
922 ath_print(common, ATH_DBG_RESET, "serialize_regmode is %d\n", 918 ath_print(common, ATH_DBG_RESET, "serialize_regmode is %d\n",
923 ah->config.serialize_regmode); 919 ah->config.serialize_regmode);
924 920
921 if (AR_SREV_9285(ah) || AR_SREV_9271(ah))
922 ah->config.max_txtrig_level = MAX_TX_FIFO_THRESHOLD >> 1;
923 else
924 ah->config.max_txtrig_level = MAX_TX_FIFO_THRESHOLD;
925
925 if (!ath9k_hw_macversion_supported(ah->hw_version.macVersion)) { 926 if (!ath9k_hw_macversion_supported(ah->hw_version.macVersion)) {
926 ath_print(common, ATH_DBG_FATAL, 927 ath_print(common, ATH_DBG_FATAL,
927 "Mac Chip Rev 0x%02x.%x is not supported by " 928 "Mac Chip Rev 0x%02x.%x is not supported by "
@@ -975,7 +976,10 @@ int ath9k_hw_init(struct ath_hw *ah)
975 return r; 976 return r;
976 977
977 ath9k_hw_init_mode_gain_regs(ah); 978 ath9k_hw_init_mode_gain_regs(ah);
978 ath9k_hw_fill_cap_info(ah); 979 r = ath9k_hw_fill_cap_info(ah);
980 if (r)
981 return r;
982
979 ath9k_hw_init_11a_eeprom_fix(ah); 983 ath9k_hw_init_11a_eeprom_fix(ah);
980 984
981 r = ath9k_hw_init_macaddr(ah); 985 r = ath9k_hw_init_macaddr(ah);
@@ -3111,7 +3115,7 @@ EXPORT_SYMBOL(ath9k_hw_set_sta_beacon_timers);
3111/* HW Capabilities */ 3115/* HW Capabilities */
3112/*******************/ 3116/*******************/
3113 3117
3114void ath9k_hw_fill_cap_info(struct ath_hw *ah) 3118int ath9k_hw_fill_cap_info(struct ath_hw *ah)
3115{ 3119{
3116 struct ath9k_hw_capabilities *pCap = &ah->caps; 3120 struct ath9k_hw_capabilities *pCap = &ah->caps;
3117 struct ath_regulatory *regulatory = ath9k_hw_regulatory(ah); 3121 struct ath_regulatory *regulatory = ath9k_hw_regulatory(ah);
@@ -3142,6 +3146,12 @@ void ath9k_hw_fill_cap_info(struct ath_hw *ah)
3142 } 3146 }
3143 3147
3144 eeval = ah->eep_ops->get_eeprom(ah, EEP_OP_MODE); 3148 eeval = ah->eep_ops->get_eeprom(ah, EEP_OP_MODE);
3149 if ((eeval & (AR5416_OPFLAGS_11G | AR5416_OPFLAGS_11A)) == 0) {
3150 ath_print(common, ATH_DBG_FATAL,
3151 "no band has been marked as supported in EEPROM.\n");
3152 return -EINVAL;
3153 }
3154
3145 bitmap_zero(pCap->wireless_modes, ATH9K_MODE_MAX); 3155 bitmap_zero(pCap->wireless_modes, ATH9K_MODE_MAX);
3146 3156
3147 if (eeval & AR5416_OPFLAGS_11A) { 3157 if (eeval & AR5416_OPFLAGS_11A) {
@@ -3228,7 +3238,11 @@ void ath9k_hw_fill_cap_info(struct ath_hw *ah)
3228 pCap->keycache_size = AR_KEYTABLE_SIZE; 3238 pCap->keycache_size = AR_KEYTABLE_SIZE;
3229 3239
3230 pCap->hw_caps |= ATH9K_HW_CAP_FASTCC; 3240 pCap->hw_caps |= ATH9K_HW_CAP_FASTCC;
3231 pCap->tx_triglevel_max = MAX_TX_FIFO_THRESHOLD; 3241
3242 if (AR_SREV_9285(ah) || AR_SREV_9271(ah))
3243 pCap->tx_triglevel_max = MAX_TX_FIFO_THRESHOLD >> 1;
3244 else
3245 pCap->tx_triglevel_max = MAX_TX_FIFO_THRESHOLD;
3232 3246
3233 if (AR_SREV_9285_10_OR_LATER(ah)) 3247 if (AR_SREV_9285_10_OR_LATER(ah))
3234 pCap->num_gpio_pins = AR9285_NUM_GPIO; 3248 pCap->num_gpio_pins = AR9285_NUM_GPIO;
@@ -3301,6 +3315,8 @@ void ath9k_hw_fill_cap_info(struct ath_hw *ah)
3301 } else { 3315 } else {
3302 btcoex_hw->scheme = ATH_BTCOEX_CFG_NONE; 3316 btcoex_hw->scheme = ATH_BTCOEX_CFG_NONE;
3303 } 3317 }
3318
3319 return 0;
3304} 3320}
3305 3321
3306bool ath9k_hw_getcapability(struct ath_hw *ah, enum ath9k_capability_type type, 3322bool ath9k_hw_getcapability(struct ath_hw *ah, enum ath9k_capability_type type,