diff options
author | Felix Fietkau <nbd@openwrt.org> | 2010-12-11 18:51:09 -0500 |
---|---|---|
committer | John W. Linville <linville@tuxdriver.com> | 2010-12-13 15:23:31 -0500 |
commit | 115277a3bc0683d04da797268ddafdc3bf67ca33 (patch) | |
tree | 54b802c99b966ddeb912d595148d4868fb3ec24c /drivers/net/wireless/ath/ath9k/eeprom.c | |
parent | 4ddfcd7daf57247ff718b849a152d97a80b7ae4d (diff) |
ath9k_hw: merge ath9k_hw_get_gain_boundaries_pdadcs between eeprom_def.c and eeprom_4k.c
Signed-off-by: Felix Fietkau <nbd@openwrt.org>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/ath/ath9k/eeprom.c')
-rw-r--r-- | drivers/net/wireless/ath/ath9k/eeprom.c | 190 |
1 files changed, 190 insertions, 0 deletions
diff --git a/drivers/net/wireless/ath/ath9k/eeprom.c b/drivers/net/wireless/ath/ath9k/eeprom.c index 3d99b6cdd2cb..d54cfa4e8057 100644 --- a/drivers/net/wireless/ath/ath9k/eeprom.c +++ b/drivers/net/wireless/ath/ath9k/eeprom.c | |||
@@ -279,6 +279,196 @@ void ath9k_hw_update_regulatory_maxpower(struct ath_hw *ah) | |||
279 | } | 279 | } |
280 | } | 280 | } |
281 | 281 | ||
282 | void ath9k_hw_get_gain_boundaries_pdadcs(struct ath_hw *ah, | ||
283 | struct ath9k_channel *chan, | ||
284 | void *pRawDataSet, | ||
285 | u8 *bChans, u16 availPiers, | ||
286 | u16 tPdGainOverlap, | ||
287 | u16 *pPdGainBoundaries, u8 *pPDADCValues, | ||
288 | u16 numXpdGains) | ||
289 | { | ||
290 | int i, j, k; | ||
291 | int16_t ss; | ||
292 | u16 idxL = 0, idxR = 0, numPiers; | ||
293 | static u8 vpdTableL[AR5416_NUM_PD_GAINS] | ||
294 | [AR5416_MAX_PWR_RANGE_IN_HALF_DB]; | ||
295 | static u8 vpdTableR[AR5416_NUM_PD_GAINS] | ||
296 | [AR5416_MAX_PWR_RANGE_IN_HALF_DB]; | ||
297 | static u8 vpdTableI[AR5416_NUM_PD_GAINS] | ||
298 | [AR5416_MAX_PWR_RANGE_IN_HALF_DB]; | ||
299 | |||
300 | u8 *pVpdL, *pVpdR, *pPwrL, *pPwrR; | ||
301 | u8 minPwrT4[AR5416_NUM_PD_GAINS]; | ||
302 | u8 maxPwrT4[AR5416_NUM_PD_GAINS]; | ||
303 | int16_t vpdStep; | ||
304 | int16_t tmpVal; | ||
305 | u16 sizeCurrVpdTable, maxIndex, tgtIndex; | ||
306 | bool match; | ||
307 | int16_t minDelta = 0; | ||
308 | struct chan_centers centers; | ||
309 | int pdgain_boundary_default; | ||
310 | struct cal_data_per_freq *data_def = pRawDataSet; | ||
311 | struct cal_data_per_freq_4k *data_4k = pRawDataSet; | ||
312 | bool eeprom_4k = AR_SREV_9285(ah) || AR_SREV_9271(ah); | ||
313 | |||
314 | memset(&minPwrT4, 0, AR5416_NUM_PD_GAINS); | ||
315 | ath9k_hw_get_channel_centers(ah, chan, ¢ers); | ||
316 | |||
317 | for (numPiers = 0; numPiers < availPiers; numPiers++) { | ||
318 | if (bChans[numPiers] == AR5416_BCHAN_UNUSED) | ||
319 | break; | ||
320 | } | ||
321 | |||
322 | match = ath9k_hw_get_lower_upper_index((u8)FREQ2FBIN(centers.synth_center, | ||
323 | IS_CHAN_2GHZ(chan)), | ||
324 | bChans, numPiers, &idxL, &idxR); | ||
325 | |||
326 | if (match) { | ||
327 | if (eeprom_4k) { | ||
328 | for (i = 0; i < numXpdGains; i++) { | ||
329 | minPwrT4[i] = data_4k[idxL].pwrPdg[i][0]; | ||
330 | maxPwrT4[i] = data_4k[idxL].pwrPdg[i][4]; | ||
331 | ath9k_hw_fill_vpd_table(minPwrT4[i], maxPwrT4[i], | ||
332 | data_4k[idxL].pwrPdg[i], | ||
333 | data_4k[idxL].vpdPdg[i], | ||
334 | AR5416_PD_GAIN_ICEPTS, | ||
335 | vpdTableI[i]); | ||
336 | } | ||
337 | } else { | ||
338 | for (i = 0; i < numXpdGains; i++) { | ||
339 | minPwrT4[i] = data_def[idxL].pwrPdg[i][0]; | ||
340 | maxPwrT4[i] = data_def[idxL].pwrPdg[i][4]; | ||
341 | ath9k_hw_fill_vpd_table(minPwrT4[i], maxPwrT4[i], | ||
342 | data_def[idxL].pwrPdg[i], | ||
343 | data_def[idxL].vpdPdg[i], | ||
344 | AR5416_PD_GAIN_ICEPTS, | ||
345 | vpdTableI[i]); | ||
346 | } | ||
347 | } | ||
348 | } else { | ||
349 | for (i = 0; i < numXpdGains; i++) { | ||
350 | if (eeprom_4k) { | ||
351 | pVpdL = data_4k[idxL].vpdPdg[i]; | ||
352 | pPwrL = data_4k[idxL].pwrPdg[i]; | ||
353 | pVpdR = data_4k[idxR].vpdPdg[i]; | ||
354 | pPwrR = data_4k[idxR].pwrPdg[i]; | ||
355 | } else { | ||
356 | pVpdL = data_def[idxL].vpdPdg[i]; | ||
357 | pPwrL = data_def[idxL].pwrPdg[i]; | ||
358 | pVpdR = data_def[idxR].vpdPdg[i]; | ||
359 | pPwrR = data_def[idxR].pwrPdg[i]; | ||
360 | } | ||
361 | |||
362 | minPwrT4[i] = max(pPwrL[0], pPwrR[0]); | ||
363 | |||
364 | maxPwrT4[i] = | ||
365 | min(pPwrL[AR5416_PD_GAIN_ICEPTS - 1], | ||
366 | pPwrR[AR5416_PD_GAIN_ICEPTS - 1]); | ||
367 | |||
368 | |||
369 | ath9k_hw_fill_vpd_table(minPwrT4[i], maxPwrT4[i], | ||
370 | pPwrL, pVpdL, | ||
371 | AR5416_PD_GAIN_ICEPTS, | ||
372 | vpdTableL[i]); | ||
373 | ath9k_hw_fill_vpd_table(minPwrT4[i], maxPwrT4[i], | ||
374 | pPwrR, pVpdR, | ||
375 | AR5416_PD_GAIN_ICEPTS, | ||
376 | vpdTableR[i]); | ||
377 | |||
378 | for (j = 0; j <= (maxPwrT4[i] - minPwrT4[i]) / 2; j++) { | ||
379 | vpdTableI[i][j] = | ||
380 | (u8)(ath9k_hw_interpolate((u16) | ||
381 | FREQ2FBIN(centers. | ||
382 | synth_center, | ||
383 | IS_CHAN_2GHZ | ||
384 | (chan)), | ||
385 | bChans[idxL], bChans[idxR], | ||
386 | vpdTableL[i][j], vpdTableR[i][j])); | ||
387 | } | ||
388 | } | ||
389 | } | ||
390 | |||
391 | k = 0; | ||
392 | |||
393 | for (i = 0; i < numXpdGains; i++) { | ||
394 | if (i == (numXpdGains - 1)) | ||
395 | pPdGainBoundaries[i] = | ||
396 | (u16)(maxPwrT4[i] / 2); | ||
397 | else | ||
398 | pPdGainBoundaries[i] = | ||
399 | (u16)((maxPwrT4[i] + minPwrT4[i + 1]) / 4); | ||
400 | |||
401 | pPdGainBoundaries[i] = | ||
402 | min((u16)MAX_RATE_POWER, pPdGainBoundaries[i]); | ||
403 | |||
404 | if ((i == 0) && !AR_SREV_5416_20_OR_LATER(ah)) { | ||
405 | minDelta = pPdGainBoundaries[0] - 23; | ||
406 | pPdGainBoundaries[0] = 23; | ||
407 | } else { | ||
408 | minDelta = 0; | ||
409 | } | ||
410 | |||
411 | if (i == 0) { | ||
412 | if (AR_SREV_9280_20_OR_LATER(ah)) | ||
413 | ss = (int16_t)(0 - (minPwrT4[i] / 2)); | ||
414 | else | ||
415 | ss = 0; | ||
416 | } else { | ||
417 | ss = (int16_t)((pPdGainBoundaries[i - 1] - | ||
418 | (minPwrT4[i] / 2)) - | ||
419 | tPdGainOverlap + 1 + minDelta); | ||
420 | } | ||
421 | vpdStep = (int16_t)(vpdTableI[i][1] - vpdTableI[i][0]); | ||
422 | vpdStep = (int16_t)((vpdStep < 1) ? 1 : vpdStep); | ||
423 | |||
424 | while ((ss < 0) && (k < (AR5416_NUM_PDADC_VALUES - 1))) { | ||
425 | tmpVal = (int16_t)(vpdTableI[i][0] + ss * vpdStep); | ||
426 | pPDADCValues[k++] = (u8)((tmpVal < 0) ? 0 : tmpVal); | ||
427 | ss++; | ||
428 | } | ||
429 | |||
430 | sizeCurrVpdTable = (u8) ((maxPwrT4[i] - minPwrT4[i]) / 2 + 1); | ||
431 | tgtIndex = (u8)(pPdGainBoundaries[i] + tPdGainOverlap - | ||
432 | (minPwrT4[i] / 2)); | ||
433 | maxIndex = (tgtIndex < sizeCurrVpdTable) ? | ||
434 | tgtIndex : sizeCurrVpdTable; | ||
435 | |||
436 | while ((ss < maxIndex) && (k < (AR5416_NUM_PDADC_VALUES - 1))) { | ||
437 | pPDADCValues[k++] = vpdTableI[i][ss++]; | ||
438 | } | ||
439 | |||
440 | vpdStep = (int16_t)(vpdTableI[i][sizeCurrVpdTable - 1] - | ||
441 | vpdTableI[i][sizeCurrVpdTable - 2]); | ||
442 | vpdStep = (int16_t)((vpdStep < 1) ? 1 : vpdStep); | ||
443 | |||
444 | if (tgtIndex >= maxIndex) { | ||
445 | while ((ss <= tgtIndex) && | ||
446 | (k < (AR5416_NUM_PDADC_VALUES - 1))) { | ||
447 | tmpVal = (int16_t)((vpdTableI[i][sizeCurrVpdTable - 1] + | ||
448 | (ss - maxIndex + 1) * vpdStep)); | ||
449 | pPDADCValues[k++] = (u8)((tmpVal > 255) ? | ||
450 | 255 : tmpVal); | ||
451 | ss++; | ||
452 | } | ||
453 | } | ||
454 | } | ||
455 | |||
456 | if (eeprom_4k) | ||
457 | pdgain_boundary_default = 58; | ||
458 | else | ||
459 | pdgain_boundary_default = pPdGainBoundaries[i - 1]; | ||
460 | |||
461 | while (i < AR5416_PD_GAINS_IN_MASK) { | ||
462 | pPdGainBoundaries[i] = pdgain_boundary_default; | ||
463 | i++; | ||
464 | } | ||
465 | |||
466 | while (k < AR5416_NUM_PDADC_VALUES) { | ||
467 | pPDADCValues[k] = pPDADCValues[k - 1]; | ||
468 | k++; | ||
469 | } | ||
470 | } | ||
471 | |||
282 | int ath9k_hw_eeprom_init(struct ath_hw *ah) | 472 | int ath9k_hw_eeprom_init(struct ath_hw *ah) |
283 | { | 473 | { |
284 | int status; | 474 | int status; |