diff options
author | David S. Miller <davem@davemloft.net> | 2009-05-08 15:46:17 -0400 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2009-05-08 15:46:17 -0400 |
commit | a8679be2073392cf22a910bc25da0c7d36459845 (patch) | |
tree | 0d25750ea4ba3a85fe683f285261083d77080976 /drivers/net/wireless/ath/ath5k/eeprom.h | |
parent | 22f6dacdfcfdc792d068e9c41234808860498d04 (diff) | |
parent | 9dfd6ba353b993d648dcda72480c7ce92cd27c7e (diff) |
Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/linville/wireless-next-2.6
Diffstat (limited to 'drivers/net/wireless/ath/ath5k/eeprom.h')
-rw-r--r-- | drivers/net/wireless/ath/ath5k/eeprom.h | 46 |
1 files changed, 36 insertions, 10 deletions
diff --git a/drivers/net/wireless/ath/ath5k/eeprom.h b/drivers/net/wireless/ath/ath5k/eeprom.h index b0c0606dea0b..64be73a5edae 100644 --- a/drivers/net/wireless/ath/ath5k/eeprom.h +++ b/drivers/net/wireless/ath/ath5k/eeprom.h | |||
@@ -26,6 +26,13 @@ | |||
26 | #define AR5K_EEPROM_MAGIC_5210 0x0000145a /* 5210 */ | 26 | #define AR5K_EEPROM_MAGIC_5210 0x0000145a /* 5210 */ |
27 | 27 | ||
28 | #define AR5K_EEPROM_IS_HB63 0x000b /* Talon detect */ | 28 | #define AR5K_EEPROM_IS_HB63 0x000b /* Talon detect */ |
29 | |||
30 | #define AR5K_EEPROM_RFKILL 0x0f | ||
31 | #define AR5K_EEPROM_RFKILL_GPIO_SEL 0x0000001c | ||
32 | #define AR5K_EEPROM_RFKILL_GPIO_SEL_S 2 | ||
33 | #define AR5K_EEPROM_RFKILL_POLARITY 0x00000002 | ||
34 | #define AR5K_EEPROM_RFKILL_POLARITY_S 1 | ||
35 | |||
29 | #define AR5K_EEPROM_REG_DOMAIN 0x00bf /* EEPROM regdom */ | 36 | #define AR5K_EEPROM_REG_DOMAIN 0x00bf /* EEPROM regdom */ |
30 | #define AR5K_EEPROM_CHECKSUM 0x00c0 /* EEPROM checksum */ | 37 | #define AR5K_EEPROM_CHECKSUM 0x00c0 /* EEPROM checksum */ |
31 | #define AR5K_EEPROM_INFO_BASE 0x00c0 /* EEPROM header */ | 38 | #define AR5K_EEPROM_INFO_BASE 0x00c0 /* EEPROM header */ |
@@ -66,11 +73,6 @@ | |||
66 | #define AR5K_EEPROM_HDR_RFKILL(_v) (((_v) >> 14) & 0x1) /* Device has RFKill support */ | 73 | #define AR5K_EEPROM_HDR_RFKILL(_v) (((_v) >> 14) & 0x1) /* Device has RFKill support */ |
67 | #define AR5K_EEPROM_HDR_T_5GHZ_DIS(_v) (((_v) >> 15) & 0x1) /* Disable turbo for 5Ghz */ | 74 | #define AR5K_EEPROM_HDR_T_5GHZ_DIS(_v) (((_v) >> 15) & 0x1) /* Disable turbo for 5Ghz */ |
68 | 75 | ||
69 | #define AR5K_EEPROM_RFKILL_GPIO_SEL 0x0000001c | ||
70 | #define AR5K_EEPROM_RFKILL_GPIO_SEL_S 2 | ||
71 | #define AR5K_EEPROM_RFKILL_POLARITY 0x00000002 | ||
72 | #define AR5K_EEPROM_RFKILL_POLARITY_S 1 | ||
73 | |||
74 | /* Newer EEPROMs are using a different offset */ | 76 | /* Newer EEPROMs are using a different offset */ |
75 | #define AR5K_EEPROM_OFF(_v, _v3_0, _v3_3) \ | 77 | #define AR5K_EEPROM_OFF(_v, _v3_0, _v3_3) \ |
76 | (((_v) >= AR5K_EEPROM_VERSION_3_3) ? _v3_3 : _v3_0) | 78 | (((_v) >= AR5K_EEPROM_VERSION_3_3) ? _v3_3 : _v3_0) |
@@ -211,6 +213,23 @@ | |||
211 | #define AR5K_EEPROM_I_GAIN 10 | 213 | #define AR5K_EEPROM_I_GAIN 10 |
212 | #define AR5K_EEPROM_CCK_OFDM_DELTA 15 | 214 | #define AR5K_EEPROM_CCK_OFDM_DELTA 15 |
213 | #define AR5K_EEPROM_N_IQ_CAL 2 | 215 | #define AR5K_EEPROM_N_IQ_CAL 2 |
216 | /* 5GHz/2GHz */ | ||
217 | enum ath5k_eeprom_freq_bands{ | ||
218 | AR5K_EEPROM_BAND_5GHZ = 0, | ||
219 | AR5K_EEPROM_BAND_2GHZ = 1, | ||
220 | AR5K_EEPROM_N_FREQ_BANDS, | ||
221 | }; | ||
222 | /* Spur chans per freq band */ | ||
223 | #define AR5K_EEPROM_N_SPUR_CHANS 5 | ||
224 | /* fbin value for chan 2464 x2 */ | ||
225 | #define AR5K_EEPROM_5413_SPUR_CHAN_1 1640 | ||
226 | /* fbin value for chan 2420 x2 */ | ||
227 | #define AR5K_EEPROM_5413_SPUR_CHAN_2 1200 | ||
228 | #define AR5K_EEPROM_SPUR_CHAN_MASK 0x3FFF | ||
229 | #define AR5K_EEPROM_NO_SPUR 0x8000 | ||
230 | #define AR5K_SPUR_CHAN_WIDTH 87 | ||
231 | #define AR5K_SPUR_SYMBOL_WIDTH_BASE_100Hz 3125 | ||
232 | #define AR5K_SPUR_SYMBOL_WIDTH_TURBO_100Hz 6250 | ||
214 | 233 | ||
215 | #define AR5K_EEPROM_READ(_o, _v) do { \ | 234 | #define AR5K_EEPROM_READ(_o, _v) do { \ |
216 | ret = ath5k_hw_eeprom_read(ah, (_o), &(_v)); \ | 235 | ret = ath5k_hw_eeprom_read(ah, (_o), &(_v)); \ |
@@ -221,11 +240,11 @@ | |||
221 | #define AR5K_EEPROM_READ_HDR(_o, _v) \ | 240 | #define AR5K_EEPROM_READ_HDR(_o, _v) \ |
222 | AR5K_EEPROM_READ(_o, ah->ah_capabilities.cap_eeprom._v); \ | 241 | AR5K_EEPROM_READ(_o, ah->ah_capabilities.cap_eeprom._v); \ |
223 | 242 | ||
224 | enum ath5k_ant_setting { | 243 | enum ath5k_ant_table { |
225 | AR5K_ANT_VARIABLE = 0, /* variable by programming */ | 244 | AR5K_ANT_CTL = 0, /* Idle switch table settings */ |
226 | AR5K_ANT_FIXED_A = 1, /* fixed to 11a frequencies */ | 245 | AR5K_ANT_SWTABLE_A = 1, /* Switch table for antenna A */ |
227 | AR5K_ANT_FIXED_B = 2, /* fixed to 11b frequencies */ | 246 | AR5K_ANT_SWTABLE_B = 2, /* Switch table for antenna B */ |
228 | AR5K_ANT_MAX = 3, | 247 | AR5K_ANT_MAX, |
229 | }; | 248 | }; |
230 | 249 | ||
231 | enum ath5k_ctl_mode { | 250 | enum ath5k_ctl_mode { |
@@ -369,6 +388,9 @@ struct ath5k_eeprom_info { | |||
369 | u16 ee_version; | 388 | u16 ee_version; |
370 | u16 ee_header; | 389 | u16 ee_header; |
371 | u16 ee_ant_gain; | 390 | u16 ee_ant_gain; |
391 | u8 ee_rfkill_pin; | ||
392 | bool ee_rfkill_pol; | ||
393 | bool ee_is_hb63; | ||
372 | u16 ee_misc0; | 394 | u16 ee_misc0; |
373 | u16 ee_misc1; | 395 | u16 ee_misc1; |
374 | u16 ee_misc2; | 396 | u16 ee_misc2; |
@@ -436,6 +458,10 @@ struct ath5k_eeprom_info { | |||
436 | s8 ee_pga_desired_size_turbo[AR5K_EEPROM_N_MODES]; | 458 | s8 ee_pga_desired_size_turbo[AR5K_EEPROM_N_MODES]; |
437 | s8 ee_pd_gain_overlap; | 459 | s8 ee_pd_gain_overlap; |
438 | 460 | ||
461 | /* Spur mitigation data (fbin values for spur channels) */ | ||
462 | u16 ee_spur_chans[AR5K_EEPROM_N_SPUR_CHANS][AR5K_EEPROM_N_FREQ_BANDS]; | ||
463 | |||
464 | /* Antenna raw switch tables */ | ||
439 | u32 ee_antenna[AR5K_EEPROM_N_MODES][AR5K_ANT_MAX]; | 465 | u32 ee_antenna[AR5K_EEPROM_N_MODES][AR5K_ANT_MAX]; |
440 | }; | 466 | }; |
441 | 467 | ||