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authorLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:20:36 -0400
committerLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:20:36 -0400
commit1da177e4c3f41524e886b7f1b8a0c1fc7321cac2 (patch)
tree0bba044c4ce775e45a88a51686b5d9f90697ea9d /drivers/net/wan/lmc
Linux-2.6.12-rc2v2.6.12-rc2
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
Diffstat (limited to 'drivers/net/wan/lmc')
-rw-r--r--drivers/net/wan/lmc/Makefile17
-rw-r--r--drivers/net/wan/lmc/lmc.h33
-rw-r--r--drivers/net/wan/lmc/lmc_debug.c85
-rw-r--r--drivers/net/wan/lmc/lmc_debug.h52
-rw-r--r--drivers/net/wan/lmc/lmc_ioctl.h257
-rw-r--r--drivers/net/wan/lmc/lmc_main.c2201
-rw-r--r--drivers/net/wan/lmc/lmc_media.c1246
-rw-r--r--drivers/net/wan/lmc/lmc_media.h65
-rw-r--r--drivers/net/wan/lmc/lmc_prot.h15
-rw-r--r--drivers/net/wan/lmc/lmc_proto.c249
-rw-r--r--drivers/net/wan/lmc/lmc_proto.h16
-rw-r--r--drivers/net/wan/lmc/lmc_var.h570
12 files changed, 4806 insertions, 0 deletions
diff --git a/drivers/net/wan/lmc/Makefile b/drivers/net/wan/lmc/Makefile
new file mode 100644
index 000000000000..dabdcfed4efd
--- /dev/null
+++ b/drivers/net/wan/lmc/Makefile
@@ -0,0 +1,17 @@
1#
2# Makefile for the Lan Media 21140 based WAN cards
3# Specifically the 1000,1200,5200,5245
4#
5
6obj-$(CONFIG_LANMEDIA) += lmc.o
7
8lmc-objs := lmc_debug.o lmc_media.o lmc_main.o lmc_proto.o
9
10# Like above except every packet gets echoed to KERN_DEBUG
11# in hex
12#
13# DBDEF = \
14# -DDEBUG \
15# -DLMC_PACKET_LOG
16
17EXTRA_CFLAGS += -I. $(DBGDEF)
diff --git a/drivers/net/wan/lmc/lmc.h b/drivers/net/wan/lmc/lmc.h
new file mode 100644
index 000000000000..882e58c1bfd7
--- /dev/null
+++ b/drivers/net/wan/lmc/lmc.h
@@ -0,0 +1,33 @@
1#ifndef _LMC_H_
2#define _LMC_H_
3
4#include "lmc_var.h"
5
6/*
7 * prototypes for everyone
8 */
9int lmc_probe(struct net_device * dev);
10unsigned lmc_mii_readreg(lmc_softc_t * const sc, unsigned
11 devaddr, unsigned regno);
12void lmc_mii_writereg(lmc_softc_t * const sc, unsigned devaddr,
13 unsigned regno, unsigned data);
14void lmc_led_on(lmc_softc_t * const, u_int32_t);
15void lmc_led_off(lmc_softc_t * const, u_int32_t);
16unsigned lmc_mii_readreg(lmc_softc_t * const, unsigned, unsigned);
17void lmc_mii_writereg(lmc_softc_t * const, unsigned, unsigned, unsigned);
18void lmc_gpio_mkinput(lmc_softc_t * const sc, u_int32_t bits);
19void lmc_gpio_mkoutput(lmc_softc_t * const sc, u_int32_t bits);
20
21int lmc_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd);
22
23extern lmc_media_t lmc_ds3_media;
24extern lmc_media_t lmc_ssi_media;
25extern lmc_media_t lmc_t1_media;
26extern lmc_media_t lmc_hssi_media;
27
28#ifdef _DBG_EVENTLOG
29static void lmcEventLog( u_int32_t EventNum, u_int32_t arg2, u_int32_t arg3 );
30#endif
31
32#endif
33
diff --git a/drivers/net/wan/lmc/lmc_debug.c b/drivers/net/wan/lmc/lmc_debug.c
new file mode 100644
index 000000000000..9dccd9546a17
--- /dev/null
+++ b/drivers/net/wan/lmc/lmc_debug.c
@@ -0,0 +1,85 @@
1
2#include <linux/types.h>
3#include <linux/netdevice.h>
4#include <linux/interrupt.h>
5
6#include "lmc_debug.h"
7
8/*
9 * Prints out len, max to 80 octets using printk, 20 per line
10 */
11void lmcConsoleLog(char *type, unsigned char *ucData, int iLen)
12{
13#ifdef DEBUG
14#ifdef LMC_PACKET_LOG
15 int iNewLine = 1;
16 char str[80], *pstr;
17
18 sprintf(str, KERN_DEBUG "lmc: %s: ", type);
19 pstr = str+strlen(str);
20
21 if(iLen > 240){
22 printk(KERN_DEBUG "lmc: Printing 240 chars... out of: %d\n", iLen);
23 iLen = 240;
24 }
25 else{
26 printk(KERN_DEBUG "lmc: Printing %d chars\n", iLen);
27 }
28
29 while(iLen > 0)
30 {
31 sprintf(pstr, "%02x ", *ucData);
32 pstr+=3;
33 ucData++;
34 if( !(iNewLine % 20))
35 {
36 sprintf(pstr, "\n");
37 printk(str);
38 sprintf(str, KERN_DEBUG "lmc: %s: ", type);
39 pstr=str+strlen(str);
40 }
41 iNewLine++;
42 iLen--;
43 }
44 sprintf(pstr, "\n");
45 printk(str);
46#endif
47#endif
48}
49
50#ifdef DEBUG
51u_int32_t lmcEventLogIndex = 0;
52u_int32_t lmcEventLogBuf[LMC_EVENTLOGSIZE * LMC_EVENTLOGARGS];
53#endif
54
55void lmcEventLog (u_int32_t EventNum, u_int32_t arg2, u_int32_t arg3)
56{
57#ifdef DEBUG
58 lmcEventLogBuf[lmcEventLogIndex++] = EventNum;
59 lmcEventLogBuf[lmcEventLogIndex++] = arg2;
60 lmcEventLogBuf[lmcEventLogIndex++] = arg3;
61 lmcEventLogBuf[lmcEventLogIndex++] = jiffies;
62
63 lmcEventLogIndex &= (LMC_EVENTLOGSIZE * LMC_EVENTLOGARGS) - 1;
64#endif
65}
66
67void lmc_trace(struct net_device *dev, char *msg){
68#ifdef LMC_TRACE
69 unsigned long j = jiffies + 3; /* Wait for 50 ms */
70
71 if(in_interrupt()){
72 printk("%s: * %s\n", dev->name, msg);
73// while(time_before(jiffies, j+10))
74// ;
75 }
76 else {
77 printk("%s: %s\n", dev->name, msg);
78 while(time_before(jiffies, j))
79 schedule();
80 }
81#endif
82}
83
84
85/* --------------------------- end if_lmc_linux.c ------------------------ */
diff --git a/drivers/net/wan/lmc/lmc_debug.h b/drivers/net/wan/lmc/lmc_debug.h
new file mode 100644
index 000000000000..cf3563859bf3
--- /dev/null
+++ b/drivers/net/wan/lmc/lmc_debug.h
@@ -0,0 +1,52 @@
1#ifndef _LMC_DEBUG_H_
2#define _LMC_DEBUG_H_
3
4#ifdef DEBUG
5#ifdef LMC_PACKET_LOG
6#define LMC_CONSOLE_LOG(x,y,z) lmcConsoleLog((x), (y), (z))
7#else
8#define LMC_CONSOLE_LOG(x,y,z)
9#endif
10#else
11#define LMC_CONSOLE_LOG(x,y,z)
12#endif
13
14
15
16/* Debug --- Event log definitions --- */
17/* EVENTLOGSIZE*EVENTLOGARGS needs to be a power of 2 */
18#define LMC_EVENTLOGSIZE 1024 /* number of events in eventlog */
19#define LMC_EVENTLOGARGS 4 /* number of args for each event */
20
21/* event indicators */
22#define LMC_EVENT_XMT 1
23#define LMC_EVENT_XMTEND 2
24#define LMC_EVENT_XMTINT 3
25#define LMC_EVENT_RCVINT 4
26#define LMC_EVENT_RCVEND 5
27#define LMC_EVENT_INT 6
28#define LMC_EVENT_XMTINTTMO 7
29#define LMC_EVENT_XMTPRCTMO 8
30#define LMC_EVENT_INTEND 9
31#define LMC_EVENT_RESET1 10
32#define LMC_EVENT_RESET2 11
33#define LMC_EVENT_FORCEDRESET 12
34#define LMC_EVENT_WATCHDOG 13
35#define LMC_EVENT_BADPKTSURGE 14
36#define LMC_EVENT_TBUSY0 15
37#define LMC_EVENT_TBUSY1 16
38
39
40#ifdef DEBUG
41extern u_int32_t lmcEventLogIndex;
42extern u_int32_t lmcEventLogBuf[LMC_EVENTLOGSIZE * LMC_EVENTLOGARGS];
43#define LMC_EVENT_LOG(x, y, z) lmcEventLog((x), (y), (z))
44#else
45#define LMC_EVENT_LOG(x,y,z)
46#endif /* end ifdef _DBG_EVENTLOG */
47
48void lmcConsoleLog(char *type, unsigned char *ucData, int iLen);
49void lmcEventLog (u_int32_t EventNum, u_int32_t arg2, u_int32_t arg3);
50void lmc_trace(struct net_device *dev, char *msg);
51
52#endif
diff --git a/drivers/net/wan/lmc/lmc_ioctl.h b/drivers/net/wan/lmc/lmc_ioctl.h
new file mode 100644
index 000000000000..57dd861cd3db
--- /dev/null
+++ b/drivers/net/wan/lmc/lmc_ioctl.h
@@ -0,0 +1,257 @@
1#ifndef _LMC_IOCTL_H_
2#define _LMC_IOCTL_H_
3/* $Id: lmc_ioctl.h,v 1.15 2000/04/06 12:16:43 asj Exp $ */
4
5 /*
6 * Copyright (c) 1997-2000 LAN Media Corporation (LMC)
7 * All rights reserved. www.lanmedia.com
8 *
9 * This code is written by:
10 * Andrew Stanley-Jones (asj@cban.com)
11 * Rob Braun (bbraun@vix.com),
12 * Michael Graff (explorer@vix.com) and
13 * Matt Thomas (matt@3am-software.com).
14 *
15 * This software may be used and distributed according to the terms
16 * of the GNU General Public License version 2, incorporated herein by reference.
17 */
18
19#define LMCIOCGINFO SIOCDEVPRIVATE+3 /* get current state */
20#define LMCIOCSINFO SIOCDEVPRIVATE+4 /* set state to user values */
21#define LMCIOCGETLMCSTATS SIOCDEVPRIVATE+5
22#define LMCIOCCLEARLMCSTATS SIOCDEVPRIVATE+6
23#define LMCIOCDUMPEVENTLOG SIOCDEVPRIVATE+7
24#define LMCIOCGETXINFO SIOCDEVPRIVATE+8
25#define LMCIOCSETCIRCUIT SIOCDEVPRIVATE+9
26#define LMCIOCUNUSEDATM SIOCDEVPRIVATE+10
27#define LMCIOCRESET SIOCDEVPRIVATE+11
28#define LMCIOCT1CONTROL SIOCDEVPRIVATE+12
29#define LMCIOCIFTYPE SIOCDEVPRIVATE+13
30#define LMCIOCXILINX SIOCDEVPRIVATE+14
31
32#define LMC_CARDTYPE_UNKNOWN -1
33#define LMC_CARDTYPE_HSSI 1 /* probed card is a HSSI card */
34#define LMC_CARDTYPE_DS3 2 /* probed card is a DS3 card */
35#define LMC_CARDTYPE_SSI 3 /* probed card is a SSI card */
36#define LMC_CARDTYPE_T1 4 /* probed card is a T1 card */
37
38#define LMC_CTL_CARDTYPE_LMC5200 0 /* HSSI */
39#define LMC_CTL_CARDTYPE_LMC5245 1 /* DS3 */
40#define LMC_CTL_CARDTYPE_LMC1000 2 /* SSI, V.35 */
41#define LMC_CTL_CARDTYPE_LMC1200 3 /* DS1 */
42
43#define LMC_CTL_OFF 0 /* generic OFF value */
44#define LMC_CTL_ON 1 /* generic ON value */
45
46#define LMC_CTL_CLOCK_SOURCE_EXT 0 /* clock off line */
47#define LMC_CTL_CLOCK_SOURCE_INT 1 /* internal clock */
48
49#define LMC_CTL_CRC_LENGTH_16 16
50#define LMC_CTL_CRC_LENGTH_32 32
51#define LMC_CTL_CRC_BYTESIZE_2 2
52#define LMC_CTL_CRC_BYTESIZE_4 4
53
54
55#define LMC_CTL_CABLE_LENGTH_LT_100FT 0 /* DS3 cable < 100 feet */
56#define LMC_CTL_CABLE_LENGTH_GT_100FT 1 /* DS3 cable >= 100 feet */
57
58#define LMC_CTL_CIRCUIT_TYPE_E1 0
59#define LMC_CTL_CIRCUIT_TYPE_T1 1
60
61/*
62 * IFTYPE defines
63 */
64#define LMC_PPP 1 /* use sppp interface */
65#define LMC_NET 2 /* use direct net interface */
66#define LMC_RAW 3 /* use direct net interface */
67
68/*
69 * These are not in the least IOCTL related, but I want them common.
70 */
71/*
72 * assignments for the GPIO register on the DEC chip (common)
73 */
74#define LMC_GEP_INIT 0x01 /* 0: */
75#define LMC_GEP_RESET 0x02 /* 1: */
76#define LMC_GEP_MODE 0x10 /* 4: */
77#define LMC_GEP_DP 0x20 /* 5: */
78#define LMC_GEP_DATA 0x40 /* 6: serial out */
79#define LMC_GEP_CLK 0x80 /* 7: serial clock */
80
81/*
82 * HSSI GPIO assignments
83 */
84#define LMC_GEP_HSSI_ST 0x04 /* 2: receive timing sense (deprecated) */
85#define LMC_GEP_HSSI_CLOCK 0x08 /* 3: clock source */
86
87/*
88 * T1 GPIO assignments
89 */
90#define LMC_GEP_SSI_GENERATOR 0x04 /* 2: enable prog freq gen serial i/f */
91#define LMC_GEP_SSI_TXCLOCK 0x08 /* 3: provide clock on TXCLOCK output */
92
93/*
94 * Common MII16 bits
95 */
96#define LMC_MII16_LED0 0x0080
97#define LMC_MII16_LED1 0x0100
98#define LMC_MII16_LED2 0x0200
99#define LMC_MII16_LED3 0x0400 /* Error, and the red one */
100#define LMC_MII16_LED_ALL 0x0780 /* LED bit mask */
101#define LMC_MII16_FIFO_RESET 0x0800
102
103/*
104 * definitions for HSSI
105 */
106#define LMC_MII16_HSSI_TA 0x0001
107#define LMC_MII16_HSSI_CA 0x0002
108#define LMC_MII16_HSSI_LA 0x0004
109#define LMC_MII16_HSSI_LB 0x0008
110#define LMC_MII16_HSSI_LC 0x0010
111#define LMC_MII16_HSSI_TM 0x0020
112#define LMC_MII16_HSSI_CRC 0x0040
113
114/*
115 * assignments for the MII register 16 (DS3)
116 */
117#define LMC_MII16_DS3_ZERO 0x0001
118#define LMC_MII16_DS3_TRLBK 0x0002
119#define LMC_MII16_DS3_LNLBK 0x0004
120#define LMC_MII16_DS3_RAIS 0x0008
121#define LMC_MII16_DS3_TAIS 0x0010
122#define LMC_MII16_DS3_BIST 0x0020
123#define LMC_MII16_DS3_DLOS 0x0040
124#define LMC_MII16_DS3_CRC 0x1000
125#define LMC_MII16_DS3_SCRAM 0x2000
126#define LMC_MII16_DS3_SCRAM_LARS 0x4000
127
128/* Note: 2 pairs of LEDs where swapped by mistake
129 * in Xilinx code for DS3 & DS1 adapters */
130#define LMC_DS3_LED0 0x0100 /* bit 08 yellow */
131#define LMC_DS3_LED1 0x0080 /* bit 07 blue */
132#define LMC_DS3_LED2 0x0400 /* bit 10 green */
133#define LMC_DS3_LED3 0x0200 /* bit 09 red */
134
135/*
136 * framer register 0 and 7 (7 is latched and reset on read)
137 */
138#define LMC_FRAMER_REG0_DLOS 0x80 /* digital loss of service */
139#define LMC_FRAMER_REG0_OOFS 0x40 /* out of frame sync */
140#define LMC_FRAMER_REG0_AIS 0x20 /* alarm indication signal */
141#define LMC_FRAMER_REG0_CIS 0x10 /* channel idle */
142#define LMC_FRAMER_REG0_LOC 0x08 /* loss of clock */
143
144/*
145 * Framer register 9 contains the blue alarm signal
146 */
147#define LMC_FRAMER_REG9_RBLUE 0x02 /* Blue alarm failure */
148
149/*
150 * Framer register 0x10 contains xbit error
151 */
152#define LMC_FRAMER_REG10_XBIT 0x01 /* X bit error alarm failure */
153
154/*
155 * And SSI, LMC1000
156 */
157#define LMC_MII16_SSI_DTR 0x0001 /* DTR output RW */
158#define LMC_MII16_SSI_DSR 0x0002 /* DSR input RO */
159#define LMC_MII16_SSI_RTS 0x0004 /* RTS output RW */
160#define LMC_MII16_SSI_CTS 0x0008 /* CTS input RO */
161#define LMC_MII16_SSI_DCD 0x0010 /* DCD input RO */
162#define LMC_MII16_SSI_RI 0x0020 /* RI input RO */
163#define LMC_MII16_SSI_CRC 0x1000 /* CRC select - RW */
164
165/*
166 * bits 0x0080 through 0x0800 are generic, and described
167 * above with LMC_MII16_LED[0123] _LED_ALL, and _FIFO_RESET
168 */
169#define LMC_MII16_SSI_LL 0x1000 /* LL output RW */
170#define LMC_MII16_SSI_RL 0x2000 /* RL output RW */
171#define LMC_MII16_SSI_TM 0x4000 /* TM input RO */
172#define LMC_MII16_SSI_LOOP 0x8000 /* loopback enable RW */
173
174/*
175 * Some of the MII16 bits are mirrored in the MII17 register as well,
176 * but let's keep thing separate for now, and get only the cable from
177 * the MII17.
178 */
179#define LMC_MII17_SSI_CABLE_MASK 0x0038 /* mask to extract the cable type */
180#define LMC_MII17_SSI_CABLE_SHIFT 3 /* shift to extract the cable type */
181
182/*
183 * And T1, LMC1200
184 */
185#define LMC_MII16_T1_UNUSED1 0x0003
186#define LMC_MII16_T1_XOE 0x0004
187#define LMC_MII16_T1_RST 0x0008 /* T1 chip reset - RW */
188#define LMC_MII16_T1_Z 0x0010 /* output impedance T1=1, E1=0 output - RW */
189#define LMC_MII16_T1_INTR 0x0020 /* interrupt from 8370 - RO */
190#define LMC_MII16_T1_ONESEC 0x0040 /* one second square wave - ro */
191
192#define LMC_MII16_T1_LED0 0x0100
193#define LMC_MII16_T1_LED1 0x0080
194#define LMC_MII16_T1_LED2 0x0400
195#define LMC_MII16_T1_LED3 0x0200
196#define LMC_MII16_T1_FIFO_RESET 0x0800
197
198#define LMC_MII16_T1_CRC 0x1000 /* CRC select - RW */
199#define LMC_MII16_T1_UNUSED2 0xe000
200
201
202/* 8370 framer registers */
203
204#define T1FRAMER_ALARM1_STATUS 0x47
205#define T1FRAMER_ALARM2_STATUS 0x48
206#define T1FRAMER_FERR_LSB 0x50
207#define T1FRAMER_FERR_MSB 0x51 /* framing bit error counter */
208#define T1FRAMER_LCV_LSB 0x54
209#define T1FRAMER_LCV_MSB 0x55 /* line code violation counter */
210#define T1FRAMER_AERR 0x5A
211
212/* mask for the above AERR register */
213#define T1FRAMER_LOF_MASK (0x0f0) /* receive loss of frame */
214#define T1FRAMER_COFA_MASK (0x0c0) /* change of frame alignment */
215#define T1FRAMER_SEF_MASK (0x03) /* severely errored frame */
216
217/* 8370 framer register ALM1 (0x47) values
218 * used to determine link status
219 */
220
221#define T1F_SIGFRZ 0x01 /* signaling freeze */
222#define T1F_RLOF 0x02 /* receive loss of frame alignment */
223#define T1F_RLOS 0x04 /* receive loss of signal */
224#define T1F_RALOS 0x08 /* receive analog loss of signal or RCKI loss of clock */
225#define T1F_RAIS 0x10 /* receive alarm indication signal */
226#define T1F_UNUSED 0x20
227#define T1F_RYEL 0x40 /* receive yellow alarm */
228#define T1F_RMYEL 0x80 /* receive multiframe yellow alarm */
229
230#define LMC_T1F_WRITE 0
231#define LMC_T1F_READ 1
232
233typedef struct lmc_st1f_control {
234 int command;
235 int address;
236 int value;
237 char __user *data;
238} lmc_t1f_control;
239
240enum lmc_xilinx_c {
241 lmc_xilinx_reset = 1,
242 lmc_xilinx_load_prom = 2,
243 lmc_xilinx_load = 3
244};
245
246struct lmc_xilinx_control {
247 enum lmc_xilinx_c command;
248 int len;
249 char __user *data;
250};
251
252/* ------------------ end T1 defs ------------------- */
253
254#define LMC_MII_LedMask 0x0780
255#define LMC_MII_LedBitPos 7
256
257#endif
diff --git a/drivers/net/wan/lmc/lmc_main.c b/drivers/net/wan/lmc/lmc_main.c
new file mode 100644
index 000000000000..15e545f66cd7
--- /dev/null
+++ b/drivers/net/wan/lmc/lmc_main.c
@@ -0,0 +1,2201 @@
1 /*
2 * Copyright (c) 1997-2000 LAN Media Corporation (LMC)
3 * All rights reserved. www.lanmedia.com
4 *
5 * This code is written by:
6 * Andrew Stanley-Jones (asj@cban.com)
7 * Rob Braun (bbraun@vix.com),
8 * Michael Graff (explorer@vix.com) and
9 * Matt Thomas (matt@3am-software.com).
10 *
11 * With Help By:
12 * David Boggs
13 * Ron Crane
14 * Alan Cox
15 *
16 * This software may be used and distributed according to the terms
17 * of the GNU General Public License version 2, incorporated herein by reference.
18 *
19 * Driver for the LanMedia LMC5200, LMC5245, LMC1000, LMC1200 cards.
20 *
21 * To control link specific options lmcctl is required.
22 * It can be obtained from ftp.lanmedia.com.
23 *
24 * Linux driver notes:
25 * Linux uses the device struct lmc_private to pass private information
26 * arround.
27 *
28 * The initialization portion of this driver (the lmc_reset() and the
29 * lmc_dec_reset() functions, as well as the led controls and the
30 * lmc_initcsrs() functions.
31 *
32 * The watchdog function runs every second and checks to see if
33 * we still have link, and that the timing source is what we expected
34 * it to be. If link is lost, the interface is marked down, and
35 * we no longer can transmit.
36 *
37 */
38
39/* $Id: lmc_main.c,v 1.36 2000/04/11 05:25:25 asj Exp $ */
40
41#include <linux/kernel.h>
42#include <linux/module.h>
43#include <linux/string.h>
44#include <linux/timer.h>
45#include <linux/ptrace.h>
46#include <linux/errno.h>
47#include <linux/ioport.h>
48#include <linux/slab.h>
49#include <linux/interrupt.h>
50#include <linux/pci.h>
51#include <linux/delay.h>
52#include <linux/init.h>
53#include <linux/in.h>
54#include <linux/if_arp.h>
55#include <linux/netdevice.h>
56#include <linux/etherdevice.h>
57#include <linux/skbuff.h>
58#include <linux/inet.h>
59#include <linux/bitops.h>
60
61#include <net/syncppp.h>
62
63#include <asm/processor.h> /* Processor type for cache alignment. */
64#include <asm/io.h>
65#include <asm/dma.h>
66#include <asm/uaccess.h>
67//#include <asm/spinlock.h>
68
69#define DRIVER_MAJOR_VERSION 1
70#define DRIVER_MINOR_VERSION 34
71#define DRIVER_SUB_VERSION 0
72
73#define DRIVER_VERSION ((DRIVER_MAJOR_VERSION << 8) + DRIVER_MINOR_VERSION)
74
75#include "lmc.h"
76#include "lmc_var.h"
77#include "lmc_ioctl.h"
78#include "lmc_debug.h"
79#include "lmc_proto.h"
80
81static int lmc_first_load = 0;
82
83static int LMC_PKT_BUF_SZ = 1542;
84
85static struct pci_device_id lmc_pci_tbl[] = {
86 { PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_DEC_TULIP_FAST,
87 PCI_VENDOR_ID_LMC, PCI_ANY_ID },
88 { PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_DEC_TULIP_FAST,
89 PCI_ANY_ID, PCI_VENDOR_ID_LMC },
90 { 0 }
91};
92
93MODULE_DEVICE_TABLE(pci, lmc_pci_tbl);
94MODULE_LICENSE("GPL");
95
96
97static int lmc_start_xmit(struct sk_buff *skb, struct net_device *dev);
98static int lmc_start_xmit(struct sk_buff *skb, struct net_device *dev);
99static int lmc_rx (struct net_device *dev);
100static int lmc_open(struct net_device *dev);
101static int lmc_close(struct net_device *dev);
102static struct net_device_stats *lmc_get_stats(struct net_device *dev);
103static irqreturn_t lmc_interrupt(int irq, void *dev_instance, struct pt_regs *regs);
104static void lmc_initcsrs(lmc_softc_t * const sc, lmc_csrptr_t csr_base, size_t csr_size);
105static void lmc_softreset(lmc_softc_t * const);
106static void lmc_running_reset(struct net_device *dev);
107static int lmc_ifdown(struct net_device * const);
108static void lmc_watchdog(unsigned long data);
109static void lmc_reset(lmc_softc_t * const sc);
110static void lmc_dec_reset(lmc_softc_t * const sc);
111static void lmc_driver_timeout(struct net_device *dev);
112
113/*
114 * linux reserves 16 device specific IOCTLs. We call them
115 * LMCIOC* to control various bits of our world.
116 */
117int lmc_ioctl (struct net_device *dev, struct ifreq *ifr, int cmd) /*fold00*/
118{
119 lmc_softc_t *sc;
120 lmc_ctl_t ctl;
121 int ret;
122 u_int16_t regVal;
123 unsigned long flags;
124
125 struct sppp *sp;
126
127 ret = -EOPNOTSUPP;
128
129 sc = dev->priv;
130
131 lmc_trace(dev, "lmc_ioctl in");
132
133 /*
134 * Most functions mess with the structure
135 * Disable interrupts while we do the polling
136 */
137 spin_lock_irqsave(&sc->lmc_lock, flags);
138
139 switch (cmd) {
140 /*
141 * Return current driver state. Since we keep this up
142 * To date internally, just copy this out to the user.
143 */
144 case LMCIOCGINFO: /*fold01*/
145 if (copy_to_user(ifr->ifr_data, &sc->ictl, sizeof (lmc_ctl_t)))
146 return -EFAULT;
147 ret = 0;
148 break;
149
150 case LMCIOCSINFO: /*fold01*/
151 sp = &((struct ppp_device *) dev)->sppp;
152 if (!capable(CAP_NET_ADMIN)) {
153 ret = -EPERM;
154 break;
155 }
156
157 if(dev->flags & IFF_UP){
158 ret = -EBUSY;
159 break;
160 }
161
162 if (copy_from_user(&ctl, ifr->ifr_data, sizeof (lmc_ctl_t)))
163 return -EFAULT;
164
165 sc->lmc_media->set_status (sc, &ctl);
166
167 if(ctl.crc_length != sc->ictl.crc_length) {
168 sc->lmc_media->set_crc_length(sc, ctl.crc_length);
169 if (sc->ictl.crc_length == LMC_CTL_CRC_LENGTH_16)
170 sc->TxDescriptControlInit |= LMC_TDES_ADD_CRC_DISABLE;
171 else
172 sc->TxDescriptControlInit &= ~LMC_TDES_ADD_CRC_DISABLE;
173 }
174
175 if (ctl.keepalive_onoff == LMC_CTL_OFF)
176 sp->pp_flags &= ~PP_KEEPALIVE; /* Turn off */
177 else
178 sp->pp_flags |= PP_KEEPALIVE; /* Turn on */
179
180 ret = 0;
181 break;
182
183 case LMCIOCIFTYPE: /*fold01*/
184 {
185 u_int16_t old_type = sc->if_type;
186 u_int16_t new_type;
187
188 if (!capable(CAP_NET_ADMIN)) {
189 ret = -EPERM;
190 break;
191 }
192
193 if (copy_from_user(&new_type, ifr->ifr_data, sizeof(u_int16_t)))
194 return -EFAULT;
195
196
197 if (new_type == old_type)
198 {
199 ret = 0 ;
200 break; /* no change */
201 }
202
203 lmc_proto_close(sc);
204 lmc_proto_detach(sc);
205
206 sc->if_type = new_type;
207// lmc_proto_init(sc);
208 lmc_proto_attach(sc);
209 lmc_proto_open(sc);
210
211 ret = 0 ;
212 break ;
213 }
214
215 case LMCIOCGETXINFO: /*fold01*/
216 sc->lmc_xinfo.Magic0 = 0xBEEFCAFE;
217
218 sc->lmc_xinfo.PciCardType = sc->lmc_cardtype;
219 sc->lmc_xinfo.PciSlotNumber = 0;
220 sc->lmc_xinfo.DriverMajorVersion = DRIVER_MAJOR_VERSION;
221 sc->lmc_xinfo.DriverMinorVersion = DRIVER_MINOR_VERSION;
222 sc->lmc_xinfo.DriverSubVersion = DRIVER_SUB_VERSION;
223 sc->lmc_xinfo.XilinxRevisionNumber =
224 lmc_mii_readreg (sc, 0, 3) & 0xf;
225 sc->lmc_xinfo.MaxFrameSize = LMC_PKT_BUF_SZ;
226 sc->lmc_xinfo.link_status = sc->lmc_media->get_link_status (sc);
227 sc->lmc_xinfo.mii_reg16 = lmc_mii_readreg (sc, 0, 16);
228
229 sc->lmc_xinfo.Magic1 = 0xDEADBEEF;
230
231 if (copy_to_user(ifr->ifr_data, &sc->lmc_xinfo,
232 sizeof (struct lmc_xinfo)))
233 return -EFAULT;
234 ret = 0;
235
236 break;
237
238 case LMCIOCGETLMCSTATS: /*fold01*/
239 if (sc->lmc_cardtype == LMC_CARDTYPE_T1){
240 lmc_mii_writereg (sc, 0, 17, T1FRAMER_FERR_LSB);
241 sc->stats.framingBitErrorCount +=
242 lmc_mii_readreg (sc, 0, 18) & 0xff;
243 lmc_mii_writereg (sc, 0, 17, T1FRAMER_FERR_MSB);
244 sc->stats.framingBitErrorCount +=
245 (lmc_mii_readreg (sc, 0, 18) & 0xff) << 8;
246 lmc_mii_writereg (sc, 0, 17, T1FRAMER_LCV_LSB);
247 sc->stats.lineCodeViolationCount +=
248 lmc_mii_readreg (sc, 0, 18) & 0xff;
249 lmc_mii_writereg (sc, 0, 17, T1FRAMER_LCV_MSB);
250 sc->stats.lineCodeViolationCount +=
251 (lmc_mii_readreg (sc, 0, 18) & 0xff) << 8;
252 lmc_mii_writereg (sc, 0, 17, T1FRAMER_AERR);
253 regVal = lmc_mii_readreg (sc, 0, 18) & 0xff;
254
255 sc->stats.lossOfFrameCount +=
256 (regVal & T1FRAMER_LOF_MASK) >> 4;
257 sc->stats.changeOfFrameAlignmentCount +=
258 (regVal & T1FRAMER_COFA_MASK) >> 2;
259 sc->stats.severelyErroredFrameCount +=
260 regVal & T1FRAMER_SEF_MASK;
261 }
262
263 if (copy_to_user(ifr->ifr_data, &sc->stats,
264 sizeof (struct lmc_statistics)))
265 return -EFAULT;
266
267 ret = 0;
268 break;
269
270 case LMCIOCCLEARLMCSTATS: /*fold01*/
271 if (!capable(CAP_NET_ADMIN)){
272 ret = -EPERM;
273 break;
274 }
275
276 memset (&sc->stats, 0, sizeof (struct lmc_statistics));
277 sc->stats.check = STATCHECK;
278 sc->stats.version_size = (DRIVER_VERSION << 16) +
279 sizeof (struct lmc_statistics);
280 sc->stats.lmc_cardtype = sc->lmc_cardtype;
281 ret = 0;
282 break;
283
284 case LMCIOCSETCIRCUIT: /*fold01*/
285 if (!capable(CAP_NET_ADMIN)){
286 ret = -EPERM;
287 break;
288 }
289
290 if(dev->flags & IFF_UP){
291 ret = -EBUSY;
292 break;
293 }
294
295 if (copy_from_user(&ctl, ifr->ifr_data, sizeof (lmc_ctl_t)))
296 return -EFAULT;
297 sc->lmc_media->set_circuit_type(sc, ctl.circuit_type);
298 sc->ictl.circuit_type = ctl.circuit_type;
299 ret = 0;
300
301 break;
302
303 case LMCIOCRESET: /*fold01*/
304 if (!capable(CAP_NET_ADMIN)){
305 ret = -EPERM;
306 break;
307 }
308
309 /* Reset driver and bring back to current state */
310 printk (" REG16 before reset +%04x\n", lmc_mii_readreg (sc, 0, 16));
311 lmc_running_reset (dev);
312 printk (" REG16 after reset +%04x\n", lmc_mii_readreg (sc, 0, 16));
313
314 LMC_EVENT_LOG(LMC_EVENT_FORCEDRESET, LMC_CSR_READ (sc, csr_status), lmc_mii_readreg (sc, 0, 16));
315
316 ret = 0;
317 break;
318
319#ifdef DEBUG
320 case LMCIOCDUMPEVENTLOG:
321 if (copy_to_user(ifr->ifr_data, &lmcEventLogIndex, sizeof (u32)))
322 return -EFAULT;
323 if (copy_to_user(ifr->ifr_data + sizeof (u32), lmcEventLogBuf, sizeof (lmcEventLogBuf)))
324 return -EFAULT;
325
326 ret = 0;
327 break;
328#endif /* end ifdef _DBG_EVENTLOG */
329 case LMCIOCT1CONTROL: /*fold01*/
330 if (sc->lmc_cardtype != LMC_CARDTYPE_T1){
331 ret = -EOPNOTSUPP;
332 break;
333 }
334 break;
335 case LMCIOCXILINX: /*fold01*/
336 {
337 struct lmc_xilinx_control xc; /*fold02*/
338
339 if (!capable(CAP_NET_ADMIN)){
340 ret = -EPERM;
341 break;
342 }
343
344 /*
345 * Stop the xwitter whlie we restart the hardware
346 */
347 netif_stop_queue(dev);
348
349 if (copy_from_user(&xc, ifr->ifr_data, sizeof (struct lmc_xilinx_control)))
350 return -EFAULT;
351 switch(xc.command){
352 case lmc_xilinx_reset: /*fold02*/
353 {
354 u16 mii;
355 mii = lmc_mii_readreg (sc, 0, 16);
356
357 /*
358 * Make all of them 0 and make input
359 */
360 lmc_gpio_mkinput(sc, 0xff);
361
362 /*
363 * make the reset output
364 */
365 lmc_gpio_mkoutput(sc, LMC_GEP_RESET);
366
367 /*
368 * RESET low to force configuration. This also forces
369 * the transmitter clock to be internal, but we expect to reset
370 * that later anyway.
371 */
372
373 sc->lmc_gpio &= ~LMC_GEP_RESET;
374 LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
375
376
377 /*
378 * hold for more than 10 microseconds
379 */
380 udelay(50);
381
382 sc->lmc_gpio |= LMC_GEP_RESET;
383 LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
384
385
386 /*
387 * stop driving Xilinx-related signals
388 */
389 lmc_gpio_mkinput(sc, 0xff);
390
391 /* Reset the frammer hardware */
392 sc->lmc_media->set_link_status (sc, 1);
393 sc->lmc_media->set_status (sc, NULL);
394// lmc_softreset(sc);
395
396 {
397 int i;
398 for(i = 0; i < 5; i++){
399 lmc_led_on(sc, LMC_DS3_LED0);
400 mdelay(100);
401 lmc_led_off(sc, LMC_DS3_LED0);
402 lmc_led_on(sc, LMC_DS3_LED1);
403 mdelay(100);
404 lmc_led_off(sc, LMC_DS3_LED1);
405 lmc_led_on(sc, LMC_DS3_LED3);
406 mdelay(100);
407 lmc_led_off(sc, LMC_DS3_LED3);
408 lmc_led_on(sc, LMC_DS3_LED2);
409 mdelay(100);
410 lmc_led_off(sc, LMC_DS3_LED2);
411 }
412 }
413
414
415
416 ret = 0x0;
417
418 }
419
420 break;
421 case lmc_xilinx_load_prom: /*fold02*/
422 {
423 u16 mii;
424 int timeout = 500000;
425 mii = lmc_mii_readreg (sc, 0, 16);
426
427 /*
428 * Make all of them 0 and make input
429 */
430 lmc_gpio_mkinput(sc, 0xff);
431
432 /*
433 * make the reset output
434 */
435 lmc_gpio_mkoutput(sc, LMC_GEP_DP | LMC_GEP_RESET);
436
437 /*
438 * RESET low to force configuration. This also forces
439 * the transmitter clock to be internal, but we expect to reset
440 * that later anyway.
441 */
442
443 sc->lmc_gpio &= ~(LMC_GEP_RESET | LMC_GEP_DP);
444 LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
445
446
447 /*
448 * hold for more than 10 microseconds
449 */
450 udelay(50);
451
452 sc->lmc_gpio |= LMC_GEP_DP | LMC_GEP_RESET;
453 LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
454
455 /*
456 * busy wait for the chip to reset
457 */
458 while( (LMC_CSR_READ(sc, csr_gp) & LMC_GEP_INIT) == 0 &&
459 (timeout-- > 0))
460 ;
461
462
463 /*
464 * stop driving Xilinx-related signals
465 */
466 lmc_gpio_mkinput(sc, 0xff);
467
468 ret = 0x0;
469
470
471 break;
472
473 }
474
475 case lmc_xilinx_load: /*fold02*/
476 {
477 char *data;
478 int pos;
479 int timeout = 500000;
480
481 if(xc.data == 0x0){
482 ret = -EINVAL;
483 break;
484 }
485
486 data = kmalloc(xc.len, GFP_KERNEL);
487 if(data == 0x0){
488 printk(KERN_WARNING "%s: Failed to allocate memory for copy\n", dev->name);
489 ret = -ENOMEM;
490 break;
491 }
492
493 if(copy_from_user(data, xc.data, xc.len))
494 {
495 kfree(data);
496 ret = -ENOMEM;
497 break;
498 }
499
500 printk("%s: Starting load of data Len: %d at 0x%p == 0x%p\n", dev->name, xc.len, xc.data, data);
501
502 lmc_gpio_mkinput(sc, 0xff);
503
504 /*
505 * Clear the Xilinx and start prgramming from the DEC
506 */
507
508 /*
509 * Set ouput as:
510 * Reset: 0 (active)
511 * DP: 0 (active)
512 * Mode: 1
513 *
514 */
515 sc->lmc_gpio = 0x00;
516 sc->lmc_gpio &= ~LMC_GEP_DP;
517 sc->lmc_gpio &= ~LMC_GEP_RESET;
518 sc->lmc_gpio |= LMC_GEP_MODE;
519 LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
520
521 lmc_gpio_mkoutput(sc, LMC_GEP_MODE | LMC_GEP_DP | LMC_GEP_RESET);
522
523 /*
524 * Wait at least 10 us 20 to be safe
525 */
526 udelay(50);
527
528 /*
529 * Clear reset and activate programming lines
530 * Reset: Input
531 * DP: Input
532 * Clock: Output
533 * Data: Output
534 * Mode: Output
535 */
536 lmc_gpio_mkinput(sc, LMC_GEP_DP | LMC_GEP_RESET);
537
538 /*
539 * Set LOAD, DATA, Clock to 1
540 */
541 sc->lmc_gpio = 0x00;
542 sc->lmc_gpio |= LMC_GEP_MODE;
543 sc->lmc_gpio |= LMC_GEP_DATA;
544 sc->lmc_gpio |= LMC_GEP_CLK;
545 LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
546
547 lmc_gpio_mkoutput(sc, LMC_GEP_DATA | LMC_GEP_CLK | LMC_GEP_MODE );
548
549 /*
550 * busy wait for the chip to reset
551 */
552 while( (LMC_CSR_READ(sc, csr_gp) & LMC_GEP_INIT) == 0 &&
553 (timeout-- > 0))
554 ;
555
556 printk(KERN_DEBUG "%s: Waited %d for the Xilinx to clear it's memory\n", dev->name, 500000-timeout);
557
558 for(pos = 0; pos < xc.len; pos++){
559 switch(data[pos]){
560 case 0:
561 sc->lmc_gpio &= ~LMC_GEP_DATA; /* Data is 0 */
562 break;
563 case 1:
564 sc->lmc_gpio |= LMC_GEP_DATA; /* Data is 1 */
565 break;
566 default:
567 printk(KERN_WARNING "%s Bad data in xilinx programming data at %d, got %d wanted 0 or 1\n", dev->name, pos, data[pos]);
568 sc->lmc_gpio |= LMC_GEP_DATA; /* Assume it's 1 */
569 }
570 sc->lmc_gpio &= ~LMC_GEP_CLK; /* Clock to zero */
571 sc->lmc_gpio |= LMC_GEP_MODE;
572 LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
573 udelay(1);
574
575 sc->lmc_gpio |= LMC_GEP_CLK; /* Put the clack back to one */
576 sc->lmc_gpio |= LMC_GEP_MODE;
577 LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
578 udelay(1);
579 }
580 if((LMC_CSR_READ(sc, csr_gp) & LMC_GEP_INIT) == 0){
581 printk(KERN_WARNING "%s: Reprogramming FAILED. Needs to be reprogrammed. (corrupted data)\n", dev->name);
582 }
583 else if((LMC_CSR_READ(sc, csr_gp) & LMC_GEP_DP) == 0){
584 printk(KERN_WARNING "%s: Reprogramming FAILED. Needs to be reprogrammed. (done)\n", dev->name);
585 }
586 else {
587 printk(KERN_DEBUG "%s: Done reprogramming Xilinx, %d bits, good luck!\n", dev->name, pos);
588 }
589
590 lmc_gpio_mkinput(sc, 0xff);
591
592 sc->lmc_miireg16 |= LMC_MII16_FIFO_RESET;
593 lmc_mii_writereg(sc, 0, 16, sc->lmc_miireg16);
594
595 sc->lmc_miireg16 &= ~LMC_MII16_FIFO_RESET;
596 lmc_mii_writereg(sc, 0, 16, sc->lmc_miireg16);
597
598 kfree(data);
599
600 ret = 0;
601
602 break;
603 }
604 default: /*fold02*/
605 ret = -EBADE;
606 break;
607 }
608
609 netif_wake_queue(dev);
610 sc->lmc_txfull = 0;
611
612 }
613 break;
614 default: /*fold01*/
615 /* If we don't know what to do, give the protocol a shot. */
616 ret = lmc_proto_ioctl (sc, ifr, cmd);
617 break;
618 }
619
620 spin_unlock_irqrestore(&sc->lmc_lock, flags); /*fold01*/
621
622 lmc_trace(dev, "lmc_ioctl out");
623
624 return ret;
625}
626
627
628/* the watchdog process that cruises around */
629static void lmc_watchdog (unsigned long data) /*fold00*/
630{
631 struct net_device *dev = (struct net_device *) data;
632 lmc_softc_t *sc;
633 int link_status;
634 u_int32_t ticks;
635 unsigned long flags;
636
637 sc = dev->priv;
638
639 lmc_trace(dev, "lmc_watchdog in");
640
641 spin_lock_irqsave(&sc->lmc_lock, flags);
642
643 if(sc->check != 0xBEAFCAFE){
644 printk("LMC: Corrupt net_device stuct, breaking out\n");
645 spin_unlock_irqrestore(&sc->lmc_lock, flags);
646 return;
647 }
648
649
650 /* Make sure the tx jabber and rx watchdog are off,
651 * and the transmit and receive processes are running.
652 */
653
654 LMC_CSR_WRITE (sc, csr_15, 0x00000011);
655 sc->lmc_cmdmode |= TULIP_CMD_TXRUN | TULIP_CMD_RXRUN;
656 LMC_CSR_WRITE (sc, csr_command, sc->lmc_cmdmode);
657
658 if (sc->lmc_ok == 0)
659 goto kick_timer;
660
661 LMC_EVENT_LOG(LMC_EVENT_WATCHDOG, LMC_CSR_READ (sc, csr_status), lmc_mii_readreg (sc, 0, 16));
662
663 /* --- begin time out check -----------------------------------
664 * check for a transmit interrupt timeout
665 * Has the packet xmt vs xmt serviced threshold been exceeded */
666 if (sc->lmc_taint_tx == sc->lastlmc_taint_tx &&
667 sc->stats.tx_packets > sc->lasttx_packets &&
668 sc->tx_TimeoutInd == 0)
669 {
670
671 /* wait for the watchdog to come around again */
672 sc->tx_TimeoutInd = 1;
673 }
674 else if (sc->lmc_taint_tx == sc->lastlmc_taint_tx &&
675 sc->stats.tx_packets > sc->lasttx_packets &&
676 sc->tx_TimeoutInd)
677 {
678
679 LMC_EVENT_LOG(LMC_EVENT_XMTINTTMO, LMC_CSR_READ (sc, csr_status), 0);
680
681 sc->tx_TimeoutDisplay = 1;
682 sc->stats.tx_TimeoutCnt++;
683
684 /* DEC chip is stuck, hit it with a RESET!!!! */
685 lmc_running_reset (dev);
686
687
688 /* look at receive & transmit process state to make sure they are running */
689 LMC_EVENT_LOG(LMC_EVENT_RESET1, LMC_CSR_READ (sc, csr_status), 0);
690
691 /* look at: DSR - 02 for Reg 16
692 * CTS - 08
693 * DCD - 10
694 * RI - 20
695 * for Reg 17
696 */
697 LMC_EVENT_LOG(LMC_EVENT_RESET2, lmc_mii_readreg (sc, 0, 16), lmc_mii_readreg (sc, 0, 17));
698
699 /* reset the transmit timeout detection flag */
700 sc->tx_TimeoutInd = 0;
701 sc->lastlmc_taint_tx = sc->lmc_taint_tx;
702 sc->lasttx_packets = sc->stats.tx_packets;
703 }
704 else
705 {
706 sc->tx_TimeoutInd = 0;
707 sc->lastlmc_taint_tx = sc->lmc_taint_tx;
708 sc->lasttx_packets = sc->stats.tx_packets;
709 }
710
711 /* --- end time out check ----------------------------------- */
712
713
714 link_status = sc->lmc_media->get_link_status (sc);
715
716 /*
717 * hardware level link lost, but the interface is marked as up.
718 * Mark it as down.
719 */
720 if ((link_status == 0) && (sc->last_link_status != 0)) {
721 printk(KERN_WARNING "%s: hardware/physical link down\n", dev->name);
722 sc->last_link_status = 0;
723 /* lmc_reset (sc); Why reset??? The link can go down ok */
724
725 /* Inform the world that link has been lost */
726 dev->flags &= ~IFF_RUNNING;
727 }
728
729 /*
730 * hardware link is up, but the interface is marked as down.
731 * Bring it back up again.
732 */
733 if (link_status != 0 && sc->last_link_status == 0) {
734 printk(KERN_WARNING "%s: hardware/physical link up\n", dev->name);
735 sc->last_link_status = 1;
736 /* lmc_reset (sc); Again why reset??? */
737
738 /* Inform the world that link protocol is back up. */
739 dev->flags |= IFF_RUNNING;
740
741 /* Now we have to tell the syncppp that we had an outage
742 * and that it should deal. Calling sppp_reopen here
743 * should do the trick, but we may have to call sppp_close
744 * when the link goes down, and call sppp_open here.
745 * Subject to more testing.
746 * --bbraun
747 */
748
749 lmc_proto_reopen(sc);
750
751 }
752
753 /* Call media specific watchdog functions */
754 sc->lmc_media->watchdog(sc);
755
756 /*
757 * Poke the transmitter to make sure it
758 * never stops, even if we run out of mem
759 */
760 LMC_CSR_WRITE(sc, csr_rxpoll, 0);
761
762 /*
763 * Check for code that failed
764 * and try and fix it as appropriate
765 */
766 if(sc->failed_ring == 1){
767 /*
768 * Failed to setup the recv/xmit rin
769 * Try again
770 */
771 sc->failed_ring = 0;
772 lmc_softreset(sc);
773 }
774 if(sc->failed_recv_alloc == 1){
775 /*
776 * We failed to alloc mem in the
777 * interrupt handler, go through the rings
778 * and rebuild them
779 */
780 sc->failed_recv_alloc = 0;
781 lmc_softreset(sc);
782 }
783
784
785 /*
786 * remember the timer value
787 */
788kick_timer:
789
790 ticks = LMC_CSR_READ (sc, csr_gp_timer);
791 LMC_CSR_WRITE (sc, csr_gp_timer, 0xffffffffUL);
792 sc->ictl.ticks = 0x0000ffff - (ticks & 0x0000ffff);
793
794 /*
795 * restart this timer.
796 */
797 sc->timer.expires = jiffies + (HZ);
798 add_timer (&sc->timer);
799
800 spin_unlock_irqrestore(&sc->lmc_lock, flags);
801
802 lmc_trace(dev, "lmc_watchdog out");
803
804}
805
806static void lmc_setup(struct net_device * const dev) /*fold00*/
807{
808 lmc_trace(dev, "lmc_setup in");
809
810 dev->type = ARPHRD_HDLC;
811 dev->hard_start_xmit = lmc_start_xmit;
812 dev->open = lmc_open;
813 dev->stop = lmc_close;
814 dev->get_stats = lmc_get_stats;
815 dev->do_ioctl = lmc_ioctl;
816 dev->tx_timeout = lmc_driver_timeout;
817 dev->watchdog_timeo = (HZ); /* 1 second */
818
819 lmc_trace(dev, "lmc_setup out");
820}
821
822
823static int __devinit lmc_init_one(struct pci_dev *pdev,
824 const struct pci_device_id *ent)
825{
826 struct net_device *dev;
827 lmc_softc_t *sc;
828 u16 subdevice;
829 u_int16_t AdapModelNum;
830 int err = -ENOMEM;
831 static int cards_found;
832#ifndef GCOM
833 /* We name by type not by vendor */
834 static const char lmcname[] = "hdlc%d";
835#else
836 /*
837 * GCOM uses LMC vendor name so that clients can know which card
838 * to attach to.
839 */
840 static const char lmcname[] = "lmc%d";
841#endif
842
843
844 /*
845 * Allocate our own device structure
846 */
847 dev = alloc_netdev(sizeof(lmc_softc_t), lmcname, lmc_setup);
848 if (!dev) {
849 printk (KERN_ERR "lmc:alloc_netdev for device failed\n");
850 goto out1;
851 }
852
853 lmc_trace(dev, "lmc_init_one in");
854
855 err = pci_enable_device(pdev);
856 if (err) {
857 printk(KERN_ERR "lmc: pci enable failed:%d\n", err);
858 goto out2;
859 }
860
861 if (pci_request_regions(pdev, "lmc")) {
862 printk(KERN_ERR "lmc: pci_request_region failed\n");
863 err = -EIO;
864 goto out3;
865 }
866
867 pci_set_drvdata(pdev, dev);
868
869 if(lmc_first_load == 0){
870 printk(KERN_INFO "Lan Media Corporation WAN Driver Version %d.%d.%d\n",
871 DRIVER_MAJOR_VERSION, DRIVER_MINOR_VERSION,DRIVER_SUB_VERSION);
872 lmc_first_load = 1;
873 }
874
875 sc = dev->priv;
876 sc->lmc_device = dev;
877 sc->name = dev->name;
878
879 /* Initialize the sppp layer */
880 /* An ioctl can cause a subsequent detach for raw frame interface */
881 sc->if_type = LMC_PPP;
882 sc->check = 0xBEAFCAFE;
883 dev->base_addr = pci_resource_start(pdev, 0);
884 dev->irq = pdev->irq;
885
886 SET_MODULE_OWNER(dev);
887 SET_NETDEV_DEV(dev, &pdev->dev);
888
889 /*
890 * This will get the protocol layer ready and do any 1 time init's
891 * Must have a valid sc and dev structure
892 */
893 lmc_proto_init(sc);
894
895 lmc_proto_attach(sc);
896
897 /*
898 * Why were we changing this???
899 dev->tx_queue_len = 100;
900 */
901
902 /* Init the spin lock so can call it latter */
903
904 spin_lock_init(&sc->lmc_lock);
905 pci_set_master(pdev);
906
907 printk ("%s: detected at %lx, irq %d\n", dev->name,
908 dev->base_addr, dev->irq);
909
910 if (register_netdev (dev) != 0) {
911 printk (KERN_ERR "%s: register_netdev failed.\n", dev->name);
912 goto out4;
913 }
914
915 sc->lmc_cardtype = LMC_CARDTYPE_UNKNOWN;
916 sc->lmc_timing = LMC_CTL_CLOCK_SOURCE_EXT;
917
918 /*
919 *
920 * Check either the subvendor or the subdevice, some systems reverse
921 * the setting in the bois, seems to be version and arch dependent?
922 * Fix the error, exchange the two values
923 */
924 if ((subdevice = pdev->subsystem_device) == PCI_VENDOR_ID_LMC)
925 subdevice = pdev->subsystem_vendor;
926
927 switch (subdevice) {
928 case PCI_DEVICE_ID_LMC_HSSI:
929 printk ("%s: LMC HSSI\n", dev->name);
930 sc->lmc_cardtype = LMC_CARDTYPE_HSSI;
931 sc->lmc_media = &lmc_hssi_media;
932 break;
933 case PCI_DEVICE_ID_LMC_DS3:
934 printk ("%s: LMC DS3\n", dev->name);
935 sc->lmc_cardtype = LMC_CARDTYPE_DS3;
936 sc->lmc_media = &lmc_ds3_media;
937 break;
938 case PCI_DEVICE_ID_LMC_SSI:
939 printk ("%s: LMC SSI\n", dev->name);
940 sc->lmc_cardtype = LMC_CARDTYPE_SSI;
941 sc->lmc_media = &lmc_ssi_media;
942 break;
943 case PCI_DEVICE_ID_LMC_T1:
944 printk ("%s: LMC T1\n", dev->name);
945 sc->lmc_cardtype = LMC_CARDTYPE_T1;
946 sc->lmc_media = &lmc_t1_media;
947 break;
948 default:
949 printk (KERN_WARNING "%s: LMC UNKOWN CARD!\n", dev->name);
950 break;
951 }
952
953 lmc_initcsrs (sc, dev->base_addr, 8);
954
955 lmc_gpio_mkinput (sc, 0xff);
956 sc->lmc_gpio = 0; /* drive no signals yet */
957
958 sc->lmc_media->defaults (sc);
959
960 sc->lmc_media->set_link_status (sc, LMC_LINK_UP);
961
962 /* verify that the PCI Sub System ID matches the Adapter Model number
963 * from the MII register
964 */
965 AdapModelNum = (lmc_mii_readreg (sc, 0, 3) & 0x3f0) >> 4;
966
967 if ((AdapModelNum == LMC_ADAP_T1
968 && subdevice == PCI_DEVICE_ID_LMC_T1) || /* detect LMC1200 */
969 (AdapModelNum == LMC_ADAP_SSI
970 && subdevice == PCI_DEVICE_ID_LMC_SSI) || /* detect LMC1000 */
971 (AdapModelNum == LMC_ADAP_DS3
972 && subdevice == PCI_DEVICE_ID_LMC_DS3) || /* detect LMC5245 */
973 (AdapModelNum == LMC_ADAP_HSSI
974 && subdevice == PCI_DEVICE_ID_LMC_HSSI))
975 { /* detect LMC5200 */
976
977 }
978 else {
979 printk ("%s: Model number (%d) miscompare for PCI Subsystem ID = 0x%04x\n",
980 dev->name, AdapModelNum, subdevice);
981// return (NULL);
982 }
983 /*
984 * reset clock
985 */
986 LMC_CSR_WRITE (sc, csr_gp_timer, 0xFFFFFFFFUL);
987
988 sc->board_idx = cards_found++;
989 sc->stats.check = STATCHECK;
990 sc->stats.version_size = (DRIVER_VERSION << 16) +
991 sizeof (struct lmc_statistics);
992 sc->stats.lmc_cardtype = sc->lmc_cardtype;
993
994 sc->lmc_ok = 0;
995 sc->last_link_status = 0;
996
997 lmc_trace(dev, "lmc_init_one out");
998 return 0;
999
1000 out4:
1001 lmc_proto_detach(sc);
1002 out3:
1003 if (pdev) {
1004 pci_release_regions(pdev);
1005 pci_set_drvdata(pdev, NULL);
1006 }
1007 out2:
1008 free_netdev(dev);
1009 out1:
1010 return err;
1011}
1012
1013/*
1014 * Called from pci when removing module.
1015 */
1016static void __devexit lmc_remove_one (struct pci_dev *pdev)
1017{
1018 struct net_device *dev = pci_get_drvdata(pdev);
1019
1020 if (dev) {
1021 lmc_softc_t *sc = dev->priv;
1022
1023 printk("%s: removing...\n", dev->name);
1024 lmc_proto_detach(sc);
1025 unregister_netdev(dev);
1026 free_netdev(dev);
1027 pci_release_regions(pdev);
1028 pci_disable_device(pdev);
1029 pci_set_drvdata(pdev, NULL);
1030 }
1031}
1032
1033/* After this is called, packets can be sent.
1034 * Does not initialize the addresses
1035 */
1036static int lmc_open (struct net_device *dev) /*fold00*/
1037{
1038 lmc_softc_t *sc = dev->priv;
1039
1040 lmc_trace(dev, "lmc_open in");
1041
1042 lmc_led_on(sc, LMC_DS3_LED0);
1043
1044 lmc_dec_reset (sc);
1045 lmc_reset (sc);
1046
1047 LMC_EVENT_LOG(LMC_EVENT_RESET1, LMC_CSR_READ (sc, csr_status), 0);
1048 LMC_EVENT_LOG(LMC_EVENT_RESET2,
1049 lmc_mii_readreg (sc, 0, 16),
1050 lmc_mii_readreg (sc, 0, 17));
1051
1052
1053 if (sc->lmc_ok){
1054 lmc_trace(dev, "lmc_open lmc_ok out");
1055 return (0);
1056 }
1057
1058 lmc_softreset (sc);
1059
1060 /* Since we have to use PCI bus, this should work on x86,alpha,ppc */
1061 if (request_irq (dev->irq, &lmc_interrupt, SA_SHIRQ, dev->name, dev)){
1062 printk(KERN_WARNING "%s: could not get irq: %d\n", dev->name, dev->irq);
1063 lmc_trace(dev, "lmc_open irq failed out");
1064 return -EAGAIN;
1065 }
1066 sc->got_irq = 1;
1067
1068 /* Assert Terminal Active */
1069 sc->lmc_miireg16 |= LMC_MII16_LED_ALL;
1070 sc->lmc_media->set_link_status (sc, LMC_LINK_UP);
1071
1072 /*
1073 * reset to last state.
1074 */
1075 sc->lmc_media->set_status (sc, NULL);
1076
1077 /* setup default bits to be used in tulip_desc_t transmit descriptor
1078 * -baz */
1079 sc->TxDescriptControlInit = (
1080 LMC_TDES_INTERRUPT_ON_COMPLETION
1081 | LMC_TDES_FIRST_SEGMENT
1082 | LMC_TDES_LAST_SEGMENT
1083 | LMC_TDES_SECOND_ADDR_CHAINED
1084 | LMC_TDES_DISABLE_PADDING
1085 );
1086
1087 if (sc->ictl.crc_length == LMC_CTL_CRC_LENGTH_16) {
1088 /* disable 32 bit CRC generated by ASIC */
1089 sc->TxDescriptControlInit |= LMC_TDES_ADD_CRC_DISABLE;
1090 }
1091 sc->lmc_media->set_crc_length(sc, sc->ictl.crc_length);
1092 /* Acknoledge the Terminal Active and light LEDs */
1093
1094 /* dev->flags |= IFF_UP; */
1095
1096 lmc_proto_open(sc);
1097
1098 dev->do_ioctl = lmc_ioctl;
1099
1100
1101 netif_start_queue(dev);
1102
1103 sc->stats.tx_tbusy0++ ;
1104
1105 /*
1106 * select what interrupts we want to get
1107 */
1108 sc->lmc_intrmask = 0;
1109 /* Should be using the default interrupt mask defined in the .h file. */
1110 sc->lmc_intrmask |= (TULIP_STS_NORMALINTR
1111 | TULIP_STS_RXINTR
1112 | TULIP_STS_TXINTR
1113 | TULIP_STS_ABNRMLINTR
1114 | TULIP_STS_SYSERROR
1115 | TULIP_STS_TXSTOPPED
1116 | TULIP_STS_TXUNDERFLOW
1117 | TULIP_STS_RXSTOPPED
1118 | TULIP_STS_RXNOBUF
1119 );
1120 LMC_CSR_WRITE (sc, csr_intr, sc->lmc_intrmask);
1121
1122 sc->lmc_cmdmode |= TULIP_CMD_TXRUN;
1123 sc->lmc_cmdmode |= TULIP_CMD_RXRUN;
1124 LMC_CSR_WRITE (sc, csr_command, sc->lmc_cmdmode);
1125
1126 sc->lmc_ok = 1; /* Run watchdog */
1127
1128 /*
1129 * Set the if up now - pfb
1130 */
1131
1132 sc->last_link_status = 1;
1133
1134 /*
1135 * Setup a timer for the watchdog on probe, and start it running.
1136 * Since lmc_ok == 0, it will be a NOP for now.
1137 */
1138 init_timer (&sc->timer);
1139 sc->timer.expires = jiffies + HZ;
1140 sc->timer.data = (unsigned long) dev;
1141 sc->timer.function = &lmc_watchdog;
1142 add_timer (&sc->timer);
1143
1144 lmc_trace(dev, "lmc_open out");
1145
1146 return (0);
1147}
1148
1149/* Total reset to compensate for the AdTran DSU doing bad things
1150 * under heavy load
1151 */
1152
1153static void lmc_running_reset (struct net_device *dev) /*fold00*/
1154{
1155
1156 lmc_softc_t *sc = (lmc_softc_t *) dev->priv;
1157
1158 lmc_trace(dev, "lmc_runnig_reset in");
1159
1160 /* stop interrupts */
1161 /* Clear the interrupt mask */
1162 LMC_CSR_WRITE (sc, csr_intr, 0x00000000);
1163
1164 lmc_dec_reset (sc);
1165 lmc_reset (sc);
1166 lmc_softreset (sc);
1167 /* sc->lmc_miireg16 |= LMC_MII16_LED_ALL; */
1168 sc->lmc_media->set_link_status (sc, 1);
1169 sc->lmc_media->set_status (sc, NULL);
1170
1171 //dev->flags |= IFF_RUNNING;
1172
1173 netif_wake_queue(dev);
1174
1175 sc->lmc_txfull = 0;
1176 sc->stats.tx_tbusy0++ ;
1177
1178 sc->lmc_intrmask = TULIP_DEFAULT_INTR_MASK;
1179 LMC_CSR_WRITE (sc, csr_intr, sc->lmc_intrmask);
1180
1181 sc->lmc_cmdmode |= (TULIP_CMD_TXRUN | TULIP_CMD_RXRUN);
1182 LMC_CSR_WRITE (sc, csr_command, sc->lmc_cmdmode);
1183
1184 lmc_trace(dev, "lmc_runnin_reset_out");
1185}
1186
1187
1188/* This is what is called when you ifconfig down a device.
1189 * This disables the timer for the watchdog and keepalives,
1190 * and disables the irq for dev.
1191 */
1192static int lmc_close (struct net_device *dev) /*fold00*/
1193{
1194 /* not calling release_region() as we should */
1195 lmc_softc_t *sc;
1196
1197 lmc_trace(dev, "lmc_close in");
1198
1199 sc = dev->priv;
1200 sc->lmc_ok = 0;
1201 sc->lmc_media->set_link_status (sc, 0);
1202 del_timer (&sc->timer);
1203 lmc_proto_close(sc);
1204 lmc_ifdown (dev);
1205
1206 lmc_trace(dev, "lmc_close out");
1207
1208 return 0;
1209}
1210
1211/* Ends the transfer of packets */
1212/* When the interface goes down, this is called */
1213static int lmc_ifdown (struct net_device *dev) /*fold00*/
1214{
1215 lmc_softc_t *sc = dev->priv;
1216 u32 csr6;
1217 int i;
1218
1219 lmc_trace(dev, "lmc_ifdown in");
1220
1221 /* Don't let anything else go on right now */
1222 // dev->start = 0;
1223 netif_stop_queue(dev);
1224 sc->stats.tx_tbusy1++ ;
1225
1226 /* stop interrupts */
1227 /* Clear the interrupt mask */
1228 LMC_CSR_WRITE (sc, csr_intr, 0x00000000);
1229
1230 /* Stop Tx and Rx on the chip */
1231 csr6 = LMC_CSR_READ (sc, csr_command);
1232 csr6 &= ~LMC_DEC_ST; /* Turn off the Transmission bit */
1233 csr6 &= ~LMC_DEC_SR; /* Turn off the Receive bit */
1234 LMC_CSR_WRITE (sc, csr_command, csr6);
1235
1236 dev->flags &= ~IFF_RUNNING;
1237
1238 sc->stats.rx_missed_errors +=
1239 LMC_CSR_READ (sc, csr_missed_frames) & 0xffff;
1240
1241 /* release the interrupt */
1242 if(sc->got_irq == 1){
1243 free_irq (dev->irq, dev);
1244 sc->got_irq = 0;
1245 }
1246
1247 /* free skbuffs in the Rx queue */
1248 for (i = 0; i < LMC_RXDESCS; i++)
1249 {
1250 struct sk_buff *skb = sc->lmc_rxq[i];
1251 sc->lmc_rxq[i] = NULL;
1252 sc->lmc_rxring[i].status = 0;
1253 sc->lmc_rxring[i].length = 0;
1254 sc->lmc_rxring[i].buffer1 = 0xDEADBEEF;
1255 if (skb != NULL)
1256 dev_kfree_skb(skb);
1257 sc->lmc_rxq[i] = NULL;
1258 }
1259
1260 for (i = 0; i < LMC_TXDESCS; i++)
1261 {
1262 if (sc->lmc_txq[i] != NULL)
1263 dev_kfree_skb(sc->lmc_txq[i]);
1264 sc->lmc_txq[i] = NULL;
1265 }
1266
1267 lmc_led_off (sc, LMC_MII16_LED_ALL);
1268
1269 netif_wake_queue(dev);
1270 sc->stats.tx_tbusy0++ ;
1271
1272 lmc_trace(dev, "lmc_ifdown out");
1273
1274 return 0;
1275}
1276
1277/* Interrupt handling routine. This will take an incoming packet, or clean
1278 * up after a trasmit.
1279 */
1280static irqreturn_t lmc_interrupt (int irq, void *dev_instance, struct pt_regs *regs) /*fold00*/
1281{
1282 struct net_device *dev = (struct net_device *) dev_instance;
1283 lmc_softc_t *sc;
1284 u32 csr;
1285 int i;
1286 s32 stat;
1287 unsigned int badtx;
1288 u32 firstcsr;
1289 int max_work = LMC_RXDESCS;
1290 int handled = 0;
1291
1292 lmc_trace(dev, "lmc_interrupt in");
1293
1294 sc = dev->priv;
1295
1296 spin_lock(&sc->lmc_lock);
1297
1298 /*
1299 * Read the csr to find what interrupts we have (if any)
1300 */
1301 csr = LMC_CSR_READ (sc, csr_status);
1302
1303 /*
1304 * Make sure this is our interrupt
1305 */
1306 if ( ! (csr & sc->lmc_intrmask)) {
1307 goto lmc_int_fail_out;
1308 }
1309
1310 firstcsr = csr;
1311
1312 /* always go through this loop at least once */
1313 while (csr & sc->lmc_intrmask) {
1314 handled = 1;
1315
1316 /*
1317 * Clear interrupt bits, we handle all case below
1318 */
1319 LMC_CSR_WRITE (sc, csr_status, csr);
1320
1321 /*
1322 * One of
1323 * - Transmit process timed out CSR5<1>
1324 * - Transmit jabber timeout CSR5<3>
1325 * - Transmit underflow CSR5<5>
1326 * - Transmit Receiver buffer unavailable CSR5<7>
1327 * - Receive process stopped CSR5<8>
1328 * - Receive watchdog timeout CSR5<9>
1329 * - Early transmit interrupt CSR5<10>
1330 *
1331 * Is this really right? Should we do a running reset for jabber?
1332 * (being a WAN card and all)
1333 */
1334 if (csr & TULIP_STS_ABNRMLINTR){
1335 lmc_running_reset (dev);
1336 break;
1337 }
1338
1339 if (csr & TULIP_STS_RXINTR){
1340 lmc_trace(dev, "rx interrupt");
1341 lmc_rx (dev);
1342
1343 }
1344 if (csr & (TULIP_STS_TXINTR | TULIP_STS_TXNOBUF | TULIP_STS_TXSTOPPED)) {
1345
1346 int n_compl = 0 ;
1347 /* reset the transmit timeout detection flag -baz */
1348 sc->stats.tx_NoCompleteCnt = 0;
1349
1350 badtx = sc->lmc_taint_tx;
1351 i = badtx % LMC_TXDESCS;
1352
1353 while ((badtx < sc->lmc_next_tx)) {
1354 stat = sc->lmc_txring[i].status;
1355
1356 LMC_EVENT_LOG (LMC_EVENT_XMTINT, stat,
1357 sc->lmc_txring[i].length);
1358 /*
1359 * If bit 31 is 1 the tulip owns it break out of the loop
1360 */
1361 if (stat & 0x80000000)
1362 break;
1363
1364 n_compl++ ; /* i.e., have an empty slot in ring */
1365 /*
1366 * If we have no skbuff or have cleared it
1367 * Already continue to the next buffer
1368 */
1369 if (sc->lmc_txq[i] == NULL)
1370 continue;
1371
1372 /*
1373 * Check the total error summary to look for any errors
1374 */
1375 if (stat & 0x8000) {
1376 sc->stats.tx_errors++;
1377 if (stat & 0x4104)
1378 sc->stats.tx_aborted_errors++;
1379 if (stat & 0x0C00)
1380 sc->stats.tx_carrier_errors++;
1381 if (stat & 0x0200)
1382 sc->stats.tx_window_errors++;
1383 if (stat & 0x0002)
1384 sc->stats.tx_fifo_errors++;
1385 }
1386 else {
1387
1388 sc->stats.tx_bytes += sc->lmc_txring[i].length & 0x7ff;
1389
1390 sc->stats.tx_packets++;
1391 }
1392
1393 // dev_kfree_skb(sc->lmc_txq[i]);
1394 dev_kfree_skb_irq(sc->lmc_txq[i]);
1395 sc->lmc_txq[i] = NULL;
1396
1397 badtx++;
1398 i = badtx % LMC_TXDESCS;
1399 }
1400
1401 if (sc->lmc_next_tx - badtx > LMC_TXDESCS)
1402 {
1403 printk ("%s: out of sync pointer\n", dev->name);
1404 badtx += LMC_TXDESCS;
1405 }
1406 LMC_EVENT_LOG(LMC_EVENT_TBUSY0, n_compl, 0);
1407 sc->lmc_txfull = 0;
1408 netif_wake_queue(dev);
1409 sc->stats.tx_tbusy0++ ;
1410
1411
1412#ifdef DEBUG
1413 sc->stats.dirtyTx = badtx;
1414 sc->stats.lmc_next_tx = sc->lmc_next_tx;
1415 sc->stats.lmc_txfull = sc->lmc_txfull;
1416#endif
1417 sc->lmc_taint_tx = badtx;
1418
1419 /*
1420 * Why was there a break here???
1421 */
1422 } /* end handle transmit interrupt */
1423
1424 if (csr & TULIP_STS_SYSERROR) {
1425 u32 error;
1426 printk (KERN_WARNING "%s: system bus error csr: %#8.8x\n", dev->name, csr);
1427 error = csr>>23 & 0x7;
1428 switch(error){
1429 case 0x000:
1430 printk(KERN_WARNING "%s: Parity Fault (bad)\n", dev->name);
1431 break;
1432 case 0x001:
1433 printk(KERN_WARNING "%s: Master Abort (naughty)\n", dev->name);
1434 break;
1435 case 0x010:
1436 printk(KERN_WARNING "%s: Target Abort (not so naughty)\n", dev->name);
1437 break;
1438 default:
1439 printk(KERN_WARNING "%s: This bus error code was supposed to be reserved!\n", dev->name);
1440 }
1441 lmc_dec_reset (sc);
1442 lmc_reset (sc);
1443 LMC_EVENT_LOG(LMC_EVENT_RESET1, LMC_CSR_READ (sc, csr_status), 0);
1444 LMC_EVENT_LOG(LMC_EVENT_RESET2,
1445 lmc_mii_readreg (sc, 0, 16),
1446 lmc_mii_readreg (sc, 0, 17));
1447
1448 }
1449
1450
1451 if(max_work-- <= 0)
1452 break;
1453
1454 /*
1455 * Get current csr status to make sure
1456 * we've cleared all interrupts
1457 */
1458 csr = LMC_CSR_READ (sc, csr_status);
1459 } /* end interrupt loop */
1460 LMC_EVENT_LOG(LMC_EVENT_INT, firstcsr, csr);
1461
1462lmc_int_fail_out:
1463
1464 spin_unlock(&sc->lmc_lock);
1465
1466 lmc_trace(dev, "lmc_interrupt out");
1467 return IRQ_RETVAL(handled);
1468}
1469
1470static int lmc_start_xmit (struct sk_buff *skb, struct net_device *dev) /*fold00*/
1471{
1472 lmc_softc_t *sc;
1473 u32 flag;
1474 int entry;
1475 int ret = 0;
1476 unsigned long flags;
1477
1478 lmc_trace(dev, "lmc_start_xmit in");
1479
1480 sc = dev->priv;
1481
1482 spin_lock_irqsave(&sc->lmc_lock, flags);
1483
1484 /* normal path, tbusy known to be zero */
1485
1486 entry = sc->lmc_next_tx % LMC_TXDESCS;
1487
1488 sc->lmc_txq[entry] = skb;
1489 sc->lmc_txring[entry].buffer1 = virt_to_bus (skb->data);
1490
1491 LMC_CONSOLE_LOG("xmit", skb->data, skb->len);
1492
1493#ifndef GCOM
1494 /* If the queue is less than half full, don't interrupt */
1495 if (sc->lmc_next_tx - sc->lmc_taint_tx < LMC_TXDESCS / 2)
1496 {
1497 /* Do not interrupt on completion of this packet */
1498 flag = 0x60000000;
1499 netif_wake_queue(dev);
1500 }
1501 else if (sc->lmc_next_tx - sc->lmc_taint_tx == LMC_TXDESCS / 2)
1502 {
1503 /* This generates an interrupt on completion of this packet */
1504 flag = 0xe0000000;
1505 netif_wake_queue(dev);
1506 }
1507 else if (sc->lmc_next_tx - sc->lmc_taint_tx < LMC_TXDESCS - 1)
1508 {
1509 /* Do not interrupt on completion of this packet */
1510 flag = 0x60000000;
1511 netif_wake_queue(dev);
1512 }
1513 else
1514 {
1515 /* This generates an interrupt on completion of this packet */
1516 flag = 0xe0000000;
1517 sc->lmc_txfull = 1;
1518 netif_stop_queue(dev);
1519 }
1520#else
1521 flag = LMC_TDES_INTERRUPT_ON_COMPLETION;
1522
1523 if (sc->lmc_next_tx - sc->lmc_taint_tx >= LMC_TXDESCS - 1)
1524 { /* ring full, go busy */
1525 sc->lmc_txfull = 1;
1526 netif_stop_queue(dev);
1527 sc->stats.tx_tbusy1++ ;
1528 LMC_EVENT_LOG(LMC_EVENT_TBUSY1, entry, 0);
1529 }
1530#endif
1531
1532
1533 if (entry == LMC_TXDESCS - 1) /* last descriptor in ring */
1534 flag |= LMC_TDES_END_OF_RING; /* flag as such for Tulip */
1535
1536 /* don't pad small packets either */
1537 flag = sc->lmc_txring[entry].length = (skb->len) | flag |
1538 sc->TxDescriptControlInit;
1539
1540 /* set the transmit timeout flag to be checked in
1541 * the watchdog timer handler. -baz
1542 */
1543
1544 sc->stats.tx_NoCompleteCnt++;
1545 sc->lmc_next_tx++;
1546
1547 /* give ownership to the chip */
1548 LMC_EVENT_LOG(LMC_EVENT_XMT, flag, entry);
1549 sc->lmc_txring[entry].status = 0x80000000;
1550
1551 /* send now! */
1552 LMC_CSR_WRITE (sc, csr_txpoll, 0);
1553
1554 dev->trans_start = jiffies;
1555
1556 spin_unlock_irqrestore(&sc->lmc_lock, flags);
1557
1558 lmc_trace(dev, "lmc_start_xmit_out");
1559 return ret;
1560}
1561
1562
1563static int lmc_rx (struct net_device *dev) /*fold00*/
1564{
1565 lmc_softc_t *sc;
1566 int i;
1567 int rx_work_limit = LMC_RXDESCS;
1568 unsigned int next_rx;
1569 int rxIntLoopCnt; /* debug -baz */
1570 int localLengthErrCnt = 0;
1571 long stat;
1572 struct sk_buff *skb, *nsb;
1573 u16 len;
1574
1575 lmc_trace(dev, "lmc_rx in");
1576
1577 sc = dev->priv;
1578
1579 lmc_led_on(sc, LMC_DS3_LED3);
1580
1581 rxIntLoopCnt = 0; /* debug -baz */
1582
1583 i = sc->lmc_next_rx % LMC_RXDESCS;
1584 next_rx = sc->lmc_next_rx;
1585
1586 while (((stat = sc->lmc_rxring[i].status) & LMC_RDES_OWN_BIT) != DESC_OWNED_BY_DC21X4)
1587 {
1588 rxIntLoopCnt++; /* debug -baz */
1589 len = ((stat & LMC_RDES_FRAME_LENGTH) >> RDES_FRAME_LENGTH_BIT_NUMBER);
1590 if ((stat & 0x0300) != 0x0300) { /* Check first segment and last segment */
1591 if ((stat & 0x0000ffff) != 0x7fff) {
1592 /* Oversized frame */
1593 sc->stats.rx_length_errors++;
1594 goto skip_packet;
1595 }
1596 }
1597
1598 if(stat & 0x00000008){ /* Catch a dribbling bit error */
1599 sc->stats.rx_errors++;
1600 sc->stats.rx_frame_errors++;
1601 goto skip_packet;
1602 }
1603
1604
1605 if(stat & 0x00000004){ /* Catch a CRC error by the Xilinx */
1606 sc->stats.rx_errors++;
1607 sc->stats.rx_crc_errors++;
1608 goto skip_packet;
1609 }
1610
1611
1612 if (len > LMC_PKT_BUF_SZ){
1613 sc->stats.rx_length_errors++;
1614 localLengthErrCnt++;
1615 goto skip_packet;
1616 }
1617
1618 if (len < sc->lmc_crcSize + 2) {
1619 sc->stats.rx_length_errors++;
1620 sc->stats.rx_SmallPktCnt++;
1621 localLengthErrCnt++;
1622 goto skip_packet;
1623 }
1624
1625 if(stat & 0x00004000){
1626 printk(KERN_WARNING "%s: Receiver descriptor error, receiver out of sync?\n", dev->name);
1627 }
1628
1629 len -= sc->lmc_crcSize;
1630
1631 skb = sc->lmc_rxq[i];
1632
1633 /*
1634 * We ran out of memory at some point
1635 * just allocate an skb buff and continue.
1636 */
1637
1638 if(skb == 0x0){
1639 nsb = dev_alloc_skb (LMC_PKT_BUF_SZ + 2);
1640 if (nsb) {
1641 sc->lmc_rxq[i] = nsb;
1642 nsb->dev = dev;
1643 sc->lmc_rxring[i].buffer1 = virt_to_bus (nsb->tail);
1644 }
1645 sc->failed_recv_alloc = 1;
1646 goto skip_packet;
1647 }
1648
1649 dev->last_rx = jiffies;
1650 sc->stats.rx_packets++;
1651 sc->stats.rx_bytes += len;
1652
1653 LMC_CONSOLE_LOG("recv", skb->data, len);
1654
1655 /*
1656 * I'm not sure of the sanity of this
1657 * Packets could be arriving at a constant
1658 * 44.210mbits/sec and we're going to copy
1659 * them into a new buffer??
1660 */
1661
1662 if(len > (LMC_MTU - (LMC_MTU>>2))){ /* len > LMC_MTU * 0.75 */
1663 /*
1664 * If it's a large packet don't copy it just hand it up
1665 */
1666 give_it_anyways:
1667
1668 sc->lmc_rxq[i] = NULL;
1669 sc->lmc_rxring[i].buffer1 = 0x0;
1670
1671 skb_put (skb, len);
1672 skb->protocol = lmc_proto_type(sc, skb);
1673 skb->protocol = htons(ETH_P_WAN_PPP);
1674 skb->mac.raw = skb->data;
1675// skb->nh.raw = skb->data;
1676 skb->dev = dev;
1677 lmc_proto_netif(sc, skb);
1678
1679 /*
1680 * This skb will be destroyed by the upper layers, make a new one
1681 */
1682 nsb = dev_alloc_skb (LMC_PKT_BUF_SZ + 2);
1683 if (nsb) {
1684 sc->lmc_rxq[i] = nsb;
1685 nsb->dev = dev;
1686 sc->lmc_rxring[i].buffer1 = virt_to_bus (nsb->tail);
1687 /* Transferred to 21140 below */
1688 }
1689 else {
1690 /*
1691 * We've run out of memory, stop trying to allocate
1692 * memory and exit the interrupt handler
1693 *
1694 * The chip may run out of receivers and stop
1695 * in which care we'll try to allocate the buffer
1696 * again. (once a second)
1697 */
1698 sc->stats.rx_BuffAllocErr++;
1699 LMC_EVENT_LOG(LMC_EVENT_RCVINT, stat, len);
1700 sc->failed_recv_alloc = 1;
1701 goto skip_out_of_mem;
1702 }
1703 }
1704 else {
1705 nsb = dev_alloc_skb(len);
1706 if(!nsb) {
1707 goto give_it_anyways;
1708 }
1709 memcpy(skb_put(nsb, len), skb->data, len);
1710
1711 nsb->protocol = lmc_proto_type(sc, skb);
1712 nsb->mac.raw = nsb->data;
1713// nsb->nh.raw = nsb->data;
1714 nsb->dev = dev;
1715 lmc_proto_netif(sc, nsb);
1716 }
1717
1718 skip_packet:
1719 LMC_EVENT_LOG(LMC_EVENT_RCVINT, stat, len);
1720 sc->lmc_rxring[i].status = DESC_OWNED_BY_DC21X4;
1721
1722 sc->lmc_next_rx++;
1723 i = sc->lmc_next_rx % LMC_RXDESCS;
1724 rx_work_limit--;
1725 if (rx_work_limit < 0)
1726 break;
1727 }
1728
1729 /* detect condition for LMC1000 where DSU cable attaches and fills
1730 * descriptors with bogus packets
1731 *
1732 if (localLengthErrCnt > LMC_RXDESCS - 3) {
1733 sc->stats.rx_BadPktSurgeCnt++;
1734 LMC_EVENT_LOG(LMC_EVENT_BADPKTSURGE,
1735 localLengthErrCnt,
1736 sc->stats.rx_BadPktSurgeCnt);
1737 } */
1738
1739 /* save max count of receive descriptors serviced */
1740 if (rxIntLoopCnt > sc->stats.rxIntLoopCnt) {
1741 sc->stats.rxIntLoopCnt = rxIntLoopCnt; /* debug -baz */
1742 }
1743
1744#ifdef DEBUG
1745 if (rxIntLoopCnt == 0)
1746 {
1747 for (i = 0; i < LMC_RXDESCS; i++)
1748 {
1749 if ((sc->lmc_rxring[i].status & LMC_RDES_OWN_BIT)
1750 != DESC_OWNED_BY_DC21X4)
1751 {
1752 rxIntLoopCnt++;
1753 }
1754 }
1755 LMC_EVENT_LOG(LMC_EVENT_RCVEND, rxIntLoopCnt, 0);
1756 }
1757#endif
1758
1759
1760 lmc_led_off(sc, LMC_DS3_LED3);
1761
1762skip_out_of_mem:
1763
1764 lmc_trace(dev, "lmc_rx out");
1765
1766 return 0;
1767}
1768
1769static struct net_device_stats *lmc_get_stats (struct net_device *dev) /*fold00*/
1770{
1771 lmc_softc_t *sc = dev->priv;
1772 unsigned long flags;
1773
1774 lmc_trace(dev, "lmc_get_stats in");
1775
1776
1777 spin_lock_irqsave(&sc->lmc_lock, flags);
1778
1779 sc->stats.rx_missed_errors += LMC_CSR_READ (sc, csr_missed_frames) & 0xffff;
1780
1781 spin_unlock_irqrestore(&sc->lmc_lock, flags);
1782
1783 lmc_trace(dev, "lmc_get_stats out");
1784
1785 return (struct net_device_stats *) &sc->stats;
1786}
1787
1788static struct pci_driver lmc_driver = {
1789 .name = "lmc",
1790 .id_table = lmc_pci_tbl,
1791 .probe = lmc_init_one,
1792 .remove = __devexit_p(lmc_remove_one),
1793};
1794
1795static int __init init_lmc(void)
1796{
1797 return pci_module_init(&lmc_driver);
1798}
1799
1800static void __exit exit_lmc(void)
1801{
1802 pci_unregister_driver(&lmc_driver);
1803}
1804
1805module_init(init_lmc);
1806module_exit(exit_lmc);
1807
1808unsigned lmc_mii_readreg (lmc_softc_t * const sc, unsigned devaddr, unsigned regno) /*fold00*/
1809{
1810 int i;
1811 int command = (0xf6 << 10) | (devaddr << 5) | regno;
1812 int retval = 0;
1813
1814 lmc_trace(sc->lmc_device, "lmc_mii_readreg in");
1815
1816 LMC_MII_SYNC (sc);
1817
1818 lmc_trace(sc->lmc_device, "lmc_mii_readreg: done sync");
1819
1820 for (i = 15; i >= 0; i--)
1821 {
1822 int dataval = (command & (1 << i)) ? 0x20000 : 0;
1823
1824 LMC_CSR_WRITE (sc, csr_9, dataval);
1825 lmc_delay ();
1826 /* __SLOW_DOWN_IO; */
1827 LMC_CSR_WRITE (sc, csr_9, dataval | 0x10000);
1828 lmc_delay ();
1829 /* __SLOW_DOWN_IO; */
1830 }
1831
1832 lmc_trace(sc->lmc_device, "lmc_mii_readreg: done1");
1833
1834 for (i = 19; i > 0; i--)
1835 {
1836 LMC_CSR_WRITE (sc, csr_9, 0x40000);
1837 lmc_delay ();
1838 /* __SLOW_DOWN_IO; */
1839 retval = (retval << 1) | ((LMC_CSR_READ (sc, csr_9) & 0x80000) ? 1 : 0);
1840 LMC_CSR_WRITE (sc, csr_9, 0x40000 | 0x10000);
1841 lmc_delay ();
1842 /* __SLOW_DOWN_IO; */
1843 }
1844
1845 lmc_trace(sc->lmc_device, "lmc_mii_readreg out");
1846
1847 return (retval >> 1) & 0xffff;
1848}
1849
1850void lmc_mii_writereg (lmc_softc_t * const sc, unsigned devaddr, unsigned regno, unsigned data) /*fold00*/
1851{
1852 int i = 32;
1853 int command = (0x5002 << 16) | (devaddr << 23) | (regno << 18) | data;
1854
1855 lmc_trace(sc->lmc_device, "lmc_mii_writereg in");
1856
1857 LMC_MII_SYNC (sc);
1858
1859 i = 31;
1860 while (i >= 0)
1861 {
1862 int datav;
1863
1864 if (command & (1 << i))
1865 datav = 0x20000;
1866 else
1867 datav = 0x00000;
1868
1869 LMC_CSR_WRITE (sc, csr_9, datav);
1870 lmc_delay ();
1871 /* __SLOW_DOWN_IO; */
1872 LMC_CSR_WRITE (sc, csr_9, (datav | 0x10000));
1873 lmc_delay ();
1874 /* __SLOW_DOWN_IO; */
1875 i--;
1876 }
1877
1878 i = 2;
1879 while (i > 0)
1880 {
1881 LMC_CSR_WRITE (sc, csr_9, 0x40000);
1882 lmc_delay ();
1883 /* __SLOW_DOWN_IO; */
1884 LMC_CSR_WRITE (sc, csr_9, 0x50000);
1885 lmc_delay ();
1886 /* __SLOW_DOWN_IO; */
1887 i--;
1888 }
1889
1890 lmc_trace(sc->lmc_device, "lmc_mii_writereg out");
1891}
1892
1893static void lmc_softreset (lmc_softc_t * const sc) /*fold00*/
1894{
1895 int i;
1896
1897 lmc_trace(sc->lmc_device, "lmc_softreset in");
1898
1899 /* Initialize the receive rings and buffers. */
1900 sc->lmc_txfull = 0;
1901 sc->lmc_next_rx = 0;
1902 sc->lmc_next_tx = 0;
1903 sc->lmc_taint_rx = 0;
1904 sc->lmc_taint_tx = 0;
1905
1906 /*
1907 * Setup each one of the receiver buffers
1908 * allocate an skbuff for each one, setup the descriptor table
1909 * and point each buffer at the next one
1910 */
1911
1912 for (i = 0; i < LMC_RXDESCS; i++)
1913 {
1914 struct sk_buff *skb;
1915
1916 if (sc->lmc_rxq[i] == NULL)
1917 {
1918 skb = dev_alloc_skb (LMC_PKT_BUF_SZ + 2);
1919 if(skb == NULL){
1920 printk(KERN_WARNING "%s: Failed to allocate receiver ring, will try again\n", sc->name);
1921 sc->failed_ring = 1;
1922 break;
1923 }
1924 else{
1925 sc->lmc_rxq[i] = skb;
1926 }
1927 }
1928 else
1929 {
1930 skb = sc->lmc_rxq[i];
1931 }
1932
1933 skb->dev = sc->lmc_device;
1934
1935 /* owned by 21140 */
1936 sc->lmc_rxring[i].status = 0x80000000;
1937
1938 /* used to be PKT_BUF_SZ now uses skb since we lose some to head room */
1939 sc->lmc_rxring[i].length = skb->end - skb->data;
1940
1941 /* use to be tail which is dumb since you're thinking why write
1942 * to the end of the packj,et but since there's nothing there tail == data
1943 */
1944 sc->lmc_rxring[i].buffer1 = virt_to_bus (skb->data);
1945
1946 /* This is fair since the structure is static and we have the next address */
1947 sc->lmc_rxring[i].buffer2 = virt_to_bus (&sc->lmc_rxring[i + 1]);
1948
1949 }
1950
1951 /*
1952 * Sets end of ring
1953 */
1954 sc->lmc_rxring[i - 1].length |= 0x02000000; /* Set end of buffers flag */
1955 sc->lmc_rxring[i - 1].buffer2 = virt_to_bus (&sc->lmc_rxring[0]); /* Point back to the start */
1956 LMC_CSR_WRITE (sc, csr_rxlist, virt_to_bus (sc->lmc_rxring)); /* write base address */
1957
1958
1959 /* Initialize the transmit rings and buffers */
1960 for (i = 0; i < LMC_TXDESCS; i++)
1961 {
1962 if (sc->lmc_txq[i] != NULL){ /* have buffer */
1963 dev_kfree_skb(sc->lmc_txq[i]); /* free it */
1964 sc->stats.tx_dropped++; /* We just dropped a packet */
1965 }
1966 sc->lmc_txq[i] = NULL;
1967 sc->lmc_txring[i].status = 0x00000000;
1968 sc->lmc_txring[i].buffer2 = virt_to_bus (&sc->lmc_txring[i + 1]);
1969 }
1970 sc->lmc_txring[i - 1].buffer2 = virt_to_bus (&sc->lmc_txring[0]);
1971 LMC_CSR_WRITE (sc, csr_txlist, virt_to_bus (sc->lmc_txring));
1972
1973 lmc_trace(sc->lmc_device, "lmc_softreset out");
1974}
1975
1976void lmc_gpio_mkinput(lmc_softc_t * const sc, u_int32_t bits) /*fold00*/
1977{
1978 lmc_trace(sc->lmc_device, "lmc_gpio_mkinput in");
1979 sc->lmc_gpio_io &= ~bits;
1980 LMC_CSR_WRITE(sc, csr_gp, TULIP_GP_PINSET | (sc->lmc_gpio_io));
1981 lmc_trace(sc->lmc_device, "lmc_gpio_mkinput out");
1982}
1983
1984void lmc_gpio_mkoutput(lmc_softc_t * const sc, u_int32_t bits) /*fold00*/
1985{
1986 lmc_trace(sc->lmc_device, "lmc_gpio_mkoutput in");
1987 sc->lmc_gpio_io |= bits;
1988 LMC_CSR_WRITE(sc, csr_gp, TULIP_GP_PINSET | (sc->lmc_gpio_io));
1989 lmc_trace(sc->lmc_device, "lmc_gpio_mkoutput out");
1990}
1991
1992void lmc_led_on(lmc_softc_t * const sc, u_int32_t led) /*fold00*/
1993{
1994 lmc_trace(sc->lmc_device, "lmc_led_on in");
1995 if((~sc->lmc_miireg16) & led){ /* Already on! */
1996 lmc_trace(sc->lmc_device, "lmc_led_on aon out");
1997 return;
1998 }
1999
2000 sc->lmc_miireg16 &= ~led;
2001 lmc_mii_writereg(sc, 0, 16, sc->lmc_miireg16);
2002 lmc_trace(sc->lmc_device, "lmc_led_on out");
2003}
2004
2005void lmc_led_off(lmc_softc_t * const sc, u_int32_t led) /*fold00*/
2006{
2007 lmc_trace(sc->lmc_device, "lmc_led_off in");
2008 if(sc->lmc_miireg16 & led){ /* Already set don't do anything */
2009 lmc_trace(sc->lmc_device, "lmc_led_off aoff out");
2010 return;
2011 }
2012
2013 sc->lmc_miireg16 |= led;
2014 lmc_mii_writereg(sc, 0, 16, sc->lmc_miireg16);
2015 lmc_trace(sc->lmc_device, "lmc_led_off out");
2016}
2017
2018static void lmc_reset(lmc_softc_t * const sc) /*fold00*/
2019{
2020 lmc_trace(sc->lmc_device, "lmc_reset in");
2021 sc->lmc_miireg16 |= LMC_MII16_FIFO_RESET;
2022 lmc_mii_writereg(sc, 0, 16, sc->lmc_miireg16);
2023
2024 sc->lmc_miireg16 &= ~LMC_MII16_FIFO_RESET;
2025 lmc_mii_writereg(sc, 0, 16, sc->lmc_miireg16);
2026
2027 /*
2028 * make some of the GPIO pins be outputs
2029 */
2030 lmc_gpio_mkoutput(sc, LMC_GEP_RESET);
2031
2032 /*
2033 * RESET low to force state reset. This also forces
2034 * the transmitter clock to be internal, but we expect to reset
2035 * that later anyway.
2036 */
2037 sc->lmc_gpio &= ~(LMC_GEP_RESET);
2038 LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
2039
2040 /*
2041 * hold for more than 10 microseconds
2042 */
2043 udelay(50);
2044
2045 /*
2046 * stop driving Xilinx-related signals
2047 */
2048 lmc_gpio_mkinput(sc, LMC_GEP_RESET);
2049
2050 /*
2051 * Call media specific init routine
2052 */
2053 sc->lmc_media->init(sc);
2054
2055 sc->stats.resetCount++;
2056 lmc_trace(sc->lmc_device, "lmc_reset out");
2057}
2058
2059static void lmc_dec_reset(lmc_softc_t * const sc) /*fold00*/
2060{
2061 u_int32_t val;
2062 lmc_trace(sc->lmc_device, "lmc_dec_reset in");
2063
2064 /*
2065 * disable all interrupts
2066 */
2067 sc->lmc_intrmask = 0;
2068 LMC_CSR_WRITE(sc, csr_intr, sc->lmc_intrmask);
2069
2070 /*
2071 * Reset the chip with a software reset command.
2072 * Wait 10 microseconds (actually 50 PCI cycles but at
2073 * 33MHz that comes to two microseconds but wait a
2074 * bit longer anyways)
2075 */
2076 LMC_CSR_WRITE(sc, csr_busmode, TULIP_BUSMODE_SWRESET);
2077 udelay(25);
2078#ifdef __sparc__
2079 sc->lmc_busmode = LMC_CSR_READ(sc, csr_busmode);
2080 sc->lmc_busmode = 0x00100000;
2081 sc->lmc_busmode &= ~TULIP_BUSMODE_SWRESET;
2082 LMC_CSR_WRITE(sc, csr_busmode, sc->lmc_busmode);
2083#endif
2084 sc->lmc_cmdmode = LMC_CSR_READ(sc, csr_command);
2085
2086 /*
2087 * We want:
2088 * no ethernet address in frames we write
2089 * disable padding (txdesc, padding disable)
2090 * ignore runt frames (rdes0 bit 15)
2091 * no receiver watchdog or transmitter jabber timer
2092 * (csr15 bit 0,14 == 1)
2093 * if using 16-bit CRC, turn off CRC (trans desc, crc disable)
2094 */
2095
2096 sc->lmc_cmdmode |= ( TULIP_CMD_PROMISCUOUS
2097 | TULIP_CMD_FULLDUPLEX
2098 | TULIP_CMD_PASSBADPKT
2099 | TULIP_CMD_NOHEARTBEAT
2100 | TULIP_CMD_PORTSELECT
2101 | TULIP_CMD_RECEIVEALL
2102 | TULIP_CMD_MUSTBEONE
2103 );
2104 sc->lmc_cmdmode &= ~( TULIP_CMD_OPERMODE
2105 | TULIP_CMD_THRESHOLDCTL
2106 | TULIP_CMD_STOREFWD
2107 | TULIP_CMD_TXTHRSHLDCTL
2108 );
2109
2110 LMC_CSR_WRITE(sc, csr_command, sc->lmc_cmdmode);
2111
2112 /*
2113 * disable receiver watchdog and transmit jabber
2114 */
2115 val = LMC_CSR_READ(sc, csr_sia_general);
2116 val |= (TULIP_WATCHDOG_TXDISABLE | TULIP_WATCHDOG_RXDISABLE);
2117 LMC_CSR_WRITE(sc, csr_sia_general, val);
2118
2119 lmc_trace(sc->lmc_device, "lmc_dec_reset out");
2120}
2121
2122static void lmc_initcsrs(lmc_softc_t * const sc, lmc_csrptr_t csr_base, /*fold00*/
2123 size_t csr_size)
2124{
2125 lmc_trace(sc->lmc_device, "lmc_initcsrs in");
2126 sc->lmc_csrs.csr_busmode = csr_base + 0 * csr_size;
2127 sc->lmc_csrs.csr_txpoll = csr_base + 1 * csr_size;
2128 sc->lmc_csrs.csr_rxpoll = csr_base + 2 * csr_size;
2129 sc->lmc_csrs.csr_rxlist = csr_base + 3 * csr_size;
2130 sc->lmc_csrs.csr_txlist = csr_base + 4 * csr_size;
2131 sc->lmc_csrs.csr_status = csr_base + 5 * csr_size;
2132 sc->lmc_csrs.csr_command = csr_base + 6 * csr_size;
2133 sc->lmc_csrs.csr_intr = csr_base + 7 * csr_size;
2134 sc->lmc_csrs.csr_missed_frames = csr_base + 8 * csr_size;
2135 sc->lmc_csrs.csr_9 = csr_base + 9 * csr_size;
2136 sc->lmc_csrs.csr_10 = csr_base + 10 * csr_size;
2137 sc->lmc_csrs.csr_11 = csr_base + 11 * csr_size;
2138 sc->lmc_csrs.csr_12 = csr_base + 12 * csr_size;
2139 sc->lmc_csrs.csr_13 = csr_base + 13 * csr_size;
2140 sc->lmc_csrs.csr_14 = csr_base + 14 * csr_size;
2141 sc->lmc_csrs.csr_15 = csr_base + 15 * csr_size;
2142 lmc_trace(sc->lmc_device, "lmc_initcsrs out");
2143}
2144
2145static void lmc_driver_timeout(struct net_device *dev) { /*fold00*/
2146 lmc_softc_t *sc;
2147 u32 csr6;
2148 unsigned long flags;
2149
2150 lmc_trace(dev, "lmc_driver_timeout in");
2151
2152 sc = dev->priv;
2153
2154 spin_lock_irqsave(&sc->lmc_lock, flags);
2155
2156 printk("%s: Xmitter busy|\n", dev->name);
2157
2158 sc->stats.tx_tbusy_calls++ ;
2159 if (jiffies - dev->trans_start < TX_TIMEOUT) {
2160 goto bug_out;
2161 }
2162
2163 /*
2164 * Chip seems to have locked up
2165 * Reset it
2166 * This whips out all our decriptor
2167 * table and starts from scartch
2168 */
2169
2170 LMC_EVENT_LOG(LMC_EVENT_XMTPRCTMO,
2171 LMC_CSR_READ (sc, csr_status),
2172 sc->stats.tx_ProcTimeout);
2173
2174 lmc_running_reset (dev);
2175
2176 LMC_EVENT_LOG(LMC_EVENT_RESET1, LMC_CSR_READ (sc, csr_status), 0);
2177 LMC_EVENT_LOG(LMC_EVENT_RESET2,
2178 lmc_mii_readreg (sc, 0, 16),
2179 lmc_mii_readreg (sc, 0, 17));
2180
2181 /* restart the tx processes */
2182 csr6 = LMC_CSR_READ (sc, csr_command);
2183 LMC_CSR_WRITE (sc, csr_command, csr6 | 0x0002);
2184 LMC_CSR_WRITE (sc, csr_command, csr6 | 0x2002);
2185
2186 /* immediate transmit */
2187 LMC_CSR_WRITE (sc, csr_txpoll, 0);
2188
2189 sc->stats.tx_errors++;
2190 sc->stats.tx_ProcTimeout++; /* -baz */
2191
2192 dev->trans_start = jiffies;
2193
2194bug_out:
2195
2196 spin_unlock_irqrestore(&sc->lmc_lock, flags);
2197
2198 lmc_trace(dev, "lmc_driver_timout out");
2199
2200
2201}
diff --git a/drivers/net/wan/lmc/lmc_media.c b/drivers/net/wan/lmc/lmc_media.c
new file mode 100644
index 000000000000..f55ce76b00ed
--- /dev/null
+++ b/drivers/net/wan/lmc/lmc_media.c
@@ -0,0 +1,1246 @@
1/* $Id: lmc_media.c,v 1.13 2000/04/11 05:25:26 asj Exp $ */
2
3#include <linux/config.h>
4#include <linux/kernel.h>
5#include <linux/string.h>
6#include <linux/timer.h>
7#include <linux/ptrace.h>
8#include <linux/errno.h>
9#include <linux/ioport.h>
10#include <linux/slab.h>
11#include <linux/interrupt.h>
12#include <linux/pci.h>
13#include <linux/in.h>
14#include <linux/if_arp.h>
15#include <linux/netdevice.h>
16#include <linux/etherdevice.h>
17#include <linux/skbuff.h>
18#include <linux/inet.h>
19#include <linux/bitops.h>
20
21#include <net/syncppp.h>
22
23#include <asm/processor.h> /* Processor type for cache alignment. */
24#include <asm/io.h>
25#include <asm/dma.h>
26
27#include <asm/uaccess.h>
28
29#include "lmc.h"
30#include "lmc_var.h"
31#include "lmc_ioctl.h"
32#include "lmc_debug.h"
33
34#define CONFIG_LMC_IGNORE_HARDWARE_HANDSHAKE 1
35
36 /*
37 * Copyright (c) 1997-2000 LAN Media Corporation (LMC)
38 * All rights reserved. www.lanmedia.com
39 *
40 * This code is written by:
41 * Andrew Stanley-Jones (asj@cban.com)
42 * Rob Braun (bbraun@vix.com),
43 * Michael Graff (explorer@vix.com) and
44 * Matt Thomas (matt@3am-software.com).
45 *
46 * This software may be used and distributed according to the terms
47 * of the GNU General Public License version 2, incorporated herein by reference.
48 */
49
50/*
51 * For lack of a better place, put the SSI cable stuff here.
52 */
53char *lmc_t1_cables[] = {
54 "V.10/RS423", "EIA530A", "reserved", "X.21", "V.35",
55 "EIA449/EIA530/V.36", "V.28/EIA232", "none", NULL
56};
57
58/*
59 * protocol independent method.
60 */
61static void lmc_set_protocol (lmc_softc_t * const, lmc_ctl_t *);
62
63/*
64 * media independent methods to check on media status, link, light LEDs,
65 * etc.
66 */
67static void lmc_ds3_init (lmc_softc_t * const);
68static void lmc_ds3_default (lmc_softc_t * const);
69static void lmc_ds3_set_status (lmc_softc_t * const, lmc_ctl_t *);
70static void lmc_ds3_set_100ft (lmc_softc_t * const, int);
71static int lmc_ds3_get_link_status (lmc_softc_t * const);
72static void lmc_ds3_set_crc_length (lmc_softc_t * const, int);
73static void lmc_ds3_set_scram (lmc_softc_t * const, int);
74static void lmc_ds3_watchdog (lmc_softc_t * const);
75
76static void lmc_hssi_init (lmc_softc_t * const);
77static void lmc_hssi_default (lmc_softc_t * const);
78static void lmc_hssi_set_status (lmc_softc_t * const, lmc_ctl_t *);
79static void lmc_hssi_set_clock (lmc_softc_t * const, int);
80static int lmc_hssi_get_link_status (lmc_softc_t * const);
81static void lmc_hssi_set_link_status (lmc_softc_t * const, int);
82static void lmc_hssi_set_crc_length (lmc_softc_t * const, int);
83static void lmc_hssi_watchdog (lmc_softc_t * const);
84
85static void lmc_ssi_init (lmc_softc_t * const);
86static void lmc_ssi_default (lmc_softc_t * const);
87static void lmc_ssi_set_status (lmc_softc_t * const, lmc_ctl_t *);
88static void lmc_ssi_set_clock (lmc_softc_t * const, int);
89static void lmc_ssi_set_speed (lmc_softc_t * const, lmc_ctl_t *);
90static int lmc_ssi_get_link_status (lmc_softc_t * const);
91static void lmc_ssi_set_link_status (lmc_softc_t * const, int);
92static void lmc_ssi_set_crc_length (lmc_softc_t * const, int);
93static void lmc_ssi_watchdog (lmc_softc_t * const);
94
95static void lmc_t1_init (lmc_softc_t * const);
96static void lmc_t1_default (lmc_softc_t * const);
97static void lmc_t1_set_status (lmc_softc_t * const, lmc_ctl_t *);
98static int lmc_t1_get_link_status (lmc_softc_t * const);
99static void lmc_t1_set_circuit_type (lmc_softc_t * const, int);
100static void lmc_t1_set_crc_length (lmc_softc_t * const, int);
101static void lmc_t1_set_clock (lmc_softc_t * const, int);
102static void lmc_t1_watchdog (lmc_softc_t * const);
103
104static void lmc_dummy_set_1 (lmc_softc_t * const, int);
105static void lmc_dummy_set2_1 (lmc_softc_t * const, lmc_ctl_t *);
106
107static inline void write_av9110_bit (lmc_softc_t *, int);
108static void write_av9110 (lmc_softc_t *, u_int32_t, u_int32_t, u_int32_t,
109 u_int32_t, u_int32_t);
110
111lmc_media_t lmc_ds3_media = {
112 lmc_ds3_init, /* special media init stuff */
113 lmc_ds3_default, /* reset to default state */
114 lmc_ds3_set_status, /* reset status to state provided */
115 lmc_dummy_set_1, /* set clock source */
116 lmc_dummy_set2_1, /* set line speed */
117 lmc_ds3_set_100ft, /* set cable length */
118 lmc_ds3_set_scram, /* set scrambler */
119 lmc_ds3_get_link_status, /* get link status */
120 lmc_dummy_set_1, /* set link status */
121 lmc_ds3_set_crc_length, /* set CRC length */
122 lmc_dummy_set_1, /* set T1 or E1 circuit type */
123 lmc_ds3_watchdog
124};
125
126lmc_media_t lmc_hssi_media = {
127 lmc_hssi_init, /* special media init stuff */
128 lmc_hssi_default, /* reset to default state */
129 lmc_hssi_set_status, /* reset status to state provided */
130 lmc_hssi_set_clock, /* set clock source */
131 lmc_dummy_set2_1, /* set line speed */
132 lmc_dummy_set_1, /* set cable length */
133 lmc_dummy_set_1, /* set scrambler */
134 lmc_hssi_get_link_status, /* get link status */
135 lmc_hssi_set_link_status, /* set link status */
136 lmc_hssi_set_crc_length, /* set CRC length */
137 lmc_dummy_set_1, /* set T1 or E1 circuit type */
138 lmc_hssi_watchdog
139};
140
141lmc_media_t lmc_ssi_media = { lmc_ssi_init, /* special media init stuff */
142 lmc_ssi_default, /* reset to default state */
143 lmc_ssi_set_status, /* reset status to state provided */
144 lmc_ssi_set_clock, /* set clock source */
145 lmc_ssi_set_speed, /* set line speed */
146 lmc_dummy_set_1, /* set cable length */
147 lmc_dummy_set_1, /* set scrambler */
148 lmc_ssi_get_link_status, /* get link status */
149 lmc_ssi_set_link_status, /* set link status */
150 lmc_ssi_set_crc_length, /* set CRC length */
151 lmc_dummy_set_1, /* set T1 or E1 circuit type */
152 lmc_ssi_watchdog
153};
154
155lmc_media_t lmc_t1_media = {
156 lmc_t1_init, /* special media init stuff */
157 lmc_t1_default, /* reset to default state */
158 lmc_t1_set_status, /* reset status to state provided */
159 lmc_t1_set_clock, /* set clock source */
160 lmc_dummy_set2_1, /* set line speed */
161 lmc_dummy_set_1, /* set cable length */
162 lmc_dummy_set_1, /* set scrambler */
163 lmc_t1_get_link_status, /* get link status */
164 lmc_dummy_set_1, /* set link status */
165 lmc_t1_set_crc_length, /* set CRC length */
166 lmc_t1_set_circuit_type, /* set T1 or E1 circuit type */
167 lmc_t1_watchdog
168};
169
170static void
171lmc_dummy_set_1 (lmc_softc_t * const sc, int a)
172{
173}
174
175static void
176lmc_dummy_set2_1 (lmc_softc_t * const sc, lmc_ctl_t * a)
177{
178}
179
180/*
181 * HSSI methods
182 */
183
184static void
185lmc_hssi_init (lmc_softc_t * const sc)
186{
187 sc->ictl.cardtype = LMC_CTL_CARDTYPE_LMC5200;
188
189 lmc_gpio_mkoutput (sc, LMC_GEP_HSSI_CLOCK);
190}
191
192static void
193lmc_hssi_default (lmc_softc_t * const sc)
194{
195 sc->lmc_miireg16 = LMC_MII16_LED_ALL;
196
197 sc->lmc_media->set_link_status (sc, LMC_LINK_DOWN);
198 sc->lmc_media->set_clock_source (sc, LMC_CTL_CLOCK_SOURCE_EXT);
199 sc->lmc_media->set_crc_length (sc, LMC_CTL_CRC_LENGTH_16);
200}
201
202/*
203 * Given a user provided state, set ourselves up to match it. This will
204 * always reset the card if needed.
205 */
206static void
207lmc_hssi_set_status (lmc_softc_t * const sc, lmc_ctl_t * ctl)
208{
209 if (ctl == NULL)
210 {
211 sc->lmc_media->set_clock_source (sc, sc->ictl.clock_source);
212 lmc_set_protocol (sc, NULL);
213
214 return;
215 }
216
217 /*
218 * check for change in clock source
219 */
220 if (ctl->clock_source && !sc->ictl.clock_source)
221 {
222 sc->lmc_media->set_clock_source (sc, LMC_CTL_CLOCK_SOURCE_INT);
223 sc->lmc_timing = LMC_CTL_CLOCK_SOURCE_INT;
224 }
225 else if (!ctl->clock_source && sc->ictl.clock_source)
226 {
227 sc->lmc_timing = LMC_CTL_CLOCK_SOURCE_EXT;
228 sc->lmc_media->set_clock_source (sc, LMC_CTL_CLOCK_SOURCE_EXT);
229 }
230
231 lmc_set_protocol (sc, ctl);
232}
233
234/*
235 * 1 == internal, 0 == external
236 */
237static void
238lmc_hssi_set_clock (lmc_softc_t * const sc, int ie)
239{
240 int old;
241 old = sc->ictl.clock_source;
242 if (ie == LMC_CTL_CLOCK_SOURCE_EXT)
243 {
244 sc->lmc_gpio |= LMC_GEP_HSSI_CLOCK;
245 LMC_CSR_WRITE (sc, csr_gp, sc->lmc_gpio);
246 sc->ictl.clock_source = LMC_CTL_CLOCK_SOURCE_EXT;
247 if(old != ie)
248 printk (LMC_PRINTF_FMT ": clock external\n", LMC_PRINTF_ARGS);
249 }
250 else
251 {
252 sc->lmc_gpio &= ~(LMC_GEP_HSSI_CLOCK);
253 LMC_CSR_WRITE (sc, csr_gp, sc->lmc_gpio);
254 sc->ictl.clock_source = LMC_CTL_CLOCK_SOURCE_INT;
255 if(old != ie)
256 printk (LMC_PRINTF_FMT ": clock internal\n", LMC_PRINTF_ARGS);
257 }
258}
259
260/*
261 * return hardware link status.
262 * 0 == link is down, 1 == link is up.
263 */
264static int
265lmc_hssi_get_link_status (lmc_softc_t * const sc)
266{
267 /*
268 * We're using the same code as SSI since
269 * they're practically the same
270 */
271 return lmc_ssi_get_link_status(sc);
272}
273
274static void
275lmc_hssi_set_link_status (lmc_softc_t * const sc, int state)
276{
277 if (state == LMC_LINK_UP)
278 sc->lmc_miireg16 |= LMC_MII16_HSSI_TA;
279 else
280 sc->lmc_miireg16 &= ~LMC_MII16_HSSI_TA;
281
282 lmc_mii_writereg (sc, 0, 16, sc->lmc_miireg16);
283}
284
285/*
286 * 0 == 16bit, 1 == 32bit
287 */
288static void
289lmc_hssi_set_crc_length (lmc_softc_t * const sc, int state)
290{
291 if (state == LMC_CTL_CRC_LENGTH_32)
292 {
293 /* 32 bit */
294 sc->lmc_miireg16 |= LMC_MII16_HSSI_CRC;
295 sc->ictl.crc_length = LMC_CTL_CRC_LENGTH_32;
296 }
297 else
298 {
299 /* 16 bit */
300 sc->lmc_miireg16 &= ~LMC_MII16_HSSI_CRC;
301 sc->ictl.crc_length = LMC_CTL_CRC_LENGTH_16;
302 }
303
304 lmc_mii_writereg (sc, 0, 16, sc->lmc_miireg16);
305}
306
307static void
308lmc_hssi_watchdog (lmc_softc_t * const sc)
309{
310 /* HSSI is blank */
311}
312
313/*
314 * DS3 methods
315 */
316
317/*
318 * Set cable length
319 */
320static void
321lmc_ds3_set_100ft (lmc_softc_t * const sc, int ie)
322{
323 if (ie == LMC_CTL_CABLE_LENGTH_GT_100FT)
324 {
325 sc->lmc_miireg16 &= ~LMC_MII16_DS3_ZERO;
326 sc->ictl.cable_length = LMC_CTL_CABLE_LENGTH_GT_100FT;
327 }
328 else if (ie == LMC_CTL_CABLE_LENGTH_LT_100FT)
329 {
330 sc->lmc_miireg16 |= LMC_MII16_DS3_ZERO;
331 sc->ictl.cable_length = LMC_CTL_CABLE_LENGTH_LT_100FT;
332 }
333 lmc_mii_writereg (sc, 0, 16, sc->lmc_miireg16);
334}
335
336static void
337lmc_ds3_default (lmc_softc_t * const sc)
338{
339 sc->lmc_miireg16 = LMC_MII16_LED_ALL;
340
341 sc->lmc_media->set_link_status (sc, LMC_LINK_DOWN);
342 sc->lmc_media->set_cable_length (sc, LMC_CTL_CABLE_LENGTH_LT_100FT);
343 sc->lmc_media->set_scrambler (sc, LMC_CTL_OFF);
344 sc->lmc_media->set_crc_length (sc, LMC_CTL_CRC_LENGTH_16);
345}
346
347/*
348 * Given a user provided state, set ourselves up to match it. This will
349 * always reset the card if needed.
350 */
351static void
352lmc_ds3_set_status (lmc_softc_t * const sc, lmc_ctl_t * ctl)
353{
354 if (ctl == NULL)
355 {
356 sc->lmc_media->set_cable_length (sc, sc->ictl.cable_length);
357 sc->lmc_media->set_scrambler (sc, sc->ictl.scrambler_onoff);
358 lmc_set_protocol (sc, NULL);
359
360 return;
361 }
362
363 /*
364 * check for change in cable length setting
365 */
366 if (ctl->cable_length && !sc->ictl.cable_length)
367 lmc_ds3_set_100ft (sc, LMC_CTL_CABLE_LENGTH_GT_100FT);
368 else if (!ctl->cable_length && sc->ictl.cable_length)
369 lmc_ds3_set_100ft (sc, LMC_CTL_CABLE_LENGTH_LT_100FT);
370
371 /*
372 * Check for change in scrambler setting (requires reset)
373 */
374 if (ctl->scrambler_onoff && !sc->ictl.scrambler_onoff)
375 lmc_ds3_set_scram (sc, LMC_CTL_ON);
376 else if (!ctl->scrambler_onoff && sc->ictl.scrambler_onoff)
377 lmc_ds3_set_scram (sc, LMC_CTL_OFF);
378
379 lmc_set_protocol (sc, ctl);
380}
381
382static void
383lmc_ds3_init (lmc_softc_t * const sc)
384{
385 int i;
386
387 sc->ictl.cardtype = LMC_CTL_CARDTYPE_LMC5245;
388
389 /* writes zeros everywhere */
390 for (i = 0; i < 21; i++)
391 {
392 lmc_mii_writereg (sc, 0, 17, i);
393 lmc_mii_writereg (sc, 0, 18, 0);
394 }
395
396 /* set some essential bits */
397 lmc_mii_writereg (sc, 0, 17, 1);
398 lmc_mii_writereg (sc, 0, 18, 0x25); /* ser, xtx */
399
400 lmc_mii_writereg (sc, 0, 17, 5);
401 lmc_mii_writereg (sc, 0, 18, 0x80); /* emode */
402
403 lmc_mii_writereg (sc, 0, 17, 14);
404 lmc_mii_writereg (sc, 0, 18, 0x30); /* rcgen, tcgen */
405
406 /* clear counters and latched bits */
407 for (i = 0; i < 21; i++)
408 {
409 lmc_mii_writereg (sc, 0, 17, i);
410 lmc_mii_readreg (sc, 0, 18);
411 }
412}
413
414/*
415 * 1 == DS3 payload scrambled, 0 == not scrambled
416 */
417static void
418lmc_ds3_set_scram (lmc_softc_t * const sc, int ie)
419{
420 if (ie == LMC_CTL_ON)
421 {
422 sc->lmc_miireg16 |= LMC_MII16_DS3_SCRAM;
423 sc->ictl.scrambler_onoff = LMC_CTL_ON;
424 }
425 else
426 {
427 sc->lmc_miireg16 &= ~LMC_MII16_DS3_SCRAM;
428 sc->ictl.scrambler_onoff = LMC_CTL_OFF;
429 }
430 lmc_mii_writereg (sc, 0, 16, sc->lmc_miireg16);
431}
432
433/*
434 * return hardware link status.
435 * 0 == link is down, 1 == link is up.
436 */
437static int
438lmc_ds3_get_link_status (lmc_softc_t * const sc)
439{
440 u_int16_t link_status, link_status_11;
441 int ret = 1;
442
443 lmc_mii_writereg (sc, 0, 17, 7);
444 link_status = lmc_mii_readreg (sc, 0, 18);
445
446 /* LMC5245 (DS3) & LMC1200 (DS1) LED definitions
447 * led0 yellow = far-end adapter is in Red alarm condition
448 * led1 blue = received an Alarm Indication signal
449 * (upstream failure)
450 * led2 Green = power to adapter, Gate Array loaded & driver
451 * attached
452 * led3 red = Loss of Signal (LOS) or out of frame (OOF)
453 * conditions detected on T3 receive signal
454 */
455
456 lmc_led_on(sc, LMC_DS3_LED2);
457
458 if ((link_status & LMC_FRAMER_REG0_DLOS) ||
459 (link_status & LMC_FRAMER_REG0_OOFS)){
460 ret = 0;
461 if(sc->last_led_err[3] != 1){
462 u16 r1;
463 lmc_mii_writereg (sc, 0, 17, 01); /* Turn on Xbit error as our cisco does */
464 r1 = lmc_mii_readreg (sc, 0, 18);
465 r1 &= 0xfe;
466 lmc_mii_writereg(sc, 0, 18, r1);
467 printk(KERN_WARNING "%s: Red Alarm - Loss of Signal or Loss of Framing\n", sc->name);
468 }
469 lmc_led_on(sc, LMC_DS3_LED3); /* turn on red LED */
470 sc->last_led_err[3] = 1;
471 }
472 else {
473 lmc_led_off(sc, LMC_DS3_LED3); /* turn on red LED */
474 if(sc->last_led_err[3] == 1){
475 u16 r1;
476 lmc_mii_writereg (sc, 0, 17, 01); /* Turn off Xbit error */
477 r1 = lmc_mii_readreg (sc, 0, 18);
478 r1 |= 0x01;
479 lmc_mii_writereg(sc, 0, 18, r1);
480 }
481 sc->last_led_err[3] = 0;
482 }
483
484 lmc_mii_writereg(sc, 0, 17, 0x10);
485 link_status_11 = lmc_mii_readreg(sc, 0, 18);
486 if((link_status & LMC_FRAMER_REG0_AIS) ||
487 (link_status_11 & LMC_FRAMER_REG10_XBIT)) {
488 ret = 0;
489 if(sc->last_led_err[0] != 1){
490 printk(KERN_WARNING "%s: AIS Alarm or XBit Error\n", sc->name);
491 printk(KERN_WARNING "%s: Remote end has loss of signal or framing\n", sc->name);
492 }
493 lmc_led_on(sc, LMC_DS3_LED0);
494 sc->last_led_err[0] = 1;
495 }
496 else {
497 lmc_led_off(sc, LMC_DS3_LED0);
498 sc->last_led_err[0] = 0;
499 }
500
501 lmc_mii_writereg (sc, 0, 17, 9);
502 link_status = lmc_mii_readreg (sc, 0, 18);
503
504 if(link_status & LMC_FRAMER_REG9_RBLUE){
505 ret = 0;
506 if(sc->last_led_err[1] != 1){
507 printk(KERN_WARNING "%s: Blue Alarm - Receiving all 1's\n", sc->name);
508 }
509 lmc_led_on(sc, LMC_DS3_LED1);
510 sc->last_led_err[1] = 1;
511 }
512 else {
513 lmc_led_off(sc, LMC_DS3_LED1);
514 sc->last_led_err[1] = 0;
515 }
516
517 return ret;
518}
519
520/*
521 * 0 == 16bit, 1 == 32bit
522 */
523static void
524lmc_ds3_set_crc_length (lmc_softc_t * const sc, int state)
525{
526 if (state == LMC_CTL_CRC_LENGTH_32)
527 {
528 /* 32 bit */
529 sc->lmc_miireg16 |= LMC_MII16_DS3_CRC;
530 sc->ictl.crc_length = LMC_CTL_CRC_LENGTH_32;
531 }
532 else
533 {
534 /* 16 bit */
535 sc->lmc_miireg16 &= ~LMC_MII16_DS3_CRC;
536 sc->ictl.crc_length = LMC_CTL_CRC_LENGTH_16;
537 }
538
539 lmc_mii_writereg (sc, 0, 16, sc->lmc_miireg16);
540}
541
542static void
543lmc_ds3_watchdog (lmc_softc_t * const sc)
544{
545
546}
547
548
549/*
550 * SSI methods
551 */
552
553static void
554lmc_ssi_init (lmc_softc_t * const sc)
555{
556 u_int16_t mii17;
557 int cable;
558
559 sc->ictl.cardtype = LMC_CTL_CARDTYPE_LMC1000;
560
561 mii17 = lmc_mii_readreg (sc, 0, 17);
562
563 cable = (mii17 & LMC_MII17_SSI_CABLE_MASK) >> LMC_MII17_SSI_CABLE_SHIFT;
564 sc->ictl.cable_type = cable;
565
566 lmc_gpio_mkoutput (sc, LMC_GEP_SSI_TXCLOCK);
567}
568
569static void
570lmc_ssi_default (lmc_softc_t * const sc)
571{
572 sc->lmc_miireg16 = LMC_MII16_LED_ALL;
573
574 /*
575 * make TXCLOCK always be an output
576 */
577 lmc_gpio_mkoutput (sc, LMC_GEP_SSI_TXCLOCK);
578
579 sc->lmc_media->set_link_status (sc, LMC_LINK_DOWN);
580 sc->lmc_media->set_clock_source (sc, LMC_CTL_CLOCK_SOURCE_EXT);
581 sc->lmc_media->set_speed (sc, NULL);
582 sc->lmc_media->set_crc_length (sc, LMC_CTL_CRC_LENGTH_16);
583}
584
585/*
586 * Given a user provided state, set ourselves up to match it. This will
587 * always reset the card if needed.
588 */
589static void
590lmc_ssi_set_status (lmc_softc_t * const sc, lmc_ctl_t * ctl)
591{
592 if (ctl == NULL)
593 {
594 sc->lmc_media->set_clock_source (sc, sc->ictl.clock_source);
595 sc->lmc_media->set_speed (sc, &sc->ictl);
596 lmc_set_protocol (sc, NULL);
597
598 return;
599 }
600
601 /*
602 * check for change in clock source
603 */
604 if (ctl->clock_source == LMC_CTL_CLOCK_SOURCE_INT
605 && sc->ictl.clock_source == LMC_CTL_CLOCK_SOURCE_EXT)
606 {
607 sc->lmc_media->set_clock_source (sc, LMC_CTL_CLOCK_SOURCE_INT);
608 sc->lmc_timing = LMC_CTL_CLOCK_SOURCE_INT;
609 }
610 else if (ctl->clock_source == LMC_CTL_CLOCK_SOURCE_EXT
611 && sc->ictl.clock_source == LMC_CTL_CLOCK_SOURCE_INT)
612 {
613 sc->lmc_media->set_clock_source (sc, LMC_CTL_CLOCK_SOURCE_EXT);
614 sc->lmc_timing = LMC_CTL_CLOCK_SOURCE_EXT;
615 }
616
617 if (ctl->clock_rate != sc->ictl.clock_rate)
618 sc->lmc_media->set_speed (sc, ctl);
619
620 lmc_set_protocol (sc, ctl);
621}
622
623/*
624 * 1 == internal, 0 == external
625 */
626static void
627lmc_ssi_set_clock (lmc_softc_t * const sc, int ie)
628{
629 int old;
630 old = ie;
631 if (ie == LMC_CTL_CLOCK_SOURCE_EXT)
632 {
633 sc->lmc_gpio &= ~(LMC_GEP_SSI_TXCLOCK);
634 LMC_CSR_WRITE (sc, csr_gp, sc->lmc_gpio);
635 sc->ictl.clock_source = LMC_CTL_CLOCK_SOURCE_EXT;
636 if(ie != old)
637 printk (LMC_PRINTF_FMT ": clock external\n", LMC_PRINTF_ARGS);
638 }
639 else
640 {
641 sc->lmc_gpio |= LMC_GEP_SSI_TXCLOCK;
642 LMC_CSR_WRITE (sc, csr_gp, sc->lmc_gpio);
643 sc->ictl.clock_source = LMC_CTL_CLOCK_SOURCE_INT;
644 if(ie != old)
645 printk (LMC_PRINTF_FMT ": clock internal\n", LMC_PRINTF_ARGS);
646 }
647}
648
649static void
650lmc_ssi_set_speed (lmc_softc_t * const sc, lmc_ctl_t * ctl)
651{
652 lmc_ctl_t *ictl = &sc->ictl;
653 lmc_av9110_t *av;
654
655 /* original settings for clock rate of:
656 * 100 Khz (8,25,0,0,2) were incorrect
657 * they should have been 80,125,1,3,3
658 * There are 17 param combinations to produce this freq.
659 * For 1.5 Mhz use 120,100,1,1,2 (226 param. combinations)
660 */
661 if (ctl == NULL)
662 {
663 av = &ictl->cardspec.ssi;
664 ictl->clock_rate = 1500000;
665 av->f = ictl->clock_rate;
666 av->n = 120;
667 av->m = 100;
668 av->v = 1;
669 av->x = 1;
670 av->r = 2;
671
672 write_av9110 (sc, av->n, av->m, av->v, av->x, av->r);
673 return;
674 }
675
676 av = &ctl->cardspec.ssi;
677
678 if (av->f == 0)
679 return;
680
681 ictl->clock_rate = av->f; /* really, this is the rate we are */
682 ictl->cardspec.ssi = *av;
683
684 write_av9110 (sc, av->n, av->m, av->v, av->x, av->r);
685}
686
687/*
688 * return hardware link status.
689 * 0 == link is down, 1 == link is up.
690 */
691static int
692lmc_ssi_get_link_status (lmc_softc_t * const sc)
693{
694 u_int16_t link_status;
695 u_int32_t ticks;
696 int ret = 1;
697 int hw_hdsk = 1;
698
699 /*
700 * missing CTS? Hmm. If we require CTS on, we may never get the
701 * link to come up, so omit it in this test.
702 *
703 * Also, it seems that with a loopback cable, DCD isn't asserted,
704 * so just check for things like this:
705 * DSR _must_ be asserted.
706 * One of DCD or CTS must be asserted.
707 */
708
709 /* LMC 1000 (SSI) LED definitions
710 * led0 Green = power to adapter, Gate Array loaded &
711 * driver attached
712 * led1 Green = DSR and DTR and RTS and CTS are set
713 * led2 Green = Cable detected
714 * led3 red = No timing is available from the
715 * cable or the on-board frequency
716 * generator.
717 */
718
719 link_status = lmc_mii_readreg (sc, 0, 16);
720
721 /* Is the transmit clock still available */
722 ticks = LMC_CSR_READ (sc, csr_gp_timer);
723 ticks = 0x0000ffff - (ticks & 0x0000ffff);
724
725 lmc_led_on (sc, LMC_MII16_LED0);
726
727 /* ====== transmit clock determination ===== */
728 if (sc->lmc_timing == LMC_CTL_CLOCK_SOURCE_INT) {
729 lmc_led_off(sc, LMC_MII16_LED3);
730 }
731 else if (ticks == 0 ) { /* no clock found ? */
732 ret = 0;
733 if(sc->last_led_err[3] != 1){
734 sc->stats.tx_lossOfClockCnt++;
735 printk(KERN_WARNING "%s: Lost Clock, Link Down\n", sc->name);
736 }
737 sc->last_led_err[3] = 1;
738 lmc_led_on (sc, LMC_MII16_LED3); /* turn ON red LED */
739 }
740 else {
741 if(sc->last_led_err[3] == 1)
742 printk(KERN_WARNING "%s: Clock Returned\n", sc->name);
743 sc->last_led_err[3] = 0;
744 lmc_led_off (sc, LMC_MII16_LED3); /* turn OFF red LED */
745 }
746
747 if ((link_status & LMC_MII16_SSI_DSR) == 0) { /* Also HSSI CA */
748 ret = 0;
749 hw_hdsk = 0;
750 }
751
752#ifdef CONFIG_LMC_IGNORE_HARDWARE_HANDSHAKE
753 if ((link_status & (LMC_MII16_SSI_CTS | LMC_MII16_SSI_DCD)) == 0){
754 ret = 0;
755 hw_hdsk = 0;
756 }
757#endif
758
759 if(hw_hdsk == 0){
760 if(sc->last_led_err[1] != 1)
761 printk(KERN_WARNING "%s: DSR not asserted\n", sc->name);
762 sc->last_led_err[1] = 1;
763 lmc_led_off(sc, LMC_MII16_LED1);
764 }
765 else {
766 if(sc->last_led_err[1] != 0)
767 printk(KERN_WARNING "%s: DSR now asserted\n", sc->name);
768 sc->last_led_err[1] = 0;
769 lmc_led_on(sc, LMC_MII16_LED1);
770 }
771
772 if(ret == 1) {
773 lmc_led_on(sc, LMC_MII16_LED2); /* Over all good status? */
774 }
775
776 return ret;
777}
778
779static void
780lmc_ssi_set_link_status (lmc_softc_t * const sc, int state)
781{
782 if (state == LMC_LINK_UP)
783 {
784 sc->lmc_miireg16 |= (LMC_MII16_SSI_DTR | LMC_MII16_SSI_RTS);
785 printk (LMC_PRINTF_FMT ": asserting DTR and RTS\n", LMC_PRINTF_ARGS);
786 }
787 else
788 {
789 sc->lmc_miireg16 &= ~(LMC_MII16_SSI_DTR | LMC_MII16_SSI_RTS);
790 printk (LMC_PRINTF_FMT ": deasserting DTR and RTS\n", LMC_PRINTF_ARGS);
791 }
792
793 lmc_mii_writereg (sc, 0, 16, sc->lmc_miireg16);
794
795}
796
797/*
798 * 0 == 16bit, 1 == 32bit
799 */
800static void
801lmc_ssi_set_crc_length (lmc_softc_t * const sc, int state)
802{
803 if (state == LMC_CTL_CRC_LENGTH_32)
804 {
805 /* 32 bit */
806 sc->lmc_miireg16 |= LMC_MII16_SSI_CRC;
807 sc->ictl.crc_length = LMC_CTL_CRC_LENGTH_32;
808 sc->lmc_crcSize = LMC_CTL_CRC_BYTESIZE_4;
809
810 }
811 else
812 {
813 /* 16 bit */
814 sc->lmc_miireg16 &= ~LMC_MII16_SSI_CRC;
815 sc->ictl.crc_length = LMC_CTL_CRC_LENGTH_16;
816 sc->lmc_crcSize = LMC_CTL_CRC_BYTESIZE_2;
817 }
818
819 lmc_mii_writereg (sc, 0, 16, sc->lmc_miireg16);
820}
821
822/*
823 * These are bits to program the ssi frequency generator
824 */
825static inline void
826write_av9110_bit (lmc_softc_t * sc, int c)
827{
828 /*
829 * set the data bit as we need it.
830 */
831 sc->lmc_gpio &= ~(LMC_GEP_CLK);
832 if (c & 0x01)
833 sc->lmc_gpio |= LMC_GEP_DATA;
834 else
835 sc->lmc_gpio &= ~(LMC_GEP_DATA);
836 LMC_CSR_WRITE (sc, csr_gp, sc->lmc_gpio);
837
838 /*
839 * set the clock to high
840 */
841 sc->lmc_gpio |= LMC_GEP_CLK;
842 LMC_CSR_WRITE (sc, csr_gp, sc->lmc_gpio);
843
844 /*
845 * set the clock to low again.
846 */
847 sc->lmc_gpio &= ~(LMC_GEP_CLK);
848 LMC_CSR_WRITE (sc, csr_gp, sc->lmc_gpio);
849}
850
851static void
852write_av9110 (lmc_softc_t * sc, u_int32_t n, u_int32_t m, u_int32_t v,
853 u_int32_t x, u_int32_t r)
854{
855 int i;
856
857#if 0
858 printk (LMC_PRINTF_FMT ": speed %u, %d %d %d %d %d\n",
859 LMC_PRINTF_ARGS, sc->ictl.clock_rate, n, m, v, x, r);
860#endif
861
862 sc->lmc_gpio |= LMC_GEP_SSI_GENERATOR;
863 sc->lmc_gpio &= ~(LMC_GEP_DATA | LMC_GEP_CLK);
864 LMC_CSR_WRITE (sc, csr_gp, sc->lmc_gpio);
865
866 /*
867 * Set the TXCLOCK, GENERATOR, SERIAL, and SERIALCLK
868 * as outputs.
869 */
870 lmc_gpio_mkoutput (sc, (LMC_GEP_DATA | LMC_GEP_CLK
871 | LMC_GEP_SSI_GENERATOR));
872
873 sc->lmc_gpio &= ~(LMC_GEP_SSI_GENERATOR);
874 LMC_CSR_WRITE (sc, csr_gp, sc->lmc_gpio);
875
876 /*
877 * a shifting we will go...
878 */
879 for (i = 0; i < 7; i++)
880 write_av9110_bit (sc, n >> i);
881 for (i = 0; i < 7; i++)
882 write_av9110_bit (sc, m >> i);
883 for (i = 0; i < 1; i++)
884 write_av9110_bit (sc, v >> i);
885 for (i = 0; i < 2; i++)
886 write_av9110_bit (sc, x >> i);
887 for (i = 0; i < 2; i++)
888 write_av9110_bit (sc, r >> i);
889 for (i = 0; i < 5; i++)
890 write_av9110_bit (sc, 0x17 >> i);
891
892 /*
893 * stop driving serial-related signals
894 */
895 lmc_gpio_mkinput (sc,
896 (LMC_GEP_DATA | LMC_GEP_CLK
897 | LMC_GEP_SSI_GENERATOR));
898}
899
900static void
901lmc_ssi_watchdog (lmc_softc_t * const sc)
902{
903 u_int16_t mii17;
904 struct ssicsr2
905 {
906 unsigned short dtr:1, dsr:1, rts:1, cable:3, crc:1, led0:1, led1:1,
907 led2:1, led3:1, fifo:1, ll:1, rl:1, tm:1, loop:1;
908 };
909 struct ssicsr2 *ssicsr;
910 mii17 = lmc_mii_readreg (sc, 0, 17);
911 ssicsr = (struct ssicsr2 *) &mii17;
912 if (ssicsr->cable == 7)
913 {
914 lmc_led_off (sc, LMC_MII16_LED2);
915 }
916 else
917 {
918 lmc_led_on (sc, LMC_MII16_LED2);
919 }
920
921}
922
923/*
924 * T1 methods
925 */
926
927/*
928 * The framer regs are multiplexed through MII regs 17 & 18
929 * write the register address to MII reg 17 and the * data to MII reg 18. */
930static void
931lmc_t1_write (lmc_softc_t * const sc, int a, int d)
932{
933 lmc_mii_writereg (sc, 0, 17, a);
934 lmc_mii_writereg (sc, 0, 18, d);
935}
936
937/* Save a warning
938static int
939lmc_t1_read (lmc_softc_t * const sc, int a)
940{
941 lmc_mii_writereg (sc, 0, 17, a);
942 return lmc_mii_readreg (sc, 0, 18);
943}
944*/
945
946
947static void
948lmc_t1_init (lmc_softc_t * const sc)
949{
950 u_int16_t mii16;
951 int i;
952
953 sc->ictl.cardtype = LMC_CTL_CARDTYPE_LMC1200;
954 mii16 = lmc_mii_readreg (sc, 0, 16);
955
956 /* reset 8370 */
957 mii16 &= ~LMC_MII16_T1_RST;
958 lmc_mii_writereg (sc, 0, 16, mii16 | LMC_MII16_T1_RST);
959 lmc_mii_writereg (sc, 0, 16, mii16);
960
961 /* set T1 or E1 line. Uses sc->lmcmii16 reg in function so update it */
962 sc->lmc_miireg16 = mii16;
963 lmc_t1_set_circuit_type(sc, LMC_CTL_CIRCUIT_TYPE_T1);
964 mii16 = sc->lmc_miireg16;
965
966 lmc_t1_write (sc, 0x01, 0x1B); /* CR0 - primary control */
967 lmc_t1_write (sc, 0x02, 0x42); /* JAT_CR - jitter atten config */
968 lmc_t1_write (sc, 0x14, 0x00); /* LOOP - loopback config */
969 lmc_t1_write (sc, 0x15, 0x00); /* DL3_TS - external data link timeslot */
970 lmc_t1_write (sc, 0x18, 0xFF); /* PIO - programmable I/O */
971 lmc_t1_write (sc, 0x19, 0x30); /* POE - programmable OE */
972 lmc_t1_write (sc, 0x1A, 0x0F); /* CMUX - clock input mux */
973 lmc_t1_write (sc, 0x20, 0x41); /* LIU_CR - RX LIU config */
974 lmc_t1_write (sc, 0x22, 0x76); /* RLIU_CR - RX LIU config */
975 lmc_t1_write (sc, 0x40, 0x03); /* RCR0 - RX config */
976 lmc_t1_write (sc, 0x45, 0x00); /* RALM - RX alarm config */
977 lmc_t1_write (sc, 0x46, 0x05); /* LATCH - RX alarm/err/cntr latch */
978 lmc_t1_write (sc, 0x68, 0x40); /* TLIU_CR - TX LIU config */
979 lmc_t1_write (sc, 0x70, 0x0D); /* TCR0 - TX framer config */
980 lmc_t1_write (sc, 0x71, 0x05); /* TCR1 - TX config */
981 lmc_t1_write (sc, 0x72, 0x0B); /* TFRM - TX frame format */
982 lmc_t1_write (sc, 0x73, 0x00); /* TERROR - TX error insert */
983 lmc_t1_write (sc, 0x74, 0x00); /* TMAN - TX manual Sa/FEBE config */
984 lmc_t1_write (sc, 0x75, 0x00); /* TALM - TX alarm signal config */
985 lmc_t1_write (sc, 0x76, 0x00); /* TPATT - TX test pattern config */
986 lmc_t1_write (sc, 0x77, 0x00); /* TLB - TX inband loopback config */
987 lmc_t1_write (sc, 0x90, 0x05); /* CLAD_CR - clock rate adapter config */
988 lmc_t1_write (sc, 0x91, 0x05); /* CSEL - clad freq sel */
989 lmc_t1_write (sc, 0xA6, 0x00); /* DL1_CTL - DL1 control */
990 lmc_t1_write (sc, 0xB1, 0x00); /* DL2_CTL - DL2 control */
991 lmc_t1_write (sc, 0xD0, 0x47); /* SBI_CR - sys bus iface config */
992 lmc_t1_write (sc, 0xD1, 0x70); /* RSB_CR - RX sys bus config */
993 lmc_t1_write (sc, 0xD4, 0x30); /* TSB_CR - TX sys bus config */
994 for (i = 0; i < 32; i++)
995 {
996 lmc_t1_write (sc, 0x0E0 + i, 0x00); /* SBCn - sys bus per-channel ctl */
997 lmc_t1_write (sc, 0x100 + i, 0x00); /* TPCn - TX per-channel ctl */
998 lmc_t1_write (sc, 0x180 + i, 0x00); /* RPCn - RX per-channel ctl */
999 }
1000 for (i = 1; i < 25; i++)
1001 {
1002 lmc_t1_write (sc, 0x0E0 + i, 0x0D); /* SBCn - sys bus per-channel ctl */
1003 }
1004
1005 mii16 |= LMC_MII16_T1_XOE;
1006 lmc_mii_writereg (sc, 0, 16, mii16);
1007 sc->lmc_miireg16 = mii16;
1008}
1009
1010static void
1011lmc_t1_default (lmc_softc_t * const sc)
1012{
1013 sc->lmc_miireg16 = LMC_MII16_LED_ALL;
1014 sc->lmc_media->set_link_status (sc, LMC_LINK_DOWN);
1015 sc->lmc_media->set_circuit_type (sc, LMC_CTL_CIRCUIT_TYPE_T1);
1016 sc->lmc_media->set_crc_length (sc, LMC_CTL_CRC_LENGTH_16);
1017 /* Right now we can only clock from out internal source */
1018 sc->ictl.clock_source = LMC_CTL_CLOCK_SOURCE_INT;
1019}
1020/* * Given a user provided state, set ourselves up to match it. This will * always reset the card if needed.
1021 */
1022static void
1023lmc_t1_set_status (lmc_softc_t * const sc, lmc_ctl_t * ctl)
1024{
1025 if (ctl == NULL)
1026 {
1027 sc->lmc_media->set_circuit_type (sc, sc->ictl.circuit_type);
1028 lmc_set_protocol (sc, NULL);
1029
1030 return;
1031 }
1032 /*
1033 * check for change in circuit type */
1034 if (ctl->circuit_type == LMC_CTL_CIRCUIT_TYPE_T1
1035 && sc->ictl.circuit_type ==
1036 LMC_CTL_CIRCUIT_TYPE_E1) sc->lmc_media->set_circuit_type (sc,
1037 LMC_CTL_CIRCUIT_TYPE_E1);
1038 else if (ctl->circuit_type == LMC_CTL_CIRCUIT_TYPE_E1
1039 && sc->ictl.circuit_type == LMC_CTL_CIRCUIT_TYPE_T1)
1040 sc->lmc_media->set_circuit_type (sc, LMC_CTL_CIRCUIT_TYPE_T1);
1041 lmc_set_protocol (sc, ctl);
1042}
1043/*
1044 * return hardware link status.
1045 * 0 == link is down, 1 == link is up.
1046 */ static int
1047lmc_t1_get_link_status (lmc_softc_t * const sc)
1048{
1049 u_int16_t link_status;
1050 int ret = 1;
1051
1052 /* LMC5245 (DS3) & LMC1200 (DS1) LED definitions
1053 * led0 yellow = far-end adapter is in Red alarm condition
1054 * led1 blue = received an Alarm Indication signal
1055 * (upstream failure)
1056 * led2 Green = power to adapter, Gate Array loaded & driver
1057 * attached
1058 * led3 red = Loss of Signal (LOS) or out of frame (OOF)
1059 * conditions detected on T3 receive signal
1060 */
1061 lmc_trace(sc->lmc_device, "lmc_t1_get_link_status in");
1062 lmc_led_on(sc, LMC_DS3_LED2);
1063
1064 lmc_mii_writereg (sc, 0, 17, T1FRAMER_ALARM1_STATUS);
1065 link_status = lmc_mii_readreg (sc, 0, 18);
1066
1067
1068 if (link_status & T1F_RAIS) { /* turn on blue LED */
1069 ret = 0;
1070 if(sc->last_led_err[1] != 1){
1071 printk(KERN_WARNING "%s: Receive AIS/Blue Alarm. Far end in RED alarm\n", sc->name);
1072 }
1073 lmc_led_on(sc, LMC_DS3_LED1);
1074 sc->last_led_err[1] = 1;
1075 }
1076 else {
1077 if(sc->last_led_err[1] != 0){
1078 printk(KERN_WARNING "%s: End AIS/Blue Alarm\n", sc->name);
1079 }
1080 lmc_led_off (sc, LMC_DS3_LED1);
1081 sc->last_led_err[1] = 0;
1082 }
1083
1084 /*
1085 * Yellow Alarm is nasty evil stuff, looks at data patterns
1086 * inside the channel and confuses it with HDLC framing
1087 * ignore all yellow alarms.
1088 *
1089 * Do listen to MultiFrame Yellow alarm which while implemented
1090 * different ways isn't in the channel and hence somewhat
1091 * more reliable
1092 */
1093
1094 if (link_status & T1F_RMYEL) {
1095 ret = 0;
1096 if(sc->last_led_err[0] != 1){
1097 printk(KERN_WARNING "%s: Receive Yellow AIS Alarm\n", sc->name);
1098 }
1099 lmc_led_on(sc, LMC_DS3_LED0);
1100 sc->last_led_err[0] = 1;
1101 }
1102 else {
1103 if(sc->last_led_err[0] != 0){
1104 printk(KERN_WARNING "%s: End of Yellow AIS Alarm\n", sc->name);
1105 }
1106 lmc_led_off(sc, LMC_DS3_LED0);
1107 sc->last_led_err[0] = 0;
1108 }
1109
1110 /*
1111 * Loss of signal and los of frame
1112 * Use the green bit to identify which one lit the led
1113 */
1114 if(link_status & T1F_RLOF){
1115 ret = 0;
1116 if(sc->last_led_err[3] != 1){
1117 printk(KERN_WARNING "%s: Local Red Alarm: Loss of Framing\n", sc->name);
1118 }
1119 lmc_led_on(sc, LMC_DS3_LED3);
1120 sc->last_led_err[3] = 1;
1121
1122 }
1123 else {
1124 if(sc->last_led_err[3] != 0){
1125 printk(KERN_WARNING "%s: End Red Alarm (LOF)\n", sc->name);
1126 }
1127 if( ! (link_status & T1F_RLOS))
1128 lmc_led_off(sc, LMC_DS3_LED3);
1129 sc->last_led_err[3] = 0;
1130 }
1131
1132 if(link_status & T1F_RLOS){
1133 ret = 0;
1134 if(sc->last_led_err[2] != 1){
1135 printk(KERN_WARNING "%s: Local Red Alarm: Loss of Signal\n", sc->name);
1136 }
1137 lmc_led_on(sc, LMC_DS3_LED3);
1138 sc->last_led_err[2] = 1;
1139
1140 }
1141 else {
1142 if(sc->last_led_err[2] != 0){
1143 printk(KERN_WARNING "%s: End Red Alarm (LOS)\n", sc->name);
1144 }
1145 if( ! (link_status & T1F_RLOF))
1146 lmc_led_off(sc, LMC_DS3_LED3);
1147 sc->last_led_err[2] = 0;
1148 }
1149
1150 sc->lmc_xinfo.t1_alarm1_status = link_status;
1151
1152 lmc_mii_writereg (sc, 0, 17, T1FRAMER_ALARM2_STATUS);
1153 sc->lmc_xinfo.t1_alarm2_status = lmc_mii_readreg (sc, 0, 18);
1154
1155
1156 lmc_trace(sc->lmc_device, "lmc_t1_get_link_status out");
1157
1158 return ret;
1159}
1160
1161/*
1162 * 1 == T1 Circuit Type , 0 == E1 Circuit Type
1163 */
1164static void
1165lmc_t1_set_circuit_type (lmc_softc_t * const sc, int ie)
1166{
1167 if (ie == LMC_CTL_CIRCUIT_TYPE_T1) {
1168 sc->lmc_miireg16 |= LMC_MII16_T1_Z;
1169 sc->ictl.circuit_type = LMC_CTL_CIRCUIT_TYPE_T1;
1170 printk(KERN_INFO "%s: In T1 Mode\n", sc->name);
1171 }
1172 else {
1173 sc->lmc_miireg16 &= ~LMC_MII16_T1_Z;
1174 sc->ictl.circuit_type = LMC_CTL_CIRCUIT_TYPE_E1;
1175 printk(KERN_INFO "%s: In E1 Mode\n", sc->name);
1176 }
1177
1178 lmc_mii_writereg (sc, 0, 16, sc->lmc_miireg16);
1179
1180}
1181
1182/*
1183 * 0 == 16bit, 1 == 32bit */
1184static void
1185lmc_t1_set_crc_length (lmc_softc_t * const sc, int state)
1186{
1187 if (state == LMC_CTL_CRC_LENGTH_32)
1188 {
1189 /* 32 bit */
1190 sc->lmc_miireg16 |= LMC_MII16_T1_CRC;
1191 sc->ictl.crc_length = LMC_CTL_CRC_LENGTH_32;
1192 sc->lmc_crcSize = LMC_CTL_CRC_BYTESIZE_4;
1193
1194 }
1195 else
1196 {
1197 /* 16 bit */ sc->lmc_miireg16 &= ~LMC_MII16_T1_CRC;
1198 sc->ictl.crc_length = LMC_CTL_CRC_LENGTH_16;
1199 sc->lmc_crcSize = LMC_CTL_CRC_BYTESIZE_2;
1200
1201 }
1202
1203 lmc_mii_writereg (sc, 0, 16, sc->lmc_miireg16);
1204}
1205
1206/*
1207 * 1 == internal, 0 == external
1208 */
1209static void
1210lmc_t1_set_clock (lmc_softc_t * const sc, int ie)
1211{
1212 int old;
1213 old = ie;
1214 if (ie == LMC_CTL_CLOCK_SOURCE_EXT)
1215 {
1216 sc->lmc_gpio &= ~(LMC_GEP_SSI_TXCLOCK);
1217 LMC_CSR_WRITE (sc, csr_gp, sc->lmc_gpio);
1218 sc->ictl.clock_source = LMC_CTL_CLOCK_SOURCE_EXT;
1219 if(old != ie)
1220 printk (LMC_PRINTF_FMT ": clock external\n", LMC_PRINTF_ARGS);
1221 }
1222 else
1223 {
1224 sc->lmc_gpio |= LMC_GEP_SSI_TXCLOCK;
1225 LMC_CSR_WRITE (sc, csr_gp, sc->lmc_gpio);
1226 sc->ictl.clock_source = LMC_CTL_CLOCK_SOURCE_INT;
1227 if(old != ie)
1228 printk (LMC_PRINTF_FMT ": clock internal\n", LMC_PRINTF_ARGS);
1229 }
1230}
1231
1232static void
1233lmc_t1_watchdog (lmc_softc_t * const sc)
1234{
1235}
1236
1237static void
1238lmc_set_protocol (lmc_softc_t * const sc, lmc_ctl_t * ctl)
1239{
1240 if (ctl == 0)
1241 {
1242 sc->ictl.keepalive_onoff = LMC_CTL_ON;
1243
1244 return;
1245 }
1246}
diff --git a/drivers/net/wan/lmc/lmc_media.h b/drivers/net/wan/lmc/lmc_media.h
new file mode 100644
index 000000000000..ddcc00403563
--- /dev/null
+++ b/drivers/net/wan/lmc/lmc_media.h
@@ -0,0 +1,65 @@
1#ifndef _LMC_MEDIA_H_
2#define _LMC_MEDIA_H_
3
4lmc_media_t lmc_ds3_media = {
5 lmc_ds3_init, /* special media init stuff */
6 lmc_ds3_default, /* reset to default state */
7 lmc_ds3_set_status, /* reset status to state provided */
8 lmc_dummy_set_1, /* set clock source */
9 lmc_dummy_set2_1, /* set line speed */
10 lmc_ds3_set_100ft, /* set cable length */
11 lmc_ds3_set_scram, /* set scrambler */
12 lmc_ds3_get_link_status, /* get link status */
13 lmc_dummy_set_1, /* set link status */
14 lmc_ds3_set_crc_length, /* set CRC length */
15 lmc_dummy_set_1, /* set T1 or E1 circuit type */
16 lmc_ds3_watchdog
17};
18
19lmc_media_t lmc_hssi_media = {
20 lmc_hssi_init, /* special media init stuff */
21 lmc_hssi_default, /* reset to default state */
22 lmc_hssi_set_status, /* reset status to state provided */
23 lmc_hssi_set_clock, /* set clock source */
24 lmc_dummy_set2_1, /* set line speed */
25 lmc_dummy_set_1, /* set cable length */
26 lmc_dummy_set_1, /* set scrambler */
27 lmc_hssi_get_link_status, /* get link status */
28 lmc_hssi_set_link_status, /* set link status */
29 lmc_hssi_set_crc_length, /* set CRC length */
30 lmc_dummy_set_1, /* set T1 or E1 circuit type */
31 lmc_hssi_watchdog
32};
33
34lmc_media_t lmc_ssi_media = { lmc_ssi_init, /* special media init stuff */
35 lmc_ssi_default, /* reset to default state */
36 lmc_ssi_set_status, /* reset status to state provided */
37 lmc_ssi_set_clock, /* set clock source */
38 lmc_ssi_set_speed, /* set line speed */
39 lmc_dummy_set_1, /* set cable length */
40 lmc_dummy_set_1, /* set scrambler */
41 lmc_ssi_get_link_status, /* get link status */
42 lmc_ssi_set_link_status, /* set link status */
43 lmc_ssi_set_crc_length, /* set CRC length */
44 lmc_dummy_set_1, /* set T1 or E1 circuit type */
45 lmc_ssi_watchdog
46};
47
48lmc_media_t lmc_t1_media = {
49 lmc_t1_init, /* special media init stuff */
50 lmc_t1_default, /* reset to default state */
51 lmc_t1_set_status, /* reset status to state provided */
52 lmc_t1_set_clock, /* set clock source */
53 lmc_dummy_set2_1, /* set line speed */
54 lmc_dummy_set_1, /* set cable length */
55 lmc_dummy_set_1, /* set scrambler */
56 lmc_t1_get_link_status, /* get link status */
57 lmc_dummy_set_1, /* set link status */
58 lmc_t1_set_crc_length, /* set CRC length */
59 lmc_t1_set_circuit_type, /* set T1 or E1 circuit type */
60 lmc_t1_watchdog
61};
62
63
64#endif
65
diff --git a/drivers/net/wan/lmc/lmc_prot.h b/drivers/net/wan/lmc/lmc_prot.h
new file mode 100644
index 000000000000..f3b1df9e2cdb
--- /dev/null
+++ b/drivers/net/wan/lmc/lmc_prot.h
@@ -0,0 +1,15 @@
1#ifndef _LMC_PROTO_H_
2#define _LMC_PROTO_H_
3
4void lmc_proto_init(lmc_softc_t * const)
5void lmc_proto_attach(lmc_softc_t *sc const)
6void lmc_proto_detach(lmc_softc *sc const)
7void lmc_proto_reopen(lmc_softc_t *sc const)
8int lmc_proto_ioctl(lmc_softc_t *sc const, struct ifreq *ifr, int cmd)
9void lmc_proto_open(lmc_softc_t *sc const)
10void lmc_proto_close(lmc_softc_t *sc const)
11unsigned short lmc_proto_type(lmc_softc_t *sc const, struct skbuff *skb)
12
13
14#endif
15
diff --git a/drivers/net/wan/lmc/lmc_proto.c b/drivers/net/wan/lmc/lmc_proto.c
new file mode 100644
index 000000000000..74876c0073e8
--- /dev/null
+++ b/drivers/net/wan/lmc/lmc_proto.c
@@ -0,0 +1,249 @@
1 /*
2 * Copyright (c) 1997-2000 LAN Media Corporation (LMC)
3 * All rights reserved. www.lanmedia.com
4 *
5 * This code is written by:
6 * Andrew Stanley-Jones (asj@cban.com)
7 * Rob Braun (bbraun@vix.com),
8 * Michael Graff (explorer@vix.com) and
9 * Matt Thomas (matt@3am-software.com).
10 *
11 * With Help By:
12 * David Boggs
13 * Ron Crane
14 * Allan Cox
15 *
16 * This software may be used and distributed according to the terms
17 * of the GNU General Public License version 2, incorporated herein by reference.
18 *
19 * Driver for the LanMedia LMC5200, LMC5245, LMC1000, LMC1200 cards.
20 */
21
22#include <linux/kernel.h>
23#include <linux/string.h>
24#include <linux/timer.h>
25#include <linux/ptrace.h>
26#include <linux/errno.h>
27#include <linux/ioport.h>
28#include <linux/slab.h>
29#include <linux/interrupt.h>
30#include <linux/pci.h>
31#include <linux/in.h>
32#include <linux/if_arp.h>
33#include <linux/netdevice.h>
34#include <linux/etherdevice.h>
35#include <linux/skbuff.h>
36#include <linux/inet.h>
37#include <linux/workqueue.h>
38#include <linux/proc_fs.h>
39#include <linux/bitops.h>
40
41#include <net/syncppp.h>
42
43#include <asm/processor.h> /* Processor type for cache alignment. */
44#include <asm/io.h>
45#include <asm/dma.h>
46#include <linux/smp.h>
47
48#include "lmc.h"
49#include "lmc_var.h"
50#include "lmc_debug.h"
51#include "lmc_ioctl.h"
52#include "lmc_proto.h"
53
54/*
55 * The compile-time variable SPPPSTUP causes the module to be
56 * compiled without referencing any of the sync ppp routines.
57 */
58#ifdef SPPPSTUB
59#define SPPP_detach(d) (void)0
60#define SPPP_open(d) 0
61#define SPPP_reopen(d) (void)0
62#define SPPP_close(d) (void)0
63#define SPPP_attach(d) (void)0
64#define SPPP_do_ioctl(d,i,c) -EOPNOTSUPP
65#else
66#define SPPP_attach(x) sppp_attach((x)->pd)
67#define SPPP_detach(x) sppp_detach((x)->pd->dev)
68#define SPPP_open(x) sppp_open((x)->pd->dev)
69#define SPPP_reopen(x) sppp_reopen((x)->pd->dev)
70#define SPPP_close(x) sppp_close((x)->pd->dev)
71#define SPPP_do_ioctl(x, y, z) sppp_do_ioctl((x)->pd->dev, (y), (z))
72#endif
73
74// init
75void lmc_proto_init(lmc_softc_t *sc) /*FOLD00*/
76{
77 lmc_trace(sc->lmc_device, "lmc_proto_init in");
78 switch(sc->if_type){
79 case LMC_PPP:
80 sc->pd = kmalloc(sizeof(struct ppp_device), GFP_KERNEL);
81 if (!sc->pd) {
82 printk("lmc_proto_init(): kmalloc failure!\n");
83 return;
84 }
85 sc->pd->dev = sc->lmc_device;
86 sc->if_ptr = sc->pd;
87 break;
88 case LMC_RAW:
89 break;
90 default:
91 break;
92 }
93 lmc_trace(sc->lmc_device, "lmc_proto_init out");
94}
95
96// attach
97void lmc_proto_attach(lmc_softc_t *sc) /*FOLD00*/
98{
99 lmc_trace(sc->lmc_device, "lmc_proto_attach in");
100 switch(sc->if_type){
101 case LMC_PPP:
102 {
103 struct net_device *dev = sc->lmc_device;
104 SPPP_attach(sc);
105 dev->do_ioctl = lmc_ioctl;
106 }
107 break;
108 case LMC_NET:
109 {
110 struct net_device *dev = sc->lmc_device;
111 /*
112 * They set a few basics because they don't use sync_ppp
113 */
114 dev->flags |= IFF_POINTOPOINT;
115 dev->hard_header = NULL;
116 dev->hard_header_len = 0;
117 dev->addr_len = 0;
118 }
119 case LMC_RAW: /* Setup the task queue, maybe we should notify someone? */
120 {
121 }
122 default:
123 break;
124 }
125 lmc_trace(sc->lmc_device, "lmc_proto_attach out");
126}
127
128// detach
129void lmc_proto_detach(lmc_softc_t *sc) /*FOLD00*/
130{
131 switch(sc->if_type){
132 case LMC_PPP:
133 SPPP_detach(sc);
134 break;
135 case LMC_RAW: /* Tell someone we're detaching? */
136 break;
137 default:
138 break;
139 }
140
141}
142
143// reopen
144void lmc_proto_reopen(lmc_softc_t *sc) /*FOLD00*/
145{
146 lmc_trace(sc->lmc_device, "lmc_proto_reopen in");
147 switch(sc->if_type){
148 case LMC_PPP:
149 SPPP_reopen(sc);
150 break;
151 case LMC_RAW: /* Reset the interface after being down, prerape to receive packets again */
152 break;
153 default:
154 break;
155 }
156 lmc_trace(sc->lmc_device, "lmc_proto_reopen out");
157}
158
159
160// ioctl
161int lmc_proto_ioctl(lmc_softc_t *sc, struct ifreq *ifr, int cmd) /*FOLD00*/
162{
163 lmc_trace(sc->lmc_device, "lmc_proto_ioctl out");
164 switch(sc->if_type){
165 case LMC_PPP:
166 return SPPP_do_ioctl (sc, ifr, cmd);
167 break;
168 default:
169 return -EOPNOTSUPP;
170 break;
171 }
172 lmc_trace(sc->lmc_device, "lmc_proto_ioctl out");
173}
174
175// open
176void lmc_proto_open(lmc_softc_t *sc) /*FOLD00*/
177{
178 int ret;
179
180 lmc_trace(sc->lmc_device, "lmc_proto_open in");
181 switch(sc->if_type){
182 case LMC_PPP:
183 ret = SPPP_open(sc);
184 if(ret < 0)
185 printk("%s: syncPPP open failed: %d\n", sc->name, ret);
186 break;
187 case LMC_RAW: /* We're about to start getting packets! */
188 break;
189 default:
190 break;
191 }
192 lmc_trace(sc->lmc_device, "lmc_proto_open out");
193}
194
195// close
196
197void lmc_proto_close(lmc_softc_t *sc) /*FOLD00*/
198{
199 lmc_trace(sc->lmc_device, "lmc_proto_close in");
200 switch(sc->if_type){
201 case LMC_PPP:
202 SPPP_close(sc);
203 break;
204 case LMC_RAW: /* Interface going down */
205 break;
206 default:
207 break;
208 }
209 lmc_trace(sc->lmc_device, "lmc_proto_close out");
210}
211
212unsigned short lmc_proto_type(lmc_softc_t *sc, struct sk_buff *skb) /*FOLD00*/
213{
214 lmc_trace(sc->lmc_device, "lmc_proto_type in");
215 switch(sc->if_type){
216 case LMC_PPP:
217 return htons(ETH_P_WAN_PPP);
218 break;
219 case LMC_NET:
220 return htons(ETH_P_802_2);
221 break;
222 case LMC_RAW: /* Packet type for skbuff kind of useless */
223 return htons(ETH_P_802_2);
224 break;
225 default:
226 printk(KERN_WARNING "%s: No protocol set for this interface, assuming 802.2 (which is wrong!!)\n", sc->name);
227 return htons(ETH_P_802_2);
228 break;
229 }
230 lmc_trace(sc->lmc_device, "lmc_proto_tye out");
231
232}
233
234void lmc_proto_netif(lmc_softc_t *sc, struct sk_buff *skb) /*FOLD00*/
235{
236 lmc_trace(sc->lmc_device, "lmc_proto_netif in");
237 switch(sc->if_type){
238 case LMC_PPP:
239 case LMC_NET:
240 default:
241 skb->dev->last_rx = jiffies;
242 netif_rx(skb);
243 break;
244 case LMC_RAW:
245 break;
246 }
247 lmc_trace(sc->lmc_device, "lmc_proto_netif out");
248}
249
diff --git a/drivers/net/wan/lmc/lmc_proto.h b/drivers/net/wan/lmc/lmc_proto.h
new file mode 100644
index 000000000000..080a55773349
--- /dev/null
+++ b/drivers/net/wan/lmc/lmc_proto.h
@@ -0,0 +1,16 @@
1#ifndef _LMC_PROTO_H_
2#define _LMC_PROTO_H_
3
4void lmc_proto_init(lmc_softc_t *sc);
5void lmc_proto_attach(lmc_softc_t *sc);
6void lmc_proto_detach(lmc_softc_t *sc);
7void lmc_proto_reopen(lmc_softc_t *sc);
8int lmc_proto_ioctl(lmc_softc_t *sc, struct ifreq *ifr, int cmd);
9void lmc_proto_open(lmc_softc_t *sc);
10void lmc_proto_close(lmc_softc_t *sc);
11unsigned short lmc_proto_type(lmc_softc_t *sc, struct sk_buff *skb);
12void lmc_proto_netif(lmc_softc_t *sc, struct sk_buff *skb);
13int lmc_skb_rawpackets(char *buf, char **start, off_t offset, int len, int unused);
14
15#endif
16
diff --git a/drivers/net/wan/lmc/lmc_var.h b/drivers/net/wan/lmc/lmc_var.h
new file mode 100644
index 000000000000..6d003a39bfad
--- /dev/null
+++ b/drivers/net/wan/lmc/lmc_var.h
@@ -0,0 +1,570 @@
1#ifndef _LMC_VAR_H_
2#define _LMC_VAR_H_
3
4/* $Id: lmc_var.h,v 1.17 2000/04/06 12:16:47 asj Exp $ */
5
6 /*
7 * Copyright (c) 1997-2000 LAN Media Corporation (LMC)
8 * All rights reserved. www.lanmedia.com
9 *
10 * This code is written by:
11 * Andrew Stanley-Jones (asj@cban.com)
12 * Rob Braun (bbraun@vix.com),
13 * Michael Graff (explorer@vix.com) and
14 * Matt Thomas (matt@3am-software.com).
15 *
16 * This software may be used and distributed according to the terms
17 * of the GNU General Public License version 2, incorporated herein by reference.
18 */
19
20#include <linux/timer.h>
21
22#ifndef __KERNEL__
23typedef signed char s8;
24typedef unsigned char u8;
25
26typedef signed short s16;
27typedef unsigned short u16;
28
29typedef signed int s32;
30typedef unsigned int u32;
31
32typedef signed long long s64;
33typedef unsigned long long u64;
34
35#define BITS_PER_LONG 32
36
37#endif
38
39/*
40 * basic definitions used in lmc include files
41 */
42
43typedef struct lmc___softc lmc_softc_t;
44typedef struct lmc___media lmc_media_t;
45typedef struct lmc___ctl lmc_ctl_t;
46
47#define lmc_csrptr_t unsigned long
48#define u_int16_t u16
49#define u_int8_t u8
50#define tulip_uint32_t u32
51
52#define LMC_REG_RANGE 0x80
53
54#define LMC_PRINTF_FMT "%s"
55#define LMC_PRINTF_ARGS (sc->lmc_device->name)
56
57#define TX_TIMEOUT (2*HZ)
58
59#define LMC_TXDESCS 32
60#define LMC_RXDESCS 32
61
62#define LMC_LINK_UP 1
63#define LMC_LINK_DOWN 0
64
65/* These macros for generic read and write to and from the dec chip */
66#define LMC_CSR_READ(sc, csr) \
67 inl((sc)->lmc_csrs.csr)
68#define LMC_CSR_WRITE(sc, reg, val) \
69 outl((val), (sc)->lmc_csrs.reg)
70
71//#ifdef _LINUX_DELAY_H
72// #define SLOW_DOWN_IO udelay(2);
73// #undef __SLOW_DOWN_IO
74// #define __SLOW_DOWN_IO udelay(2);
75//#endif
76
77#define DELAY(n) SLOW_DOWN_IO
78
79#define lmc_delay() inl(sc->lmc_csrs.csr_9)
80
81/* This macro sync's up with the mii so that reads and writes can take place */
82#define LMC_MII_SYNC(sc) do {int n=32; while( n >= 0 ) { \
83 LMC_CSR_WRITE((sc), csr_9, 0x20000); \
84 lmc_delay(); \
85 LMC_CSR_WRITE((sc), csr_9, 0x30000); \
86 lmc_delay(); \
87 n--; }} while(0)
88
89struct lmc_regfile_t {
90 lmc_csrptr_t csr_busmode; /* CSR0 */
91 lmc_csrptr_t csr_txpoll; /* CSR1 */
92 lmc_csrptr_t csr_rxpoll; /* CSR2 */
93 lmc_csrptr_t csr_rxlist; /* CSR3 */
94 lmc_csrptr_t csr_txlist; /* CSR4 */
95 lmc_csrptr_t csr_status; /* CSR5 */
96 lmc_csrptr_t csr_command; /* CSR6 */
97 lmc_csrptr_t csr_intr; /* CSR7 */
98 lmc_csrptr_t csr_missed_frames; /* CSR8 */
99 lmc_csrptr_t csr_9; /* CSR9 */
100 lmc_csrptr_t csr_10; /* CSR10 */
101 lmc_csrptr_t csr_11; /* CSR11 */
102 lmc_csrptr_t csr_12; /* CSR12 */
103 lmc_csrptr_t csr_13; /* CSR13 */
104 lmc_csrptr_t csr_14; /* CSR14 */
105 lmc_csrptr_t csr_15; /* CSR15 */
106};
107
108#define csr_enetrom csr_9 /* 21040 */
109#define csr_reserved csr_10 /* 21040 */
110#define csr_full_duplex csr_11 /* 21040 */
111#define csr_bootrom csr_10 /* 21041/21140A/?? */
112#define csr_gp csr_12 /* 21140* */
113#define csr_watchdog csr_15 /* 21140* */
114#define csr_gp_timer csr_11 /* 21041/21140* */
115#define csr_srom_mii csr_9 /* 21041/21140* */
116#define csr_sia_status csr_12 /* 2104x */
117#define csr_sia_connectivity csr_13 /* 2104x */
118#define csr_sia_tx_rx csr_14 /* 2104x */
119#define csr_sia_general csr_15 /* 2104x */
120
121/* tulip length/control transmit descriptor definitions
122 * used to define bits in the second tulip_desc_t field (length)
123 * for the transmit descriptor -baz */
124
125#define LMC_TDES_FIRST_BUFFER_SIZE ((u_int32_t)(0x000007FF))
126#define LMC_TDES_SECOND_BUFFER_SIZE ((u_int32_t)(0x003FF800))
127#define LMC_TDES_HASH_FILTERING ((u_int32_t)(0x00400000))
128#define LMC_TDES_DISABLE_PADDING ((u_int32_t)(0x00800000))
129#define LMC_TDES_SECOND_ADDR_CHAINED ((u_int32_t)(0x01000000))
130#define LMC_TDES_END_OF_RING ((u_int32_t)(0x02000000))
131#define LMC_TDES_ADD_CRC_DISABLE ((u_int32_t)(0x04000000))
132#define LMC_TDES_SETUP_PACKET ((u_int32_t)(0x08000000))
133#define LMC_TDES_INVERSE_FILTERING ((u_int32_t)(0x10000000))
134#define LMC_TDES_FIRST_SEGMENT ((u_int32_t)(0x20000000))
135#define LMC_TDES_LAST_SEGMENT ((u_int32_t)(0x40000000))
136#define LMC_TDES_INTERRUPT_ON_COMPLETION ((u_int32_t)(0x80000000))
137
138#define TDES_SECOND_BUFFER_SIZE_BIT_NUMBER 11
139#define TDES_COLLISION_COUNT_BIT_NUMBER 3
140
141/* Constants for the RCV descriptor RDES */
142
143#define LMC_RDES_OVERFLOW ((u_int32_t)(0x00000001))
144#define LMC_RDES_CRC_ERROR ((u_int32_t)(0x00000002))
145#define LMC_RDES_DRIBBLING_BIT ((u_int32_t)(0x00000004))
146#define LMC_RDES_REPORT_ON_MII_ERR ((u_int32_t)(0x00000008))
147#define LMC_RDES_RCV_WATCHDOG_TIMEOUT ((u_int32_t)(0x00000010))
148#define LMC_RDES_FRAME_TYPE ((u_int32_t)(0x00000020))
149#define LMC_RDES_COLLISION_SEEN ((u_int32_t)(0x00000040))
150#define LMC_RDES_FRAME_TOO_LONG ((u_int32_t)(0x00000080))
151#define LMC_RDES_LAST_DESCRIPTOR ((u_int32_t)(0x00000100))
152#define LMC_RDES_FIRST_DESCRIPTOR ((u_int32_t)(0x00000200))
153#define LMC_RDES_MULTICAST_FRAME ((u_int32_t)(0x00000400))
154#define LMC_RDES_RUNT_FRAME ((u_int32_t)(0x00000800))
155#define LMC_RDES_DATA_TYPE ((u_int32_t)(0x00003000))
156#define LMC_RDES_LENGTH_ERROR ((u_int32_t)(0x00004000))
157#define LMC_RDES_ERROR_SUMMARY ((u_int32_t)(0x00008000))
158#define LMC_RDES_FRAME_LENGTH ((u_int32_t)(0x3FFF0000))
159#define LMC_RDES_OWN_BIT ((u_int32_t)(0x80000000))
160
161#define RDES_FRAME_LENGTH_BIT_NUMBER 16
162
163#define LMC_RDES_ERROR_MASK ( (u_int32_t)( \
164 LMC_RDES_OVERFLOW \
165 | LMC_RDES_DRIBBLING_BIT \
166 | LMC_RDES_REPORT_ON_MII_ERR \
167 | LMC_RDES_COLLISION_SEEN ) )
168
169
170/*
171 * Ioctl info
172 */
173
174typedef struct {
175 u_int32_t n;
176 u_int32_t m;
177 u_int32_t v;
178 u_int32_t x;
179 u_int32_t r;
180 u_int32_t f;
181 u_int32_t exact;
182} lmc_av9110_t;
183
184/*
185 * Common structure passed to the ioctl code.
186 */
187struct lmc___ctl {
188 u_int32_t cardtype;
189 u_int32_t clock_source; /* HSSI, T1 */
190 u_int32_t clock_rate; /* T1 */
191 u_int32_t crc_length;
192 u_int32_t cable_length; /* DS3 */
193 u_int32_t scrambler_onoff; /* DS3 */
194 u_int32_t cable_type; /* T1 */
195 u_int32_t keepalive_onoff; /* protocol */
196 u_int32_t ticks; /* ticks/sec */
197 union {
198 lmc_av9110_t ssi;
199 } cardspec;
200 u_int32_t circuit_type; /* T1 or E1 */
201};
202
203
204/*
205 * Carefull, look at the data sheet, there's more to this
206 * structure than meets the eye. It should probably be:
207 *
208 * struct tulip_desc_t {
209 * u8 own:1;
210 * u32 status:31;
211 * u32 control:10;
212 * u32 buffer1;
213 * u32 buffer2;
214 * };
215 * You could also expand status control to provide more bit information
216 */
217
218struct tulip_desc_t {
219 s32 status;
220 s32 length;
221 u32 buffer1;
222 u32 buffer2;
223};
224
225/*
226 * media independent methods to check on media status, link, light LEDs,
227 * etc.
228 */
229struct lmc___media {
230 void (* init)(lmc_softc_t * const);
231 void (* defaults)(lmc_softc_t * const);
232 void (* set_status)(lmc_softc_t * const, lmc_ctl_t *);
233 void (* set_clock_source)(lmc_softc_t * const, int);
234 void (* set_speed)(lmc_softc_t * const, lmc_ctl_t *);
235 void (* set_cable_length)(lmc_softc_t * const, int);
236 void (* set_scrambler)(lmc_softc_t * const, int);
237 int (* get_link_status)(lmc_softc_t * const);
238 void (* set_link_status)(lmc_softc_t * const, int);
239 void (* set_crc_length)(lmc_softc_t * const, int);
240 void (* set_circuit_type)(lmc_softc_t * const, int);
241 void (* watchdog)(lmc_softc_t * const);
242};
243
244
245#define STATCHECK 0xBEEFCAFE
246
247/* Included in this structure are first
248 * - standard net_device_stats
249 * - some other counters used for debug and driver performance
250 * evaluation -baz
251 */
252struct lmc_statistics
253{
254 unsigned long rx_packets; /* total packets received */
255 unsigned long tx_packets; /* total packets transmitted */
256 unsigned long rx_bytes;
257 unsigned long tx_bytes;
258
259 unsigned long rx_errors; /* bad packets received */
260 unsigned long tx_errors; /* packet transmit problems */
261 unsigned long rx_dropped; /* no space in linux buffers */
262 unsigned long tx_dropped; /* no space available in linux */
263 unsigned long multicast; /* multicast packets received */
264 unsigned long collisions;
265
266 /* detailed rx_errors: */
267 unsigned long rx_length_errors;
268 unsigned long rx_over_errors; /* receiver ring buff overflow */
269 unsigned long rx_crc_errors; /* recved pkt with crc error */
270 unsigned long rx_frame_errors; /* recv'd frame alignment error */
271 unsigned long rx_fifo_errors; /* recv'r fifo overrun */
272 unsigned long rx_missed_errors; /* receiver missed packet */
273
274 /* detailed tx_errors */
275 unsigned long tx_aborted_errors;
276 unsigned long tx_carrier_errors;
277 unsigned long tx_fifo_errors;
278 unsigned long tx_heartbeat_errors;
279 unsigned long tx_window_errors;
280
281 /* for cslip etc */
282 unsigned long rx_compressed;
283 unsigned long tx_compressed;
284
285 /* -------------------------------------
286 * Custom stats & counters follow -baz */
287 u_int32_t version_size;
288 u_int32_t lmc_cardtype;
289
290 u_int32_t tx_ProcTimeout;
291 u_int32_t tx_IntTimeout;
292 u_int32_t tx_NoCompleteCnt;
293 u_int32_t tx_MaxXmtsB4Int;
294 u_int32_t tx_TimeoutCnt;
295 u_int32_t tx_OutOfSyncPtr;
296 u_int32_t tx_tbusy0;
297 u_int32_t tx_tbusy1;
298 u_int32_t tx_tbusy_calls;
299 u_int32_t resetCount;
300 u_int32_t lmc_txfull;
301 u_int32_t tbusy;
302 u_int32_t dirtyTx;
303 u_int32_t lmc_next_tx;
304 u_int32_t otherTypeCnt;
305 u_int32_t lastType;
306 u_int32_t lastTypeOK;
307 u_int32_t txLoopCnt;
308 u_int32_t usedXmtDescripCnt;
309 u_int32_t txIndexCnt;
310 u_int32_t rxIntLoopCnt;
311
312 u_int32_t rx_SmallPktCnt;
313 u_int32_t rx_BadPktSurgeCnt;
314 u_int32_t rx_BuffAllocErr;
315 u_int32_t tx_lossOfClockCnt;
316
317 /* T1 error counters */
318 u_int32_t framingBitErrorCount;
319 u_int32_t lineCodeViolationCount;
320
321 u_int32_t lossOfFrameCount;
322 u_int32_t changeOfFrameAlignmentCount;
323 u_int32_t severelyErroredFrameCount;
324
325 u_int32_t check;
326};
327
328
329typedef struct lmc_xinfo {
330 u_int32_t Magic0; /* BEEFCAFE */
331
332 u_int32_t PciCardType;
333 u_int32_t PciSlotNumber; /* PCI slot number */
334
335 u_int16_t DriverMajorVersion;
336 u_int16_t DriverMinorVersion;
337 u_int16_t DriverSubVersion;
338
339 u_int16_t XilinxRevisionNumber;
340 u_int16_t MaxFrameSize;
341
342 u_int16_t t1_alarm1_status;
343 u_int16_t t1_alarm2_status;
344
345 int link_status;
346 u_int32_t mii_reg16;
347
348 u_int32_t Magic1; /* DEADBEEF */
349} LMC_XINFO;
350
351
352/*
353 * forward decl
354 */
355struct lmc___softc {
356 void *if_ptr; /* General purpose pointer (used by SPPP) */
357 char *name;
358 u8 board_idx;
359 struct lmc_statistics stats;
360 struct net_device *lmc_device;
361
362 int hang, rxdesc, bad_packet, some_counter;
363 u_int32_t txgo;
364 struct lmc_regfile_t lmc_csrs;
365 volatile u_int32_t lmc_txtick;
366 volatile u_int32_t lmc_rxtick;
367 u_int32_t lmc_flags;
368 u_int32_t lmc_intrmask; /* our copy of csr_intr */
369 u_int32_t lmc_cmdmode; /* our copy of csr_cmdmode */
370 u_int32_t lmc_busmode; /* our copy of csr_busmode */
371 u_int32_t lmc_gpio_io; /* state of in/out settings */
372 u_int32_t lmc_gpio; /* state of outputs */
373 struct sk_buff* lmc_txq[LMC_TXDESCS];
374 struct sk_buff* lmc_rxq[LMC_RXDESCS];
375 volatile
376 struct tulip_desc_t lmc_rxring[LMC_RXDESCS];
377 volatile
378 struct tulip_desc_t lmc_txring[LMC_TXDESCS];
379 unsigned int lmc_next_rx, lmc_next_tx;
380 volatile
381 unsigned int lmc_taint_tx, lmc_taint_rx;
382 int lmc_tx_start, lmc_txfull;
383 int lmc_txbusy;
384 u_int16_t lmc_miireg16;
385 int lmc_ok;
386 int last_link_status;
387 int lmc_cardtype;
388 u_int32_t last_frameerr;
389 lmc_media_t *lmc_media;
390 struct timer_list timer;
391 lmc_ctl_t ictl;
392 u_int32_t TxDescriptControlInit;
393
394 int tx_TimeoutInd; /* additional driver state */
395 int tx_TimeoutDisplay;
396 unsigned int lastlmc_taint_tx;
397 int lasttx_packets;
398 u_int32_t tx_clockState;
399 u_int32_t lmc_crcSize;
400 LMC_XINFO lmc_xinfo;
401 char lmc_yel, lmc_blue, lmc_red; /* for T1 and DS3 */
402 char lmc_timing; /* for HSSI and SSI */
403 int got_irq;
404
405 char last_led_err[4];
406
407 u32 last_int;
408 u32 num_int;
409
410 spinlock_t lmc_lock;
411 u_int16_t if_type; /* PPP or NET */
412 struct ppp_device *pd;
413
414 /* Failure cases */
415 u8 failed_ring;
416 u8 failed_recv_alloc;
417
418 /* Structure check */
419 u32 check;
420};
421
422#define LMC_PCI_TIME 1
423#define LMC_EXT_TIME 0
424
425#define PKT_BUF_SZ 1542 /* was 1536 */
426
427/* CSR5 settings */
428#define TIMER_INT 0x00000800
429#define TP_LINK_FAIL 0x00001000
430#define TP_LINK_PASS 0x00000010
431#define NORMAL_INT 0x00010000
432#define ABNORMAL_INT 0x00008000
433#define RX_JABBER_INT 0x00000200
434#define RX_DIED 0x00000100
435#define RX_NOBUFF 0x00000080
436#define RX_INT 0x00000040
437#define TX_FIFO_UNDER 0x00000020
438#define TX_JABBER 0x00000008
439#define TX_NOBUFF 0x00000004
440#define TX_DIED 0x00000002
441#define TX_INT 0x00000001
442
443/* CSR6 settings */
444#define OPERATION_MODE 0x00000200 /* Full Duplex */
445#define PROMISC_MODE 0x00000040 /* Promiscuous Mode */
446#define RECIEVE_ALL 0x40000000 /* Recieve All */
447#define PASS_BAD_FRAMES 0x00000008 /* Pass Bad Frames */
448
449/* Dec control registers CSR6 as well */
450#define LMC_DEC_ST 0x00002000
451#define LMC_DEC_SR 0x00000002
452
453/* CSR15 settings */
454#define RECV_WATCHDOG_DISABLE 0x00000010
455#define JABBER_DISABLE 0x00000001
456
457/* More settings */
458/*
459 * aSR6 -- Command (Operation Mode) Register
460 */
461#define TULIP_CMD_RECEIVEALL 0x40000000L /* (RW) Receivel all frames? */
462#define TULIP_CMD_MUSTBEONE 0x02000000L /* (RW) Must Be One (21140) */
463#define TULIP_CMD_TXTHRSHLDCTL 0x00400000L /* (RW) Transmit Threshold Mode (21140) */
464#define TULIP_CMD_STOREFWD 0x00200000L /* (RW) Store and Foward (21140) */
465#define TULIP_CMD_NOHEARTBEAT 0x00080000L /* (RW) No Heartbeat (21140) */
466#define TULIP_CMD_PORTSELECT 0x00040000L /* (RW) Post Select (100Mb) (21140) */
467#define TULIP_CMD_FULLDUPLEX 0x00000200L /* (RW) Full Duplex Mode */
468#define TULIP_CMD_OPERMODE 0x00000C00L /* (RW) Operating Mode */
469#define TULIP_CMD_PROMISCUOUS 0x00000041L /* (RW) Promiscuous Mode */
470#define TULIP_CMD_PASSBADPKT 0x00000008L /* (RW) Pass Bad Frames */
471#define TULIP_CMD_THRESHOLDCTL 0x0000C000L /* (RW) Threshold Control */
472
473#define TULIP_GP_PINSET 0x00000100L
474#define TULIP_BUSMODE_SWRESET 0x00000001L
475#define TULIP_WATCHDOG_TXDISABLE 0x00000001L
476#define TULIP_WATCHDOG_RXDISABLE 0x00000010L
477
478#define TULIP_STS_NORMALINTR 0x00010000L /* (RW) Normal Interrupt */
479#define TULIP_STS_ABNRMLINTR 0x00008000L /* (RW) Abnormal Interrupt */
480#define TULIP_STS_ERI 0x00004000L /* (RW) Early Receive Interrupt */
481#define TULIP_STS_SYSERROR 0x00002000L /* (RW) System Error */
482#define TULIP_STS_GTE 0x00000800L /* (RW) General Pupose Timer Exp */
483#define TULIP_STS_ETI 0x00000400L /* (RW) Early Transmit Interrupt */
484#define TULIP_STS_RXWT 0x00000200L /* (RW) Receiver Watchdog Timeout */
485#define TULIP_STS_RXSTOPPED 0x00000100L /* (RW) Receiver Process Stopped */
486#define TULIP_STS_RXNOBUF 0x00000080L /* (RW) Receive Buf Unavail */
487#define TULIP_STS_RXINTR 0x00000040L /* (RW) Receive Interrupt */
488#define TULIP_STS_TXUNDERFLOW 0x00000020L /* (RW) Transmit Underflow */
489#define TULIP_STS_TXJABER 0x00000008L /* (RW) Jabber timeout */
490#define TULIP_STS_TXNOBUF 0x00000004L
491#define TULIP_STS_TXSTOPPED 0x00000002L /* (RW) Transmit Process Stopped */
492#define TULIP_STS_TXINTR 0x00000001L /* (RW) Transmit Interrupt */
493
494#define TULIP_STS_RXS_STOPPED 0x00000000L /* 000 - Stopped */
495
496#define TULIP_STS_RXSTOPPED 0x00000100L /* (RW) Receive Process Stopped */
497#define TULIP_STS_RXNOBUF 0x00000080L
498
499#define TULIP_CMD_TXRUN 0x00002000L /* (RW) Start/Stop Transmitter */
500#define TULIP_CMD_RXRUN 0x00000002L /* (RW) Start/Stop Receive Filtering */
501#define TULIP_DSTS_TxDEFERRED 0x00000001 /* Initially Deferred */
502#define TULIP_DSTS_OWNER 0x80000000 /* Owner (1 = 21040) */
503#define TULIP_DSTS_RxMIIERR 0x00000008
504#define LMC_DSTS_ERRSUM (TULIP_DSTS_RxMIIERR)
505
506#define TULIP_DEFAULT_INTR_MASK (TULIP_STS_NORMALINTR \
507 | TULIP_STS_RXINTR \
508 | TULIP_STS_TXINTR \
509 | TULIP_STS_ABNRMLINTR \
510 | TULIP_STS_SYSERROR \
511 | TULIP_STS_TXSTOPPED \
512 | TULIP_STS_TXUNDERFLOW\
513 | TULIP_STS_RXSTOPPED )
514
515#define DESC_OWNED_BY_SYSTEM ((u_int32_t)(0x00000000))
516#define DESC_OWNED_BY_DC21X4 ((u_int32_t)(0x80000000))
517
518#ifndef TULIP_CMD_RECEIVEALL
519#define TULIP_CMD_RECEIVEALL 0x40000000L
520#endif
521
522/* Adapter module number */
523#define LMC_ADAP_HSSI 2
524#define LMC_ADAP_DS3 3
525#define LMC_ADAP_SSI 4
526#define LMC_ADAP_T1 5
527
528#define HDLC_HDR_LEN 4
529#define HDLC_ADDR_LEN 1
530#define HDLC_SLARP 0x8035
531#define LMC_MTU 1500
532#define SLARP_LINECHECK 2
533
534#define LMC_CRC_LEN_16 2 /* 16-bit CRC */
535#define LMC_CRC_LEN_32 4
536
537#ifdef LMC_HDLC
538/* definition of an hdlc header. */
539struct hdlc_hdr
540{
541 u8 address;
542 u8 control;
543 u16 type;
544};
545
546/* definition of a slarp header. */
547struct slarp
548{
549 long code;
550 union sl
551 {
552 struct
553 {
554 ulong address;
555 ulong mask;
556 ushort unused;
557 } add;
558 struct
559 {
560 ulong mysequence;
561 ulong yoursequence;
562 ushort reliability;
563 ulong time;
564 } chk;
565 } t;
566};
567#endif /* LMC_HDLC */
568
569
570#endif /* _LMC_VAR_H_ */
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-27 00:11:58 -0500