net/ucc_geth: Add SGMII support for UCC GETH driver

-- derived from reverted commit 047584ce94108012288554a5f84585d792cc7f8f
-- reworked by Grant Likely to play nice with commit:
   "net: Rework ucc_geth driver to use of_mdio infrastructure"
   (0b9da337dca972e7a4144e298ec3adb8f244d4a4)

Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: David S. Miller <davem@davemloft.net>

1 files changed, 27 insertions, 1 deletions

diff --git a/drivers/net/ucc_geth.h b/drivers/net/ucc_geth.h
index dca628a922ba..1525bf51341c 100644
--- a/drivers/net/ucc_geth.h
+++ b/drivers/net/ucc_geth.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (C) Freescale Semicondutor, Inc. 2006. All rights reserved.
+ * Copyright (C) Freescale Semicondutor, Inc. 2006-2009. All rights reserved.
  *
  * Author: Shlomi Gridish <gridish@freescale.com>
  *
@@ -193,6 +193,31 @@ struct ucc_geth {
 #define ENET_TBI_MII_JD         0x10    /* Jitter diagnostics */
 #define ENET_TBI_MII_TBICON     0x11    /* TBI control */
 
+/* TBI MDIO register bit fields*/
+#define TBISR_LSTATUS          0x0004
+#define TBICON_CLK_SELECT       0x0020
+#define TBIANA_ASYMMETRIC_PAUSE 0x0100
+#define TBIANA_SYMMETRIC_PAUSE  0x0080
+#define TBIANA_HALF_DUPLEX      0x0040
+#define TBIANA_FULL_DUPLEX      0x0020
+#define TBICR_PHY_RESET         0x8000
+#define TBICR_ANEG_ENABLE       0x1000
+#define TBICR_RESTART_ANEG      0x0200
+#define TBICR_FULL_DUPLEX       0x0100
+#define TBICR_SPEED1_SET        0x0040
+
+#define TBIANA_SETTINGS ( \
+                TBIANA_ASYMMETRIC_PAUSE \
+                | TBIANA_SYMMETRIC_PAUSE \
+                | TBIANA_FULL_DUPLEX \
+                )
+#define TBICR_SETTINGS ( \
+                TBICR_PHY_RESET \
+                | TBICR_ANEG_ENABLE \
+                | TBICR_FULL_DUPLEX \
+                | TBICR_SPEED1_SET \
+                )
+
 /* UCC GETH MACCFG1 (MAC Configuration 1 Register) */
 #define MACCFG1_FLOW_RX                         0x00000020      /* Flow Control
                                                                    Rx */
@@ -1100,6 +1125,7 @@ struct ucc_geth_info {
         u16 pausePeriod;
         u16 extensionField;
         struct device_node *phy_node;
+        struct device_node *tbi_node;
         u8 weightfactor[NUM_TX_QUEUES];
         u8 interruptcoalescingmaxvalue[NUM_RX_QUEUES];
         u8 l2qt[UCC_GETH_VLAN_PRIORITY_MAX];