net/ucc_geth: update riscTx and riscRx in ucc_geth

Change the definition of riscTx and riscRx to unsigned integer instead of
enum, and change their values to support 4 risc allocation if the qe has
4 RISC engines.

Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Acked-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

1 files changed, 2 insertions, 2 deletions

diff --git a/drivers/net/ucc_geth.h b/drivers/net/ucc_geth.h
index 2f8ee7c87efe..46bb1d233597 100644
--- a/drivers/net/ucc_geth.h
+++ b/drivers/net/ucc_geth.h
@@ -1120,8 +1120,8 @@ struct ucc_geth_info {
         enum ucc_geth_maccfg2_pad_and_crc_mode padAndCrc;
         enum ucc_geth_num_of_threads numThreadsTx;
         enum ucc_geth_num_of_threads numThreadsRx;
-        enum qe_risc_allocation riscTx;
-        enum qe_risc_allocation riscRx;
+        unsigned int riscTx;
+        unsigned int riscRx;
 };
 
 /* structure representing UCC GETH */