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authorLi Yang <leoli@freescale.com>2007-02-08 04:34:42 -0500
committerJeff Garzik <jeff@garzik.org>2007-02-08 20:13:15 -0500
commita1862a53df1a57387aeee059276ba4233e12b4db (patch)
treeb751b3feb96afb03af6dffdda2fa96b435c6ff40 /drivers/net/ucc_geth.c
parent0ee8d33c64df9a719fd61ba693203e3b33b9e10a (diff)
ucc_geth: Remove obsolete workaround of link speed change
The workaround used a long delay of 4s which caused problem when two link-changes happens at the same time. Signed-off-by: Li Yang <leoli@freescale.com> Signed-off-by: Wu Xiaochuan <xiao-chuan.wu@freescale.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
Diffstat (limited to 'drivers/net/ucc_geth.c')
-rw-r--r--drivers/net/ucc_geth.c71
1 files changed, 5 insertions, 66 deletions
diff --git a/drivers/net/ucc_geth.c b/drivers/net/ucc_geth.c
index abb8611c5a91..db0370affb6b 100644
--- a/drivers/net/ucc_geth.c
+++ b/drivers/net/ucc_geth.c
@@ -1709,75 +1709,13 @@ static void adjust_link(struct net_device *dev)
1709 if (mii_info->speed != ugeth->oldspeed) { 1709 if (mii_info->speed != ugeth->oldspeed) {
1710 switch (mii_info->speed) { 1710 switch (mii_info->speed) {
1711 case 1000: 1711 case 1000:
1712#ifdef CONFIG_PPC_MPC836x 1712 ugeth->ug_info->enet_interface = ENET_1000_RGMII;
1713/* FIXME: This code is for 100Mbs BUG fixing,
1714remove this when it is fixed!!! */
1715 if (ugeth->ug_info->enet_interface ==
1716 ENET_1000_GMII)
1717 /* Run the commands which initialize the PHY */
1718 {
1719 tempval =
1720 (u32) mii_info->mdio_read(ugeth->
1721 dev, mii_info->mii_id, 0x1b);
1722 tempval |= 0x000f;
1723 mii_info->mdio_write(ugeth->dev,
1724 mii_info->mii_id, 0x1b,
1725 (u16) tempval);
1726 tempval =
1727 (u32) mii_info->mdio_read(ugeth->
1728 dev, mii_info->mii_id,
1729 MII_BMCR);
1730 mii_info->mdio_write(ugeth->dev,
1731 mii_info->mii_id, MII_BMCR,
1732 (u16) (tempval | BMCR_RESET));
1733 } else if (ugeth->ug_info->enet_interface ==
1734 ENET_1000_RGMII)
1735 /* Run the commands which initialize the PHY */
1736 {
1737 tempval =
1738 (u32) mii_info->mdio_read(ugeth->
1739 dev, mii_info->mii_id, 0x1b);
1740 tempval = (tempval & ~0x000f) | 0x000b;
1741 mii_info->mdio_write(ugeth->dev,
1742 mii_info->mii_id, 0x1b,
1743 (u16) tempval);
1744 tempval =
1745 (u32) mii_info->mdio_read(ugeth->
1746 dev, mii_info->mii_id,
1747 MII_BMCR);
1748 mii_info->mdio_write(ugeth->dev,
1749 mii_info->mii_id, MII_BMCR,
1750 (u16) (tempval | BMCR_RESET));
1751 }
1752 msleep(4000);
1753#endif /* CONFIG_MPC8360 */
1754 adjust_enet_interface(ugeth);
1755 break; 1713 break;
1756 case 100: 1714 case 100:
1757 case 10:
1758#ifdef CONFIG_PPC_MPC836x
1759/* FIXME: This code is for 100Mbs BUG fixing,
1760remove this lines when it will be fixed!!! */
1761 ugeth->ug_info->enet_interface = ENET_100_RGMII; 1715 ugeth->ug_info->enet_interface = ENET_100_RGMII;
1762 tempval = 1716 break;
1763 (u32) mii_info->mdio_read(ugeth->dev, 1717 case 10:
1764 mii_info->mii_id, 1718 ugeth->ug_info->enet_interface = ENET_10_RGMII;
1765 0x1b);
1766 tempval = (tempval & ~0x000f) | 0x000b;
1767 mii_info->mdio_write(ugeth->dev,
1768 mii_info->mii_id, 0x1b,
1769 (u16) tempval);
1770 tempval =
1771 (u32) mii_info->mdio_read(ugeth->dev,
1772 mii_info->mii_id,
1773 MII_BMCR);
1774 mii_info->mdio_write(ugeth->dev,
1775 mii_info->mii_id, MII_BMCR,
1776 (u16) (tempval |
1777 BMCR_RESET));
1778 msleep(4000);
1779#endif /* CONFIG_MPC8360 */
1780 adjust_enet_interface(ugeth);
1781 break; 1719 break;
1782 default: 1720 default:
1783 ugeth_warn 1721 ugeth_warn
@@ -1785,6 +1723,7 @@ remove this lines when it will be fixed!!! */
1785 dev->name, mii_info->speed); 1723 dev->name, mii_info->speed);
1786 break; 1724 break;
1787 } 1725 }
1726 adjust_enet_interface(ugeth);
1788 1727
1789 ugeth_info("%s: Speed %dBT", dev->name, 1728 ugeth_info("%s: Speed %dBT", dev->name,
1790 mii_info->speed); 1729 mii_info->speed);