diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2009-06-15 12:32:52 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2009-06-15 12:32:52 -0400 |
commit | 0fa213310cd8fa7a51071cdcf130e26fa56e9549 (patch) | |
tree | 2a7e5cc33c8938ec82604a99c3797a3132fd91ec /drivers/net/ucc_geth.c | |
parent | d3bf80bff13597004b5724ee4549cd68eb0badf0 (diff) | |
parent | bc47ab0241c7c86da4f5e5f82fbca7d45387c18d (diff) |
Merge branch 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc
* 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc: (103 commits)
powerpc: Fix bug in move of altivec code to vector.S
powerpc: Add support for swiotlb on 32-bit
powerpc/spufs: Remove unused error path
powerpc: Fix warning when printing a resource_size_t
powerpc/xmon: Remove unused variable in xmon.c
powerpc/pseries: Fix warnings when printing resource_size_t
powerpc: Shield code specific to 64-bit server processors
powerpc: Separate PACA fields for server CPUs
powerpc: Split exception handling out of head_64.S
powerpc: Introduce CONFIG_PPC_BOOK3S
powerpc: Move VMX and VSX asm code to vector.S
powerpc: Set init_bootmem_done on NUMA platforms as well
powerpc/mm: Fix a AB->BA deadlock scenario with nohash MMU context lock
powerpc/mm: Fix some SMP issues with MMU context handling
powerpc: Add PTRACE_SINGLEBLOCK support
fbdev: Add PLB support and cleanup DCR in xilinxfb driver.
powerpc/virtex: Add ml510 reference design device tree
powerpc/virtex: Add Xilinx ML510 reference design support
powerpc/virtex: refactor intc driver and add support for i8259 cascading
powerpc/virtex: Add support for Xilinx PCI host bridge
...
Diffstat (limited to 'drivers/net/ucc_geth.c')
-rw-r--r-- | drivers/net/ucc_geth.c | 24 |
1 files changed, 20 insertions, 4 deletions
diff --git a/drivers/net/ucc_geth.c b/drivers/net/ucc_geth.c index 44f8392da117..9dd16c9b1a10 100644 --- a/drivers/net/ucc_geth.c +++ b/drivers/net/ucc_geth.c | |||
@@ -270,7 +270,7 @@ static int fill_init_enet_entries(struct ucc_geth_private *ugeth, | |||
270 | u8 num_entries, | 270 | u8 num_entries, |
271 | u32 thread_size, | 271 | u32 thread_size, |
272 | u32 thread_alignment, | 272 | u32 thread_alignment, |
273 | enum qe_risc_allocation risc, | 273 | unsigned int risc, |
274 | int skip_page_for_first_entry) | 274 | int skip_page_for_first_entry) |
275 | { | 275 | { |
276 | u32 init_enet_offset; | 276 | u32 init_enet_offset; |
@@ -307,7 +307,7 @@ static int fill_init_enet_entries(struct ucc_geth_private *ugeth, | |||
307 | static int return_init_enet_entries(struct ucc_geth_private *ugeth, | 307 | static int return_init_enet_entries(struct ucc_geth_private *ugeth, |
308 | u32 *p_start, | 308 | u32 *p_start, |
309 | u8 num_entries, | 309 | u8 num_entries, |
310 | enum qe_risc_allocation risc, | 310 | unsigned int risc, |
311 | int skip_page_for_first_entry) | 311 | int skip_page_for_first_entry) |
312 | { | 312 | { |
313 | u32 init_enet_offset; | 313 | u32 init_enet_offset; |
@@ -342,7 +342,7 @@ static int dump_init_enet_entries(struct ucc_geth_private *ugeth, | |||
342 | u32 __iomem *p_start, | 342 | u32 __iomem *p_start, |
343 | u8 num_entries, | 343 | u8 num_entries, |
344 | u32 thread_size, | 344 | u32 thread_size, |
345 | enum qe_risc_allocation risc, | 345 | unsigned int risc, |
346 | int skip_page_for_first_entry) | 346 | int skip_page_for_first_entry) |
347 | { | 347 | { |
348 | u32 init_enet_offset; | 348 | u32 init_enet_offset; |
@@ -2135,6 +2135,14 @@ static int ucc_struct_init(struct ucc_geth_private *ugeth) | |||
2135 | return -ENOMEM; | 2135 | return -ENOMEM; |
2136 | } | 2136 | } |
2137 | 2137 | ||
2138 | /* read the number of risc engines, update the riscTx and riscRx | ||
2139 | * if there are 4 riscs in QE | ||
2140 | */ | ||
2141 | if (qe_get_num_of_risc() == 4) { | ||
2142 | ug_info->riscTx = QE_RISC_ALLOCATION_FOUR_RISCS; | ||
2143 | ug_info->riscRx = QE_RISC_ALLOCATION_FOUR_RISCS; | ||
2144 | } | ||
2145 | |||
2138 | ugeth->ug_regs = ioremap(uf_info->regs, sizeof(*ugeth->ug_regs)); | 2146 | ugeth->ug_regs = ioremap(uf_info->regs, sizeof(*ugeth->ug_regs)); |
2139 | if (!ugeth->ug_regs) { | 2147 | if (!ugeth->ug_regs) { |
2140 | if (netif_msg_probe(ugeth)) | 2148 | if (netif_msg_probe(ugeth)) |
@@ -3702,7 +3710,15 @@ static int ucc_geth_probe(struct of_device* ofdev, const struct of_device_id *ma | |||
3702 | ug_info->uf_info.utfet = UCC_GETH_UTFET_GIGA_INIT; | 3710 | ug_info->uf_info.utfet = UCC_GETH_UTFET_GIGA_INIT; |
3703 | ug_info->uf_info.utftt = UCC_GETH_UTFTT_GIGA_INIT; | 3711 | ug_info->uf_info.utftt = UCC_GETH_UTFTT_GIGA_INIT; |
3704 | ug_info->numThreadsTx = UCC_GETH_NUM_OF_THREADS_4; | 3712 | ug_info->numThreadsTx = UCC_GETH_NUM_OF_THREADS_4; |
3705 | ug_info->numThreadsRx = UCC_GETH_NUM_OF_THREADS_4; | 3713 | |
3714 | /* If QE's snum number is 46 which means we need to support | ||
3715 | * 4 UECs at 1000Base-T simultaneously, we need to allocate | ||
3716 | * more Threads to Rx. | ||
3717 | */ | ||
3718 | if (qe_get_num_of_snums() == 46) | ||
3719 | ug_info->numThreadsRx = UCC_GETH_NUM_OF_THREADS_6; | ||
3720 | else | ||
3721 | ug_info->numThreadsRx = UCC_GETH_NUM_OF_THREADS_4; | ||
3706 | } | 3722 | } |
3707 | 3723 | ||
3708 | if (netif_msg_probe(&debug)) | 3724 | if (netif_msg_probe(&debug)) |