tg3: Cleanup extended rx ring size code

Hardcoded values are used in multiple places to describe the maximum rx
ring sizes.  This patch replaces those values with preprocessor
constants.  This patch also introduces a new TG3_FLG3_LRG_PROD_RING_CAP
to determine if the device is capable of supporting larger ring sizes.

Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

1 files changed, 8 insertions, 3 deletions

diff --git a/drivers/net/tg3.h b/drivers/net/tg3.h
index 73884b69b749..4c498ed66059 100644
--- a/drivers/net/tg3.h
+++ b/drivers/net/tg3.h
@@ -25,9 +25,13 @@
 
 #define TG3_RX_INTERNAL_RING_SZ_5906    32
 
-#define RX_STD_MAX_SIZE_5705            512
-#define RX_STD_MAX_SIZE_5717            2048
-#define RX_JUMBO_MAX_SIZE               0xdeadbeef /* XXX */
+#define TG3_RX_STD_MAX_SIZE_5700        512
+#define TG3_RX_STD_MAX_SIZE_5717        2048
+#define TG3_RX_JMB_MAX_SIZE_5700        256
+#define TG3_RX_JMB_MAX_SIZE_5717        1024
+#define TG3_RX_RET_MAX_SIZE_5700        1024
+#define TG3_RX_RET_MAX_SIZE_5705        512
+#define TG3_RX_RET_MAX_SIZE_5717        4096
 
 /* First 256 bytes are a mirror of PCI config space. */
 #define TG3PCI_VENDOR                   0x00000000
@@ -2897,6 +2901,7 @@ struct tg3 {
 #define TG3_FLG3_5701_DMA_BUG           0x00000008
 #define TG3_FLG3_USE_PHYLIB             0x00000010
 #define TG3_FLG3_MDIOBUS_INITED         0x00000020
+#define TG3_FLG3_LRG_PROD_RING_CAP      0x00000080
 #define TG3_FLG3_RGMII_INBAND_DISABLE   0x00000100
 #define TG3_FLG3_RGMII_EXT_IBND_RX_EN   0x00000200
 #define TG3_FLG3_RGMII_EXT_IBND_TX_EN   0x00000400