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authorMatt Carlson <mcarlson@broadcom.com>2009-09-01 09:13:00 -0400
committerDavid S. Miller <davem@davemloft.net>2009-09-02 03:43:49 -0400
commitbaf8a94a572928710e9e60967d153a7bf3aebd9c (patch)
treea61c57ab84e29bd536c98b9e43129fc30d86abfa /drivers/net/tg3.h
parentb6080e126012047d42e53154189fdca286d0600e (diff)
tg3: Add RSS support
This patch adds code needed to enable RSS. Signed-off-by: Matt Carlson <mcarlson@broadcom.com> Reviewed-by: Benjamin Li <benli@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/tg3.h')
-rw-r--r--drivers/net/tg3.h25
1 files changed, 24 insertions, 1 deletions
diff --git a/drivers/net/tg3.h b/drivers/net/tg3.h
index 978b6d9546fb..348add254d11 100644
--- a/drivers/net/tg3.h
+++ b/drivers/net/tg3.h
@@ -446,6 +446,12 @@
446#define RX_MODE_PROMISC 0x00000100 446#define RX_MODE_PROMISC 0x00000100
447#define RX_MODE_NO_CRC_CHECK 0x00000200 447#define RX_MODE_NO_CRC_CHECK 0x00000200
448#define RX_MODE_KEEP_VLAN_TAG 0x00000400 448#define RX_MODE_KEEP_VLAN_TAG 0x00000400
449#define RX_MODE_RSS_IPV4_HASH_EN 0x00010000
450#define RX_MODE_RSS_TCP_IPV4_HASH_EN 0x00020000
451#define RX_MODE_RSS_IPV6_HASH_EN 0x00040000
452#define RX_MODE_RSS_TCP_IPV6_HASH_EN 0x00080000
453#define RX_MODE_RSS_ITBL_HASH_BITS_7 0x00700000
454#define RX_MODE_RSS_ENABLE 0x00800000
449#define RX_MODE_IPV6_CSUM_ENABLE 0x01000000 455#define RX_MODE_IPV6_CSUM_ENABLE 0x01000000
450#define MAC_RX_STATUS 0x0000046c 456#define MAC_RX_STATUS 0x0000046c
451#define RX_STATUS_REMOTE_TX_XOFFED 0x00000001 457#define RX_STATUS_REMOTE_TX_XOFFED 0x00000001
@@ -690,7 +696,22 @@
690/* 0x5b8 --> 0x600 unused */ 696/* 0x5b8 --> 0x600 unused */
691#define MAC_TX_MAC_STATE_BASE 0x00000600 /* 16 bytes */ 697#define MAC_TX_MAC_STATE_BASE 0x00000600 /* 16 bytes */
692#define MAC_RX_MAC_STATE_BASE 0x00000610 /* 20 bytes */ 698#define MAC_RX_MAC_STATE_BASE 0x00000610 /* 20 bytes */
693/* 0x624 --> 0x800 unused */ 699/* 0x624 --> 0x670 unused */
700
701#define MAC_RSS_INDIR_TBL_0 0x00000630
702
703#define MAC_RSS_HASH_KEY_0 0x00000670
704#define MAC_RSS_HASH_KEY_1 0x00000674
705#define MAC_RSS_HASH_KEY_2 0x00000678
706#define MAC_RSS_HASH_KEY_3 0x0000067c
707#define MAC_RSS_HASH_KEY_4 0x00000680
708#define MAC_RSS_HASH_KEY_5 0x00000684
709#define MAC_RSS_HASH_KEY_6 0x00000688
710#define MAC_RSS_HASH_KEY_7 0x0000068c
711#define MAC_RSS_HASH_KEY_8 0x00000690
712#define MAC_RSS_HASH_KEY_9 0x00000694
713/* 0x698 --> 0x800 unused */
714
694#define MAC_TX_STATS_OCTETS 0x00000800 715#define MAC_TX_STATS_OCTETS 0x00000800
695#define MAC_TX_STATS_RESV1 0x00000804 716#define MAC_TX_STATS_RESV1 0x00000804
696#define MAC_TX_STATS_COLLISIONS 0x00000808 717#define MAC_TX_STATS_COLLISIONS 0x00000808
@@ -1465,6 +1486,7 @@
1465#define MSGINT_MODE 0x00006000 1486#define MSGINT_MODE 0x00006000
1466#define MSGINT_MODE_RESET 0x00000001 1487#define MSGINT_MODE_RESET 0x00000001
1467#define MSGINT_MODE_ENABLE 0x00000002 1488#define MSGINT_MODE_ENABLE 0x00000002
1489#define MSGINT_MODE_MULTIVEC_EN 0x00000080
1468#define MSGINT_STATUS 0x00006004 1490#define MSGINT_STATUS 0x00006004
1469#define MSGINT_FIFO 0x00006008 1491#define MSGINT_FIFO 0x00006008
1470/* 0x600c --> 0x6400 unused */ 1492/* 0x600c --> 0x6400 unused */
@@ -2704,6 +2726,7 @@ struct tg3 {
2704#define TG3_FLG3_NO_NVRAM 0x00004000 2726#define TG3_FLG3_NO_NVRAM 0x00004000
2705#define TG3_FLG3_TOGGLE_10_100_L1PLLPD 0x00008000 2727#define TG3_FLG3_TOGGLE_10_100_L1PLLPD 0x00008000
2706#define TG3_FLG3_PHY_IS_FET 0x00010000 2728#define TG3_FLG3_PHY_IS_FET 0x00010000
2729#define TG3_FLG3_ENABLE_RSS 0x00020000
2707 2730
2708 struct timer_list timer; 2731 struct timer_list timer;
2709 u16 timer_counter; 2732 u16 timer_counter;