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authorMatt Carlson <mcarlson@broadcom.com>2009-08-25 06:09:07 -0400
committerDavid S. Miller <davem@davemloft.net>2009-08-26 18:47:56 -0400
commitbb85fbb6a98d8edab81599913559c7ff0a963984 (patch)
tree3509fc3b02a48597f3dac4d5678db547e33f69a6 /drivers/net/tg3.h
parent5e7ccf2003e6a9c35b5aa24953ba5009a1a8b653 (diff)
tg3: Tune 5785 clock switching
This patch tunes the timeouts the CPMU uses to decide when to switch from the clocks output by the PHY to internal clock sources. Signed-off-by: Matt Carlson <mcarlson@broadcom.com> Reviewed-by: Michael Chan <mchan@broadcom.com> Reviewed-by: Benjamin Li <benli@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/tg3.h')
-rw-r--r--drivers/net/tg3.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/net/tg3.h b/drivers/net/tg3.h
index 636008cf3c8d..d096e10ad634 100644
--- a/drivers/net/tg3.h
+++ b/drivers/net/tg3.h
@@ -524,6 +524,10 @@
524/* 0x598 --> 0x5a0 unused */ 524/* 0x598 --> 0x5a0 unused */
525#define MAC_PHYCFG1 0x000005a0 525#define MAC_PHYCFG1 0x000005a0
526#define MAC_PHYCFG1_RGMII_INT 0x00000001 526#define MAC_PHYCFG1_RGMII_INT 0x00000001
527#define MAC_PHYCFG1_RXCLK_TO_MASK 0x00001ff0
528#define MAC_PHYCFG1_RXCLK_TIMEOUT 0x00001000
529#define MAC_PHYCFG1_TXCLK_TO_MASK 0x01ff0000
530#define MAC_PHYCFG1_TXCLK_TIMEOUT 0x01000000
527#define MAC_PHYCFG1_RGMII_EXT_RX_DEC 0x02000000 531#define MAC_PHYCFG1_RGMII_EXT_RX_DEC 0x02000000
528#define MAC_PHYCFG1_RGMII_SND_STAT_EN 0x04000000 532#define MAC_PHYCFG1_RGMII_SND_STAT_EN 0x04000000
529#define MAC_PHYCFG1_TXC_DRV 0x20000000 533#define MAC_PHYCFG1_TXC_DRV 0x20000000