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authorMatt Carlson <mcarlson@broadcom.com>2008-11-03 19:55:44 -0500
committerDavid S. Miller <davem@davemloft.net>2008-11-03 19:55:44 -0500
commitfcb389dfd842be54545cb436b3437f07da10115c (patch)
treeec0306c72aaa55b9035355e41f1862658d3e9505 /drivers/net/tg3.h
parent9c61d6bc56bf0a5fb1ebfcf4c168cc5ce30e153b (diff)
tg3: 5785 enhancements
This patch refines support for the 5785 device. Signed-off-by: Matt Carlson <mcarlson@broadcom.com> Signed-off-by: Michael Chan <mchan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/tg3.h')
-rw-r--r--drivers/net/tg3.h97
1 files changed, 97 insertions, 0 deletions
diff --git a/drivers/net/tg3.h b/drivers/net/tg3.h
index d7ce3a05a3e4..599e490cf62c 100644
--- a/drivers/net/tg3.h
+++ b/drivers/net/tg3.h
@@ -417,6 +417,7 @@
417#define MI_COM_DATA_MASK 0x0000ffff 417#define MI_COM_DATA_MASK 0x0000ffff
418#define MAC_MI_STAT 0x00000450 418#define MAC_MI_STAT 0x00000450
419#define MAC_MI_STAT_LNKSTAT_ATTN_ENAB 0x00000001 419#define MAC_MI_STAT_LNKSTAT_ATTN_ENAB 0x00000001
420#define MAC_MI_STAT_10MBPS_MODE 0x00000002
420#define MAC_MI_MODE 0x00000454 421#define MAC_MI_MODE 0x00000454
421#define MAC_MI_MODE_CLK_10MHZ 0x00000001 422#define MAC_MI_MODE_CLK_10MHZ 0x00000001
422#define MAC_MI_MODE_SHORT_PREAMBLE 0x00000002 423#define MAC_MI_MODE_SHORT_PREAMBLE 0x00000002
@@ -542,6 +543,100 @@
542#define MAC_PHYCFG1_TXC_DRV 0x20000000 543#define MAC_PHYCFG1_TXC_DRV 0x20000000
543#define MAC_PHYCFG2 0x000005a4 544#define MAC_PHYCFG2 0x000005a4
544#define MAC_PHYCFG2_INBAND_ENABLE 0x00000001 545#define MAC_PHYCFG2_INBAND_ENABLE 0x00000001
546#define MAC_PHYCFG2_EMODE_MASK_MASK 0x000001c0
547#define MAC_PHYCFG2_EMODE_MASK_AC131 0x000000c0
548#define MAC_PHYCFG2_EMODE_MASK_50610 0x00000100
549#define MAC_PHYCFG2_EMODE_MASK_RT8211 0x00000000
550#define MAC_PHYCFG2_EMODE_MASK_RT8201 0x000001c0
551#define MAC_PHYCFG2_EMODE_COMP_MASK 0x00000e00
552#define MAC_PHYCFG2_EMODE_COMP_AC131 0x00000600
553#define MAC_PHYCFG2_EMODE_COMP_50610 0x00000400
554#define MAC_PHYCFG2_EMODE_COMP_RT8211 0x00000800
555#define MAC_PHYCFG2_EMODE_COMP_RT8201 0x00000000
556#define MAC_PHYCFG2_FMODE_MASK_MASK 0x00007000
557#define MAC_PHYCFG2_FMODE_MASK_AC131 0x00006000
558#define MAC_PHYCFG2_FMODE_MASK_50610 0x00004000
559#define MAC_PHYCFG2_FMODE_MASK_RT8211 0x00000000
560#define MAC_PHYCFG2_FMODE_MASK_RT8201 0x00007000
561#define MAC_PHYCFG2_FMODE_COMP_MASK 0x00038000
562#define MAC_PHYCFG2_FMODE_COMP_AC131 0x00030000
563#define MAC_PHYCFG2_FMODE_COMP_50610 0x00008000
564#define MAC_PHYCFG2_FMODE_COMP_RT8211 0x00038000
565#define MAC_PHYCFG2_FMODE_COMP_RT8201 0x00000000
566#define MAC_PHYCFG2_GMODE_MASK_MASK 0x001c0000
567#define MAC_PHYCFG2_GMODE_MASK_AC131 0x001c0000
568#define MAC_PHYCFG2_GMODE_MASK_50610 0x00100000
569#define MAC_PHYCFG2_GMODE_MASK_RT8211 0x00000000
570#define MAC_PHYCFG2_GMODE_MASK_RT8201 0x001c0000
571#define MAC_PHYCFG2_GMODE_COMP_MASK 0x00e00000
572#define MAC_PHYCFG2_GMODE_COMP_AC131 0x00e00000
573#define MAC_PHYCFG2_GMODE_COMP_50610 0x00000000
574#define MAC_PHYCFG2_GMODE_COMP_RT8211 0x00200000
575#define MAC_PHYCFG2_GMODE_COMP_RT8201 0x00000000
576#define MAC_PHYCFG2_ACT_MASK_MASK 0x03000000
577#define MAC_PHYCFG2_ACT_MASK_AC131 0x03000000
578#define MAC_PHYCFG2_ACT_MASK_50610 0x01000000
579#define MAC_PHYCFG2_ACT_MASK_RT8211 0x03000000
580#define MAC_PHYCFG2_ACT_MASK_RT8201 0x01000000
581#define MAC_PHYCFG2_ACT_COMP_MASK 0x0c000000
582#define MAC_PHYCFG2_ACT_COMP_AC131 0x00000000
583#define MAC_PHYCFG2_ACT_COMP_50610 0x00000000
584#define MAC_PHYCFG2_ACT_COMP_RT8211 0x00000000
585#define MAC_PHYCFG2_ACT_COMP_RT8201 0x08000000
586#define MAC_PHYCFG2_QUAL_MASK_MASK 0x30000000
587#define MAC_PHYCFG2_QUAL_MASK_AC131 0x30000000
588#define MAC_PHYCFG2_QUAL_MASK_50610 0x30000000
589#define MAC_PHYCFG2_QUAL_MASK_RT8211 0x30000000
590#define MAC_PHYCFG2_QUAL_MASK_RT8201 0x30000000
591#define MAC_PHYCFG2_QUAL_COMP_MASK 0xc0000000
592#define MAC_PHYCFG2_QUAL_COMP_AC131 0x00000000
593#define MAC_PHYCFG2_QUAL_COMP_50610 0x00000000
594#define MAC_PHYCFG2_QUAL_COMP_RT8211 0x00000000
595#define MAC_PHYCFG2_QUAL_COMP_RT8201 0x00000000
596#define MAC_PHYCFG2_50610_LED_MODES \
597 (MAC_PHYCFG2_EMODE_MASK_50610 | \
598 MAC_PHYCFG2_EMODE_COMP_50610 | \
599 MAC_PHYCFG2_FMODE_MASK_50610 | \
600 MAC_PHYCFG2_FMODE_COMP_50610 | \
601 MAC_PHYCFG2_GMODE_MASK_50610 | \
602 MAC_PHYCFG2_GMODE_COMP_50610 | \
603 MAC_PHYCFG2_ACT_MASK_50610 | \
604 MAC_PHYCFG2_ACT_COMP_50610 | \
605 MAC_PHYCFG2_QUAL_MASK_50610 | \
606 MAC_PHYCFG2_QUAL_COMP_50610)
607#define MAC_PHYCFG2_AC131_LED_MODES \
608 (MAC_PHYCFG2_EMODE_MASK_AC131 | \
609 MAC_PHYCFG2_EMODE_COMP_AC131 | \
610 MAC_PHYCFG2_FMODE_MASK_AC131 | \
611 MAC_PHYCFG2_FMODE_COMP_AC131 | \
612 MAC_PHYCFG2_GMODE_MASK_AC131 | \
613 MAC_PHYCFG2_GMODE_COMP_AC131 | \
614 MAC_PHYCFG2_ACT_MASK_AC131 | \
615 MAC_PHYCFG2_ACT_COMP_AC131 | \
616 MAC_PHYCFG2_QUAL_MASK_AC131 | \
617 MAC_PHYCFG2_QUAL_COMP_AC131)
618#define MAC_PHYCFG2_RTL8211C_LED_MODES \
619 (MAC_PHYCFG2_EMODE_MASK_RT8211 | \
620 MAC_PHYCFG2_EMODE_COMP_RT8211 | \
621 MAC_PHYCFG2_FMODE_MASK_RT8211 | \
622 MAC_PHYCFG2_FMODE_COMP_RT8211 | \
623 MAC_PHYCFG2_GMODE_MASK_RT8211 | \
624 MAC_PHYCFG2_GMODE_COMP_RT8211 | \
625 MAC_PHYCFG2_ACT_MASK_RT8211 | \
626 MAC_PHYCFG2_ACT_COMP_RT8211 | \
627 MAC_PHYCFG2_QUAL_MASK_RT8211 | \
628 MAC_PHYCFG2_QUAL_COMP_RT8211)
629#define MAC_PHYCFG2_RTL8201E_LED_MODES \
630 (MAC_PHYCFG2_EMODE_MASK_RT8201 | \
631 MAC_PHYCFG2_EMODE_COMP_RT8201 | \
632 MAC_PHYCFG2_FMODE_MASK_RT8201 | \
633 MAC_PHYCFG2_FMODE_COMP_RT8201 | \
634 MAC_PHYCFG2_GMODE_MASK_RT8201 | \
635 MAC_PHYCFG2_GMODE_COMP_RT8201 | \
636 MAC_PHYCFG2_ACT_MASK_RT8201 | \
637 MAC_PHYCFG2_ACT_COMP_RT8201 | \
638 MAC_PHYCFG2_QUAL_MASK_RT8201 | \
639 MAC_PHYCFG2_QUAL_COMP_RT8201)
545#define MAC_EXT_RGMII_MODE 0x000005a8 640#define MAC_EXT_RGMII_MODE 0x000005a8
546#define MAC_RGMII_MODE_TX_ENABLE 0x00000001 641#define MAC_RGMII_MODE_TX_ENABLE 0x00000001
547#define MAC_RGMII_MODE_TX_LOWPWR 0x00000002 642#define MAC_RGMII_MODE_TX_LOWPWR 0x00000002
@@ -2595,6 +2690,8 @@ struct tg3 {
2595#define PHY_REV_BCM5411_X0 0x1 /* Found on Netgear GA302T */ 2690#define PHY_REV_BCM5411_X0 0x1 /* Found on Netgear GA302T */
2596#define TG3_PHY_ID_BCM50610 0x143bd60 2691#define TG3_PHY_ID_BCM50610 0x143bd60
2597#define TG3_PHY_ID_BCMAC131 0x143bc70 2692#define TG3_PHY_ID_BCMAC131 0x143bc70
2693#define TG3_PHY_ID_RTL8211C 0x001cc910
2694#define TG3_PHY_ID_RTL8201E 0x00008200
2598#define TG3_PHY_OUI_MASK 0xfffffc00 2695#define TG3_PHY_OUI_MASK 0xfffffc00
2599#define TG3_PHY_OUI_1 0x00206000 2696#define TG3_PHY_OUI_1 0x00206000
2600#define TG3_PHY_OUI_2 0x0143bc00 2697#define TG3_PHY_OUI_2 0x0143bc00