diff options
author | Lucas De Marchi <lucas.demarchi@profusion.mobi> | 2011-03-30 21:57:33 -0400 |
---|---|---|
committer | Lucas De Marchi <lucas.demarchi@profusion.mobi> | 2011-03-31 10:26:23 -0400 |
commit | 25985edcedea6396277003854657b5f3cb31a628 (patch) | |
tree | f026e810210a2ee7290caeb737c23cb6472b7c38 /drivers/net/tg3.h | |
parent | 6aba74f2791287ec407e0f92487a725a25908067 (diff) |
Fix common misspellings
Fixes generated by 'codespell' and manually reviewed.
Signed-off-by: Lucas De Marchi <lucas.demarchi@profusion.mobi>
Diffstat (limited to 'drivers/net/tg3.h')
-rw-r--r-- | drivers/net/tg3.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/net/tg3.h b/drivers/net/tg3.h index 73884b69b749..5e96706ad108 100644 --- a/drivers/net/tg3.h +++ b/drivers/net/tg3.h | |||
@@ -2130,7 +2130,7 @@ | |||
2130 | #define MII_TG3_DSP_EXP96 0x0f96 | 2130 | #define MII_TG3_DSP_EXP96 0x0f96 |
2131 | #define MII_TG3_DSP_EXP97 0x0f97 | 2131 | #define MII_TG3_DSP_EXP97 0x0f97 |
2132 | 2132 | ||
2133 | #define MII_TG3_AUX_CTRL 0x18 /* auxilliary control register */ | 2133 | #define MII_TG3_AUX_CTRL 0x18 /* auxiliary control register */ |
2134 | 2134 | ||
2135 | #define MII_TG3_AUXCTL_PCTL_100TX_LPWR 0x0010 | 2135 | #define MII_TG3_AUXCTL_PCTL_100TX_LPWR 0x0010 |
2136 | #define MII_TG3_AUXCTL_PCTL_SPR_ISOLATE 0x0020 | 2136 | #define MII_TG3_AUXCTL_PCTL_SPR_ISOLATE 0x0020 |
@@ -2146,7 +2146,7 @@ | |||
2146 | #define MII_TG3_AUXCTL_ACTL_TX_6DB 0x0400 | 2146 | #define MII_TG3_AUXCTL_ACTL_TX_6DB 0x0400 |
2147 | #define MII_TG3_AUXCTL_SHDWSEL_AUXCTL 0x0000 | 2147 | #define MII_TG3_AUXCTL_SHDWSEL_AUXCTL 0x0000 |
2148 | 2148 | ||
2149 | #define MII_TG3_AUX_STAT 0x19 /* auxilliary status register */ | 2149 | #define MII_TG3_AUX_STAT 0x19 /* auxiliary status register */ |
2150 | #define MII_TG3_AUX_STAT_LPASS 0x0004 | 2150 | #define MII_TG3_AUX_STAT_LPASS 0x0004 |
2151 | #define MII_TG3_AUX_STAT_SPDMASK 0x0700 | 2151 | #define MII_TG3_AUX_STAT_SPDMASK 0x0700 |
2152 | #define MII_TG3_AUX_STAT_10HALF 0x0100 | 2152 | #define MII_TG3_AUX_STAT_10HALF 0x0100 |