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authorMichael Chan <mchan@broadcom.com>2006-03-19 16:21:12 -0500
committerDavid S. Miller <davem@davemloft.net>2006-03-19 16:21:12 -0500
commit4a29cc2e503b33a1e96db4c3f9a94165f153f259 (patch)
tree74645b5ef3a92ad9857ed63d6446e2be0535060c /drivers/net/tg3.h
parentc7c694d196a39af6e644e24279953d04f30362db (diff)
[TG3]: 40-bit DMA workaround part 2
The 40-bit DMA workaround recently implemented for 5714, 5715, and 5780 needs to be expanded because there may be other tg3 devices behind the EPB Express to PCIX bridge in the 5780 class device. For example, some 4-port card or mother board designs have 5704 behind the 5714. All devices behind the EPB require the 40-bit DMA workaround. Thanks to Chris Elmquist again for reporting the problem and testing the patch. Signed-off-by: Michael Chan <mchan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/tg3.h')
-rw-r--r--drivers/net/tg3.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/net/tg3.h b/drivers/net/tg3.h
index 7f4b7f6ac40d..7e3b613afb29 100644
--- a/drivers/net/tg3.h
+++ b/drivers/net/tg3.h
@@ -2163,6 +2163,7 @@ struct tg3 {
2163#define TG3_FLAG_10_100_ONLY 0x01000000 2163#define TG3_FLAG_10_100_ONLY 0x01000000
2164#define TG3_FLAG_PAUSE_AUTONEG 0x02000000 2164#define TG3_FLAG_PAUSE_AUTONEG 0x02000000
2165#define TG3_FLAG_IN_RESET_TASK 0x04000000 2165#define TG3_FLAG_IN_RESET_TASK 0x04000000
2166#define TG3_FLAG_40BIT_DMA_BUG 0x08000000
2166#define TG3_FLAG_BROKEN_CHECKSUMS 0x10000000 2167#define TG3_FLAG_BROKEN_CHECKSUMS 0x10000000
2167#define TG3_FLAG_GOT_SERDES_FLOWCTL 0x20000000 2168#define TG3_FLAG_GOT_SERDES_FLOWCTL 0x20000000
2168#define TG3_FLAG_SPLIT_MODE 0x40000000 2169#define TG3_FLAG_SPLIT_MODE 0x40000000