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authorMatt Carlson <mcarlson@broadcom.com>2010-09-30 06:34:31 -0400
committerDavid S. Miller <davem@davemloft.net>2010-10-01 03:24:42 -0400
commitd309a46e42542223946d3a9e4e239fdc945cb53e (patch)
tree43fae359546e61d0bda67d903d03db11d227033c /drivers/net/tg3.h
parent66cfd1bd05a7a1c31c9cdbb2ddf5c57d1cddc5f6 (diff)
tg3: 5719: Prevent tx data corruption
This patch enables a bit that prevents read DMA overflows and adjusts the txmbuf margin from the hardware default. The combination of these modifications prevents a tx data corruption issue we were seeing on the 5719. Signed-off-by: Matt Carlson <mcarlson@broadcom.com> Reviewed-by: Michael Chan <mchan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/tg3.h')
-rw-r--r--drivers/net/tg3.h8
1 files changed, 7 insertions, 1 deletions
diff --git a/drivers/net/tg3.h b/drivers/net/tg3.h
index 44733e4a68a2..ec62f057ff6d 100644
--- a/drivers/net/tg3.h
+++ b/drivers/net/tg3.h
@@ -1225,6 +1225,7 @@
1225#define BUFMGR_MODE_ATTN_ENABLE 0x00000004 1225#define BUFMGR_MODE_ATTN_ENABLE 0x00000004
1226#define BUFMGR_MODE_BM_TEST 0x00000008 1226#define BUFMGR_MODE_BM_TEST 0x00000008
1227#define BUFMGR_MODE_MBLOW_ATTN_ENAB 0x00000010 1227#define BUFMGR_MODE_MBLOW_ATTN_ENAB 0x00000010
1228#define BUFMGR_MODE_NO_TX_UNDERRUN 0x80000000
1228#define BUFMGR_STATUS 0x00004404 1229#define BUFMGR_STATUS 0x00004404
1229#define BUFMGR_STATUS_ERROR 0x00000004 1230#define BUFMGR_STATUS_ERROR 0x00000004
1230#define BUFMGR_STATUS_MBLOW 0x00000010 1231#define BUFMGR_STATUS_MBLOW 0x00000010
@@ -1306,7 +1307,12 @@
1306 1307
1307#define TG3_RDMA_RSRVCTRL_REG 0x00004900 1308#define TG3_RDMA_RSRVCTRL_REG 0x00004900
1308#define TG3_RDMA_RSRVCTRL_FIFO_OFLW_FIX 0x00000004 1309#define TG3_RDMA_RSRVCTRL_FIFO_OFLW_FIX 0x00000004
1309/* 0x4904 --> 0x4c00 unused */ 1310/* 0x4904 --> 0x4910 unused */
1311
1312#define TG3_LSO_RD_DMA_CRPTEN_CTRL 0x00004910
1313#define TG3_LSO_RD_DMA_CRPTEN_CTRL_BLEN_BD_4K 0x00030000
1314#define TG3_LSO_RD_DMA_CRPTEN_CTRL_BLEN_LSO_4K 0x000c0000
1315/* 0x4914 --> 0x4c00 unused */
1310 1316
1311/* Write DMA control registers */ 1317/* Write DMA control registers */
1312#define WDMAC_MODE 0x00004c00 1318#define WDMAC_MODE 0x00004c00