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authorMichael Chan <mchan@broadcom.com>2006-03-23 04:28:06 -0500
committerDavid S. Miller <davem@davemloft.net>2006-03-23 04:28:06 -0500
commitaf36e6b6d7f4ad7a5ccfd14dfa71ec941255f93d (patch)
tree879c0f2f8be1e6bcd9d64fa4ee952ee959d35357 /drivers/net/tg3.h
parentb30bd282cbf5c46247a279a2e8d2aae027d9f1bf (diff)
[TG3]: Add 5755 support
Add support for new chip 5755 which is very similar to 5787. Signed-off-by: Michael Chan <mchan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/tg3.h')
-rw-r--r--drivers/net/tg3.h6
1 files changed, 5 insertions, 1 deletions
diff --git a/drivers/net/tg3.h b/drivers/net/tg3.h
index baa34c4721db..672f375ef711 100644
--- a/drivers/net/tg3.h
+++ b/drivers/net/tg3.h
@@ -138,6 +138,7 @@
138#define ASIC_REV_5752 0x06 138#define ASIC_REV_5752 0x06
139#define ASIC_REV_5780 0x08 139#define ASIC_REV_5780 0x08
140#define ASIC_REV_5714 0x09 140#define ASIC_REV_5714 0x09
141#define ASIC_REV_5755 0x0a
141#define ASIC_REV_5787 0x0b 142#define ASIC_REV_5787 0x0b
142#define GET_CHIP_REV(CHIP_REV_ID) ((CHIP_REV_ID) >> 8) 143#define GET_CHIP_REV(CHIP_REV_ID) ((CHIP_REV_ID) >> 8)
143#define CHIPREV_5700_AX 0x70 144#define CHIPREV_5700_AX 0x70
@@ -456,6 +457,7 @@
456#define RX_MODE_PROMISC 0x00000100 457#define RX_MODE_PROMISC 0x00000100
457#define RX_MODE_NO_CRC_CHECK 0x00000200 458#define RX_MODE_NO_CRC_CHECK 0x00000200
458#define RX_MODE_KEEP_VLAN_TAG 0x00000400 459#define RX_MODE_KEEP_VLAN_TAG 0x00000400
460#define RX_MODE_IPV6_CSUM_ENABLE 0x01000000
459#define MAC_RX_STATUS 0x0000046c 461#define MAC_RX_STATUS 0x0000046c
460#define RX_STATUS_REMOTE_TX_XOFFED 0x00000001 462#define RX_STATUS_REMOTE_TX_XOFFED 0x00000001
461#define RX_STATUS_XOFF_RCVD 0x00000002 463#define RX_STATUS_XOFF_RCVD 0x00000002
@@ -1340,6 +1342,7 @@
1340#define GRC_LCLCTRL_CLEARINT 0x00000002 1342#define GRC_LCLCTRL_CLEARINT 0x00000002
1341#define GRC_LCLCTRL_SETINT 0x00000004 1343#define GRC_LCLCTRL_SETINT 0x00000004
1342#define GRC_LCLCTRL_INT_ON_ATTN 0x00000008 1344#define GRC_LCLCTRL_INT_ON_ATTN 0x00000008
1345#define GRC_LCLCTRL_GPIO_UART_SEL 0x00000010 /* 5755 only */
1343#define GRC_LCLCTRL_USE_SIG_DETECT 0x00000010 /* 5714/5780 only */ 1346#define GRC_LCLCTRL_USE_SIG_DETECT 0x00000010 /* 5714/5780 only */
1344#define GRC_LCLCTRL_USE_EXT_SIG_DETECT 0x00000020 /* 5714/5780 only */ 1347#define GRC_LCLCTRL_USE_EXT_SIG_DETECT 0x00000020 /* 5714/5780 only */
1345#define GRC_LCLCTRL_GPIO_INPUT3 0x00000020 1348#define GRC_LCLCTRL_GPIO_INPUT3 0x00000020
@@ -2259,6 +2262,7 @@ struct tg3 {
2259#define PHY_ID_BCM5752 0x60008100 2262#define PHY_ID_BCM5752 0x60008100
2260#define PHY_ID_BCM5714 0x60008340 2263#define PHY_ID_BCM5714 0x60008340
2261#define PHY_ID_BCM5780 0x60008350 2264#define PHY_ID_BCM5780 0x60008350
2265#define PHY_ID_BCM5755 0xbc050cc0
2262#define PHY_ID_BCM5787 0xbc050ce0 2266#define PHY_ID_BCM5787 0xbc050ce0
2263#define PHY_ID_BCM8002 0x60010140 2267#define PHY_ID_BCM8002 0x60010140
2264#define PHY_ID_INVALID 0xffffffff 2268#define PHY_ID_INVALID 0xffffffff
@@ -2286,7 +2290,7 @@ struct tg3 {
2286 (X) == PHY_ID_BCM5705 || (X) == PHY_ID_BCM5750 || \ 2290 (X) == PHY_ID_BCM5705 || (X) == PHY_ID_BCM5750 || \
2287 (X) == PHY_ID_BCM5752 || (X) == PHY_ID_BCM5714 || \ 2291 (X) == PHY_ID_BCM5752 || (X) == PHY_ID_BCM5714 || \
2288 (X) == PHY_ID_BCM5780 || (X) == PHY_ID_BCM5787 || \ 2292 (X) == PHY_ID_BCM5780 || (X) == PHY_ID_BCM5787 || \
2289 (X) == PHY_ID_BCM8002) 2293 (X) == PHY_ID_BCM5755 || (X) == PHY_ID_BCM8002)
2290 2294
2291 struct tg3_hw_stats *hw_stats; 2295 struct tg3_hw_stats *hw_stats;
2292 dma_addr_t stats_mapping; 2296 dma_addr_t stats_mapping;