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authorMatt Carlson <mcarlson@broadcom.com>2007-10-10 21:03:07 -0400
committerDavid S. Miller <davem@davemloft.net>2007-10-10 21:03:07 -0400
commit9936bcf68a7e4d33f080bba9ee03d156c75c91ee (patch)
tree304371f919a53ee6be7c7bf0b672078ab123eb71 /drivers/net/tg3.h
parent0d3031d9e674cddd4c09731123ad252294cdf15f (diff)
[TG3]: Add 5761 support
This patch adds rest of the miscellaneous code required to support the 5761. Signed-off-by: Matt Carlson <mcarlson@broadcom.com> Signed-off-by: Michael Chan <mchan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/tg3.h')
-rw-r--r--drivers/net/tg3.h14
1 files changed, 12 insertions, 2 deletions
diff --git a/drivers/net/tg3.h b/drivers/net/tg3.h
index 632c2f084c52..d1f5fa394ea7 100644
--- a/drivers/net/tg3.h
+++ b/drivers/net/tg3.h
@@ -666,6 +666,7 @@
666#define SNDDATAC_MODE 0x00001000 666#define SNDDATAC_MODE 0x00001000
667#define SNDDATAC_MODE_RESET 0x00000001 667#define SNDDATAC_MODE_RESET 0x00000001
668#define SNDDATAC_MODE_ENABLE 0x00000002 668#define SNDDATAC_MODE_ENABLE 0x00000002
669#define SNDDATAC_MODE_CDELAY 0x00000010
669/* 0x1004 --> 0x1400 unused */ 670/* 0x1004 --> 0x1400 unused */
670 671
671/* Send BD ring selector */ 672/* Send BD ring selector */
@@ -854,7 +855,14 @@
854#define TG3_CPMU_CTRL 0x00003600 855#define TG3_CPMU_CTRL 0x00003600
855#define CPMU_CTRL_LINK_IDLE_MODE 0x00000200 856#define CPMU_CTRL_LINK_IDLE_MODE 0x00000200
856#define CPMU_CTRL_LINK_AWARE_MODE 0x00000400 857#define CPMU_CTRL_LINK_AWARE_MODE 0x00000400
857/* 0x3604 --> 0x3800 unused */ 858#define CPMU_CTRL_LINK_SPEED_MODE 0x00004000
859/* 0x3604 --> 0x365c unused */
860
861#define TG3_CPMU_MUTEX_REQ 0x0000365c
862#define CPMU_MUTEX_REQ_DRIVER 0x00001000
863#define TG3_CPMU_MUTEX_GNT 0x00003660
864#define CPMU_MUTEX_GNT_DRIVER 0x00001000
865/* 0x3664 --> 0x3800 unused */
858 866
859/* Mbuf cluster free registers */ 867/* Mbuf cluster free registers */
860#define MBFREE_MODE 0x00003800 868#define MBFREE_MODE 0x00003800
@@ -2394,6 +2402,7 @@ struct tg3 {
2394#define PHY_ID_BCM5787 0xbc050ce0 2402#define PHY_ID_BCM5787 0xbc050ce0
2395#define PHY_ID_BCM5756 0xbc050ed0 2403#define PHY_ID_BCM5756 0xbc050ed0
2396#define PHY_ID_BCM5784 0xbc050fa0 2404#define PHY_ID_BCM5784 0xbc050fa0
2405#define PHY_ID_BCM5761 0xbc050fd0
2397#define PHY_ID_BCM5906 0xdc00ac40 2406#define PHY_ID_BCM5906 0xdc00ac40
2398#define PHY_ID_BCM8002 0x60010140 2407#define PHY_ID_BCM8002 0x60010140
2399#define PHY_ID_INVALID 0xffffffff 2408#define PHY_ID_INVALID 0xffffffff
@@ -2423,7 +2432,8 @@ struct tg3 {
2423 (X) == PHY_ID_BCM5752 || (X) == PHY_ID_BCM5714 || \ 2432 (X) == PHY_ID_BCM5752 || (X) == PHY_ID_BCM5714 || \
2424 (X) == PHY_ID_BCM5780 || (X) == PHY_ID_BCM5787 || \ 2433 (X) == PHY_ID_BCM5780 || (X) == PHY_ID_BCM5787 || \
2425 (X) == PHY_ID_BCM5755 || (X) == PHY_ID_BCM5756 || \ 2434 (X) == PHY_ID_BCM5755 || (X) == PHY_ID_BCM5756 || \
2426 (X) == PHY_ID_BCM5906 || (X) == PHY_ID_BCM8002) 2435 (X) == PHY_ID_BCM5906 || (X) == PHY_ID_BCM5761 || \
2436 (X) == PHY_ID_BCM8002)
2427 2437
2428 struct tg3_hw_stats *hw_stats; 2438 struct tg3_hw_stats *hw_stats;
2429 dma_addr_t stats_mapping; 2439 dma_addr_t stats_mapping;