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authorMichael Chan <mchan@broadcom.com>2005-07-25 15:33:22 -0400
committerDavid S. Miller <davem@davemloft.net>2005-07-25 15:33:22 -0400
commit747e8f8bff56955374521fa4d488e702d4b0c04f (patch)
tree66ab6d67818338a0421ef1e374ff15666c85dfa6 /drivers/net/tg3.h
parentef7f5ec0deb2bcdc005f30f6f75f79c65c577cf5 (diff)
[TG3]: add 5780 fiber support
Add 5780S support by adding a new tg3_setup_fiber_mii_phy() function and a timer function for parallel link detection. 5780S uses standard MII registers for 1000BaseX and runs in GMII mode as opposed to TBI mode on older serdes chips. Signed-off-by: Michael Chan <mchan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/tg3.h')
-rw-r--r--drivers/net/tg3.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/net/tg3.h b/drivers/net/tg3.h
index 0a277c1e75d1..5c4433c147fa 100644
--- a/drivers/net/tg3.h
+++ b/drivers/net/tg3.h
@@ -2161,6 +2161,10 @@ struct tg3 {
2161#define TG3_FLG2_PROTECTED_NVRAM 0x00100000 2161#define TG3_FLG2_PROTECTED_NVRAM 0x00100000
2162#define TG3_FLG2_USING_MSI 0x00200000 2162#define TG3_FLG2_USING_MSI 0x00200000
2163#define TG3_FLG2_JUMBO_CAPABLE 0x00400000 2163#define TG3_FLG2_JUMBO_CAPABLE 0x00400000
2164#define TG3_FLG2_MII_SERDES 0x00800000
2165#define TG3_FLG2_ANY_SERDES (TG3_FLG2_PHY_SERDES | \
2166 TG3_FLG2_MII_SERDES)
2167#define TG3_FLG2_PARALLEL_DETECT 0x01000000
2164 2168
2165 u32 split_mode_max_reqs; 2169 u32 split_mode_max_reqs;
2166#define SPLIT_MODE_5704_MAX_REQ 3 2170#define SPLIT_MODE_5704_MAX_REQ 3