tg3: Add 5720 H2BMC support

This patch adds support for the new Host to BMC feature.

Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
Reviewed-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

1 files changed, 9 insertions, 0 deletions

diff --git a/drivers/net/tg3.h b/drivers/net/tg3.h
index 169a6cebf9f1..a936727018f9 100644
--- a/drivers/net/tg3.h
+++ b/drivers/net/tg3.h
@@ -479,6 +479,8 @@
 #define  TX_MODE_BIG_BCKOFF_ENABLE       0x00000020
 #define  TX_MODE_LONG_PAUSE_ENABLE       0x00000040
 #define  TX_MODE_MBUF_LOCKUP_FIX         0x00000100
+#define  TX_MODE_JMB_FRM_LEN             0x00400000
+#define  TX_MODE_CNT_DN_MODE             0x00800000
 #define MAC_TX_STATUS                   0x00000460
 #define  TX_STATUS_XOFFED                0x00000001
 #define  TX_STATUS_SENT_XOFF             0x00000002
@@ -493,6 +495,8 @@
 #define  TX_LENGTHS_IPG_SHIFT            8
 #define  TX_LENGTHS_IPG_CRS_MASK         0x00003000
 #define  TX_LENGTHS_IPG_CRS_SHIFT        12
+#define  TX_LENGTHS_JMB_FRM_LEN_MSK      0x00ff0000
+#define  TX_LENGTHS_CNT_DWN_VAL_MSK      0xff000000
 #define MAC_RX_MODE                     0x00000468
 #define  RX_MODE_RESET                   0x00000001
 #define  RX_MODE_ENABLE                  0x00000002
@@ -1330,6 +1334,7 @@
 #define  RDMAC_MODE_MULT_DMA_RD_DIS      0x01000000
 #define  RDMAC_MODE_IPV4_LSO_EN          0x08000000
 #define  RDMAC_MODE_IPV6_LSO_EN          0x10000000
+#define  RDMAC_MODE_H2BNC_VLAN_DET       0x20000000
 #define RDMAC_STATUS                    0x00004804
 #define  RDMAC_STATUS_TGTABORT           0x00000004
 #define  RDMAC_STATUS_MSTABORT           0x00000008
@@ -1622,6 +1627,8 @@
 #define  GRC_MODE_WSWAP_NONFRM_DATA     0x00000004
 #define  GRC_MODE_BSWAP_DATA            0x00000010
 #define  GRC_MODE_WSWAP_DATA            0x00000020
+#define  GRC_MODE_BYTE_SWAP_B2HRX_DATA  0x00000040
+#define  GRC_MODE_WORD_SWAP_B2HRX_DATA  0x00000080
 #define  GRC_MODE_SPLITHDR              0x00000100
 #define  GRC_MODE_NOFRM_CRACKING        0x00000200
 #define  GRC_MODE_INCL_CRC              0x00000400
@@ -1629,8 +1636,10 @@
 #define  GRC_MODE_NOIRQ_ON_SENDS        0x00002000
 #define  GRC_MODE_NOIRQ_ON_RCV          0x00004000
 #define  GRC_MODE_FORCE_PCI32BIT        0x00008000
+#define  GRC_MODE_B2HRX_ENABLE          0x00008000
 #define  GRC_MODE_HOST_STACKUP          0x00010000
 #define  GRC_MODE_HOST_SENDBDS          0x00020000
+#define  GRC_MODE_HTX2B_ENABLE          0x00040000
 #define  GRC_MODE_NO_TX_PHDR_CSUM       0x00100000
 #define  GRC_MODE_NVRAM_WR_ENABLE       0x00200000
 #define  GRC_MODE_PCIE_TL_SEL           0x00000000