diff options
author | Matt Carlson <mcarlson@broadcom.com> | 2011-04-05 10:22:46 -0400 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2011-04-06 14:29:07 -0400 |
commit | d78b59f5d18bf064abae2fa5bc87f00545e2160a (patch) | |
tree | 00649b96285b534754a2b36858e2342178b3579c /drivers/net/tg3.h | |
parent | 0a58d6689bb7c0d49addbf6992aa97234bcfc96c (diff) |
tg3: Add 5720 ASIC rev
This patch adds support for the 5720 ASIC rev.
Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
Reviewed-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/tg3.h')
-rw-r--r-- | drivers/net/tg3.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/net/tg3.h b/drivers/net/tg3.h index b8e6acc019b4..45605f2f7b54 100644 --- a/drivers/net/tg3.h +++ b/drivers/net/tg3.h | |||
@@ -58,6 +58,7 @@ | |||
58 | #define TG3PCI_DEVICE_TIGON3_57791 0x16b2 | 58 | #define TG3PCI_DEVICE_TIGON3_57791 0x16b2 |
59 | #define TG3PCI_DEVICE_TIGON3_57795 0x16b6 | 59 | #define TG3PCI_DEVICE_TIGON3_57795 0x16b6 |
60 | #define TG3PCI_DEVICE_TIGON3_5719 0x1657 | 60 | #define TG3PCI_DEVICE_TIGON3_5719 0x1657 |
61 | #define TG3PCI_DEVICE_TIGON3_5720 0x165f | ||
61 | /* 0x04 --> 0x2c unused */ | 62 | /* 0x04 --> 0x2c unused */ |
62 | #define TG3PCI_SUBVENDOR_ID_BROADCOM PCI_VENDOR_ID_BROADCOM | 63 | #define TG3PCI_SUBVENDOR_ID_BROADCOM PCI_VENDOR_ID_BROADCOM |
63 | #define TG3PCI_SUBDEVICE_ID_BROADCOM_95700A6 0x1644 | 64 | #define TG3PCI_SUBDEVICE_ID_BROADCOM_95700A6 0x1644 |
@@ -167,6 +168,7 @@ | |||
167 | #define ASIC_REV_5717 0x5717 | 168 | #define ASIC_REV_5717 0x5717 |
168 | #define ASIC_REV_57765 0x57785 | 169 | #define ASIC_REV_57765 0x57785 |
169 | #define ASIC_REV_5719 0x5719 | 170 | #define ASIC_REV_5719 0x5719 |
171 | #define ASIC_REV_5720 0x5720 | ||
170 | #define GET_CHIP_REV(CHIP_REV_ID) ((CHIP_REV_ID) >> 8) | 172 | #define GET_CHIP_REV(CHIP_REV_ID) ((CHIP_REV_ID) >> 8) |
171 | #define CHIPREV_5700_AX 0x70 | 173 | #define CHIPREV_5700_AX 0x70 |
172 | #define CHIPREV_5700_BX 0x71 | 174 | #define CHIPREV_5700_BX 0x71 |
@@ -1083,6 +1085,9 @@ | |||
1083 | #define CPMU_HST_ACC_MACCLK_6_25 0x00130000 | 1085 | #define CPMU_HST_ACC_MACCLK_6_25 0x00130000 |
1084 | /* 0x3620 --> 0x3630 unused */ | 1086 | /* 0x3620 --> 0x3630 unused */ |
1085 | 1087 | ||
1088 | #define TG3_CPMU_CLCK_ORIDE 0x00003624 | ||
1089 | #define CPMU_CLCK_ORIDE_MAC_ORIDE_EN 0x80000000 | ||
1090 | |||
1086 | #define TG3_CPMU_CLCK_STAT 0x00003630 | 1091 | #define TG3_CPMU_CLCK_STAT 0x00003630 |
1087 | #define CPMU_CLCK_STAT_MAC_CLCK_MASK 0x001f0000 | 1092 | #define CPMU_CLCK_STAT_MAC_CLCK_MASK 0x001f0000 |
1088 | #define CPMU_CLCK_STAT_MAC_CLCK_62_5 0x00000000 | 1093 | #define CPMU_CLCK_STAT_MAC_CLCK_62_5 0x00000000 |