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authorMatt Carlson <mcarlson@broadcom.com>2010-04-05 06:19:19 -0400
committerDavid S. Miller <davem@davemloft.net>2010-04-06 06:57:58 -0400
commitc1f614a1214126d7c9f58bf8481070c66b3cc1af (patch)
tree731f1839d3bf0d392cffd061c933aa2ab3fa064a /drivers/net/tg3.h
parent2f787b0b76bf5de2eaa3ca3a29d89123ae03c856 (diff)
tg3: Fix MII_TG3_DSP_EXP8 offset
The offset to the MII_TG3_DSP_EXP8 register is incorrect. Fix it. Signed-off-by: Matt Carlson <mcarlson@broadcom.com> Reviewed-by: Michael Chan <mchan@broadcom.com> Reviewed-by: Benjamin Li <benli@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/tg3.h')
-rw-r--r--drivers/net/tg3.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/net/tg3.h b/drivers/net/tg3.h
index 574a1cc4d353..4836f56cbdd1 100644
--- a/drivers/net/tg3.h
+++ b/drivers/net/tg3.h
@@ -2082,7 +2082,7 @@
2082#define MII_TG3_DSP_AADJ1CH0 0x001f 2082#define MII_TG3_DSP_AADJ1CH0 0x001f
2083#define MII_TG3_DSP_AADJ1CH3 0x601f 2083#define MII_TG3_DSP_AADJ1CH3 0x601f
2084#define MII_TG3_DSP_AADJ1CH3_ADCCKADJ 0x0002 2084#define MII_TG3_DSP_AADJ1CH3_ADCCKADJ 0x0002
2085#define MII_TG3_DSP_EXP8 0x0708 2085#define MII_TG3_DSP_EXP8 0x0f08
2086#define MII_TG3_DSP_EXP8_REJ2MHz 0x0001 2086#define MII_TG3_DSP_EXP8_REJ2MHz 0x0001
2087#define MII_TG3_DSP_EXP8_AEDW 0x0200 2087#define MII_TG3_DSP_EXP8_AEDW 0x0200
2088#define MII_TG3_DSP_EXP75 0x0f75 2088#define MII_TG3_DSP_EXP75 0x0f75