diff options
author | Matt Carlson <mcarlson@broadcom.com> | 2010-04-12 02:58:27 -0400 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2010-04-13 05:25:44 -0400 |
commit | d2757fc4076118e13180e91f02c3c52659be3d9d (patch) | |
tree | 2862b2b319d58cfa581d86855e80525d966aac6b /drivers/net/tg3.h | |
parent | a977dbe8445b8a81d6127c4aa9112a2c29a1a008 (diff) |
tg3: Optimize rx double copy test
On a PCIX bus, the 5701 has a bug which requires the driver to double
copy all rx packets. The rx code uses the rx_offset device member as a
flag to determine if this workaround should take effect. The following
patch will modify the rx_offset member such that this test will become
less clear.
The patch starts by integrating the workaround check into the packet
length check. It rounds out the implementation by relaxing the
workaround restrictions if the platform has efficient unaligned
accesses.
Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
Reviewed-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/tg3.h')
-rw-r--r-- | drivers/net/tg3.h | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/drivers/net/tg3.h b/drivers/net/tg3.h index 9e7fe0e7cdb8..43dd1d26243c 100644 --- a/drivers/net/tg3.h +++ b/drivers/net/tg3.h | |||
@@ -23,8 +23,6 @@ | |||
23 | #define TG3_BDINFO_NIC_ADDR 0xcUL /* 32-bit */ | 23 | #define TG3_BDINFO_NIC_ADDR 0xcUL /* 32-bit */ |
24 | #define TG3_BDINFO_SIZE 0x10UL | 24 | #define TG3_BDINFO_SIZE 0x10UL |
25 | 25 | ||
26 | #define RX_COPY_THRESHOLD 256 | ||
27 | |||
28 | #define TG3_RX_INTERNAL_RING_SZ_5906 32 | 26 | #define TG3_RX_INTERNAL_RING_SZ_5906 32 |
29 | 27 | ||
30 | #define RX_STD_MAX_SIZE 1536 | 28 | #define RX_STD_MAX_SIZE 1536 |
@@ -2754,9 +2752,11 @@ struct tg3 { | |||
2754 | struct tg3_napi napi[TG3_IRQ_MAX_VECS]; | 2752 | struct tg3_napi napi[TG3_IRQ_MAX_VECS]; |
2755 | void (*write32_rx_mbox) (struct tg3 *, u32, | 2753 | void (*write32_rx_mbox) (struct tg3 *, u32, |
2756 | u32); | 2754 | u32); |
2755 | u32 rx_copy_thresh; | ||
2757 | u32 rx_pending; | 2756 | u32 rx_pending; |
2758 | u32 rx_jumbo_pending; | 2757 | u32 rx_jumbo_pending; |
2759 | u32 rx_std_max_post; | 2758 | u32 rx_std_max_post; |
2759 | u32 rx_offset; | ||
2760 | u32 rx_pkt_map_sz; | 2760 | u32 rx_pkt_map_sz; |
2761 | #if TG3_VLAN_TAG_USED | 2761 | #if TG3_VLAN_TAG_USED |
2762 | struct vlan_group *vlgrp; | 2762 | struct vlan_group *vlgrp; |
@@ -2776,7 +2776,6 @@ struct tg3 { | |||
2776 | unsigned long last_event_jiffies; | 2776 | unsigned long last_event_jiffies; |
2777 | }; | 2777 | }; |
2778 | 2778 | ||
2779 | u32 rx_offset; | ||
2780 | u32 tg3_flags; | 2779 | u32 tg3_flags; |
2781 | #define TG3_FLAG_TAGGED_STATUS 0x00000001 | 2780 | #define TG3_FLAG_TAGGED_STATUS 0x00000001 |
2782 | #define TG3_FLAG_TXD_MBOX_HWBUG 0x00000002 | 2781 | #define TG3_FLAG_TXD_MBOX_HWBUG 0x00000002 |