diff options
author | Matt Carlson <mcarlson@broadcom.com> | 2009-12-03 03:36:22 -0500 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2009-12-03 16:18:04 -0500 |
commit | 141518c95870228da4e050fbe31a8f0c9df82c72 (patch) | |
tree | 377e3cb707cf848213f5aeb653dd50cae572135c /drivers/net/tg3.h | |
parent | b703df6f628ab63eaa875232551b1f2f0503b9af (diff) |
tg3: Add some VPD preprocessor constants
This patch cleans up the VPD code by creating preprocessor definitions
and using them in the place of hardcoded constants.
Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
Reviewed-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/tg3.h')
-rw-r--r-- | drivers/net/tg3.h | 10 |
1 files changed, 8 insertions, 2 deletions
diff --git a/drivers/net/tg3.h b/drivers/net/tg3.h index 6a2c31071caf..cd30889650f8 100644 --- a/drivers/net/tg3.h +++ b/drivers/net/tg3.h | |||
@@ -1821,6 +1821,11 @@ | |||
1821 | 1821 | ||
1822 | #define TG3_OTP_DEFAULT 0x286c1640 | 1822 | #define TG3_OTP_DEFAULT 0x286c1640 |
1823 | 1823 | ||
1824 | |||
1825 | /* Hardware Legacy NVRAM layout */ | ||
1826 | #define TG3_NVM_VPD_OFF 0x100 | ||
1827 | #define TG3_NVM_VPD_LEN 256 | ||
1828 | |||
1824 | /* Hardware Selfboot NVRAM layout */ | 1829 | /* Hardware Selfboot NVRAM layout */ |
1825 | #define TG3_NVM_HWSB_CFG1 0x00000004 | 1830 | #define TG3_NVM_HWSB_CFG1 0x00000004 |
1826 | #define TG3_NVM_HWSB_CFG1_MAJMSK 0xf8000000 | 1831 | #define TG3_NVM_HWSB_CFG1_MAJMSK 0xf8000000 |
@@ -2893,8 +2898,9 @@ struct tg3 { | |||
2893 | u32 led_ctrl; | 2898 | u32 led_ctrl; |
2894 | u32 phy_otp; | 2899 | u32 phy_otp; |
2895 | 2900 | ||
2896 | char board_part_number[24]; | 2901 | #define TG3_BPN_SIZE 24 |
2897 | #define TG3_VER_SIZE 32 | 2902 | char board_part_number[TG3_BPN_SIZE]; |
2903 | #define TG3_VER_SIZE ETHTOOL_FWVERS_LEN | ||
2898 | char fw_ver[TG3_VER_SIZE]; | 2904 | char fw_ver[TG3_VER_SIZE]; |
2899 | u32 nic_sram_data_cfg; | 2905 | u32 nic_sram_data_cfg; |
2900 | u32 pci_clock_ctrl; | 2906 | u32 pci_clock_ctrl; |