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authorMatt Carlson <mcarlson@broadcom.com>2007-10-10 21:01:09 -0400
committerDavid S. Miller <davem@davemloft.net>2007-10-10 21:01:09 -0400
commit6b91fa02796292c322b20572188c74c1ef5bb02b (patch)
treedee1577ca9507e256302dc6b33dfb057fb267481 /drivers/net/tg3.h
parent227b60f5102cda4e4ab792b526a59c8cb20cd9f8 (diff)
[TG3]: Add new 5761 NVRAM decode routines
This patch adds a new 5761-specific NVRAM strapping decode routine. Signed-off-by: Matt Carlson <mcarlson@broadcom.com> Signed-off-by: Michael Chan <mchan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/tg3.h')
-rw-r--r--drivers/net/tg3.h25
1 files changed, 23 insertions, 2 deletions
diff --git a/drivers/net/tg3.h b/drivers/net/tg3.h
index d8e829f6fcb2..88d08f3ede03 100644
--- a/drivers/net/tg3.h
+++ b/drivers/net/tg3.h
@@ -124,6 +124,7 @@
124#define ASIC_REV_5906 0x0c 124#define ASIC_REV_5906 0x0c
125#define ASIC_REV_USE_PROD_ID_REG 0x0f 125#define ASIC_REV_USE_PROD_ID_REG 0x0f
126#define ASIC_REV_5784 0x5784 126#define ASIC_REV_5784 0x5784
127#define ASIC_REV_5761 0x5761
127#define GET_CHIP_REV(CHIP_REV_ID) ((CHIP_REV_ID) >> 8) 128#define GET_CHIP_REV(CHIP_REV_ID) ((CHIP_REV_ID) >> 8)
128#define CHIPREV_5700_AX 0x70 129#define CHIPREV_5700_AX 0x70
129#define CHIPREV_5700_BX 0x71 130#define CHIPREV_5700_BX 0x71
@@ -1463,6 +1464,22 @@
1463#define FLASH_5787VENDOR_ATMEL_EEPROM_376KHZ 0x03000002 1464#define FLASH_5787VENDOR_ATMEL_EEPROM_376KHZ 0x03000002
1464#define FLASH_5787VENDOR_MICRO_EEPROM_64KHZ 0x03000000 1465#define FLASH_5787VENDOR_MICRO_EEPROM_64KHZ 0x03000000
1465#define FLASH_5787VENDOR_MICRO_EEPROM_376KHZ 0x02000000 1466#define FLASH_5787VENDOR_MICRO_EEPROM_376KHZ 0x02000000
1467#define FLASH_5761VENDOR_ATMEL_MDB021D 0x00800003
1468#define FLASH_5761VENDOR_ATMEL_MDB041D 0x00800000
1469#define FLASH_5761VENDOR_ATMEL_MDB081D 0x00800002
1470#define FLASH_5761VENDOR_ATMEL_MDB161D 0x00800001
1471#define FLASH_5761VENDOR_ATMEL_ADB021D 0x00000003
1472#define FLASH_5761VENDOR_ATMEL_ADB041D 0x00000000
1473#define FLASH_5761VENDOR_ATMEL_ADB081D 0x00000002
1474#define FLASH_5761VENDOR_ATMEL_ADB161D 0x00000001
1475#define FLASH_5761VENDOR_ST_M_M45PE20 0x02800001
1476#define FLASH_5761VENDOR_ST_M_M45PE40 0x02800000
1477#define FLASH_5761VENDOR_ST_M_M45PE80 0x02800002
1478#define FLASH_5761VENDOR_ST_M_M45PE16 0x02800003
1479#define FLASH_5761VENDOR_ST_A_M45PE20 0x02000001
1480#define FLASH_5761VENDOR_ST_A_M45PE40 0x02000000
1481#define FLASH_5761VENDOR_ST_A_M45PE80 0x02000002
1482#define FLASH_5761VENDOR_ST_A_M45PE16 0x02000003
1466#define NVRAM_CFG1_5752PAGE_SIZE_MASK 0x70000000 1483#define NVRAM_CFG1_5752PAGE_SIZE_MASK 0x70000000
1467#define FLASH_5752PAGE_SIZE_256 0x00000000 1484#define FLASH_5752PAGE_SIZE_256 0x00000000
1468#define FLASH_5752PAGE_SIZE_512 0x10000000 1485#define FLASH_5752PAGE_SIZE_512 0x10000000
@@ -1493,9 +1510,11 @@
1493#define ACCESS_ENABLE 0x00000001 1510#define ACCESS_ENABLE 0x00000001
1494#define ACCESS_WR_ENABLE 0x00000002 1511#define ACCESS_WR_ENABLE 0x00000002
1495#define NVRAM_WRITE1 0x00007028 1512#define NVRAM_WRITE1 0x00007028
1496/* 0x702c --> 0x7400 unused */ 1513/* 0x702c unused */
1514
1515#define NVRAM_ADDR_LOCKOUT 0x00007030
1516/* 0x7034 --> 0x7c00 unused */
1497 1517
1498/* 0x7400 --> 0x7c00 unused */
1499#define PCIE_TRANSACTION_CFG 0x00007c04 1518#define PCIE_TRANSACTION_CFG 0x00007c04
1500#define PCIE_TRANS_CFG_1SHOT_MSI 0x20000000 1519#define PCIE_TRANS_CFG_1SHOT_MSI 0x20000000
1501#define PCIE_TRANS_CFG_LOM 0x00000020 1520#define PCIE_TRANS_CFG_LOM 0x00000020
@@ -2269,6 +2288,8 @@ struct tg3 {
2269#define TG3_FLG2_PHY_JITTER_BUG 0x20000000 2288#define TG3_FLG2_PHY_JITTER_BUG 0x20000000
2270#define TG3_FLG2_NO_FWARE_REPORTED 0x40000000 2289#define TG3_FLG2_NO_FWARE_REPORTED 0x40000000
2271#define TG3_FLG2_PHY_ADJUST_TRIM 0x80000000 2290#define TG3_FLG2_PHY_ADJUST_TRIM 0x80000000
2291 u32 tg3_flags3;
2292#define TG3_FLG3_NO_NVRAM_ADDR_TRANS 0x00000001
2272 2293
2273 struct timer_list timer; 2294 struct timer_list timer;
2274 u16 timer_counter; 2295 u16 timer_counter;