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authorMatt Carlson <mcarlson@broadcom.com>2010-04-05 06:19:29 -0400
committerDavid S. Miller <davem@davemloft.net>2010-04-06 06:58:04 -0400
commit7705736f5fc2e8fd0aa98eb7667e65dbedf50d63 (patch)
tree7c96b32f6102a46df88e4c8072a34cf2ede61ab5 /drivers/net/tg3.c
parent859a58879d7c771e78a373028d719467a2f8feb7 (diff)
tg3: Remove tg3_dump_state()
The tg3_dump_state() function is commented out and doesn't get used much when debugging efforts are underway. The chip architecture has also changed enough that any debugging effort that might use it would have to tailor it to the capabilities of the hardware. This patch just removes the function entirely. Signed-off-by: Matt Carlson <mcarlson@broadcom.com> Reviewed-by: Michael Chan <mchan@broadcom.com> Reviewed-by: Benjamin Li <benli@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/tg3.c')
-rw-r--r--drivers/net/tg3.c233
1 files changed, 0 insertions, 233 deletions
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c
index ebf16050474d..dd137e97f207 100644
--- a/drivers/net/tg3.c
+++ b/drivers/net/tg3.c
@@ -8925,236 +8925,6 @@ err_out1:
8925 return err; 8925 return err;
8926} 8926}
8927 8927
8928#if 0
8929/*static*/ void tg3_dump_state(struct tg3 *tp)
8930{
8931 u32 val32, val32_2, val32_3, val32_4, val32_5;
8932 u16 val16;
8933 int i;
8934 struct tg3_hw_status *sblk = tp->napi[0]->hw_status;
8935
8936 pci_read_config_word(tp->pdev, PCI_STATUS, &val16);
8937 pci_read_config_dword(tp->pdev, TG3PCI_PCISTATE, &val32);
8938 printk("DEBUG: PCI status [%04x] TG3PCI state[%08x]\n",
8939 val16, val32);
8940
8941 /* MAC block */
8942 printk("DEBUG: MAC_MODE[%08x] MAC_STATUS[%08x]\n",
8943 tr32(MAC_MODE), tr32(MAC_STATUS));
8944 printk(" MAC_EVENT[%08x] MAC_LED_CTRL[%08x]\n",
8945 tr32(MAC_EVENT), tr32(MAC_LED_CTRL));
8946 printk("DEBUG: MAC_TX_MODE[%08x] MAC_TX_STATUS[%08x]\n",
8947 tr32(MAC_TX_MODE), tr32(MAC_TX_STATUS));
8948 printk(" MAC_RX_MODE[%08x] MAC_RX_STATUS[%08x]\n",
8949 tr32(MAC_RX_MODE), tr32(MAC_RX_STATUS));
8950
8951 /* Send data initiator control block */
8952 printk("DEBUG: SNDDATAI_MODE[%08x] SNDDATAI_STATUS[%08x]\n",
8953 tr32(SNDDATAI_MODE), tr32(SNDDATAI_STATUS));
8954 printk(" SNDDATAI_STATSCTRL[%08x]\n",
8955 tr32(SNDDATAI_STATSCTRL));
8956
8957 /* Send data completion control block */
8958 printk("DEBUG: SNDDATAC_MODE[%08x]\n", tr32(SNDDATAC_MODE));
8959
8960 /* Send BD ring selector block */
8961 printk("DEBUG: SNDBDS_MODE[%08x] SNDBDS_STATUS[%08x]\n",
8962 tr32(SNDBDS_MODE), tr32(SNDBDS_STATUS));
8963
8964 /* Send BD initiator control block */
8965 printk("DEBUG: SNDBDI_MODE[%08x] SNDBDI_STATUS[%08x]\n",
8966 tr32(SNDBDI_MODE), tr32(SNDBDI_STATUS));
8967
8968 /* Send BD completion control block */
8969 printk("DEBUG: SNDBDC_MODE[%08x]\n", tr32(SNDBDC_MODE));
8970
8971 /* Receive list placement control block */
8972 printk("DEBUG: RCVLPC_MODE[%08x] RCVLPC_STATUS[%08x]\n",
8973 tr32(RCVLPC_MODE), tr32(RCVLPC_STATUS));
8974 printk(" RCVLPC_STATSCTRL[%08x]\n",
8975 tr32(RCVLPC_STATSCTRL));
8976
8977 /* Receive data and receive BD initiator control block */
8978 printk("DEBUG: RCVDBDI_MODE[%08x] RCVDBDI_STATUS[%08x]\n",
8979 tr32(RCVDBDI_MODE), tr32(RCVDBDI_STATUS));
8980
8981 /* Receive data completion control block */
8982 printk("DEBUG: RCVDCC_MODE[%08x]\n",
8983 tr32(RCVDCC_MODE));
8984
8985 /* Receive BD initiator control block */
8986 printk("DEBUG: RCVBDI_MODE[%08x] RCVBDI_STATUS[%08x]\n",
8987 tr32(RCVBDI_MODE), tr32(RCVBDI_STATUS));
8988
8989 /* Receive BD completion control block */
8990 printk("DEBUG: RCVCC_MODE[%08x] RCVCC_STATUS[%08x]\n",
8991 tr32(RCVCC_MODE), tr32(RCVCC_STATUS));
8992
8993 /* Receive list selector control block */
8994 printk("DEBUG: RCVLSC_MODE[%08x] RCVLSC_STATUS[%08x]\n",
8995 tr32(RCVLSC_MODE), tr32(RCVLSC_STATUS));
8996
8997 /* Mbuf cluster free block */
8998 printk("DEBUG: MBFREE_MODE[%08x] MBFREE_STATUS[%08x]\n",
8999 tr32(MBFREE_MODE), tr32(MBFREE_STATUS));
9000
9001 /* Host coalescing control block */
9002 printk("DEBUG: HOSTCC_MODE[%08x] HOSTCC_STATUS[%08x]\n",
9003 tr32(HOSTCC_MODE), tr32(HOSTCC_STATUS));
9004 printk("DEBUG: HOSTCC_STATS_BLK_HOST_ADDR[%08x%08x]\n",
9005 tr32(HOSTCC_STATS_BLK_HOST_ADDR + TG3_64BIT_REG_HIGH),
9006 tr32(HOSTCC_STATS_BLK_HOST_ADDR + TG3_64BIT_REG_LOW));
9007 printk("DEBUG: HOSTCC_STATUS_BLK_HOST_ADDR[%08x%08x]\n",
9008 tr32(HOSTCC_STATUS_BLK_HOST_ADDR + TG3_64BIT_REG_HIGH),
9009 tr32(HOSTCC_STATUS_BLK_HOST_ADDR + TG3_64BIT_REG_LOW));
9010 printk("DEBUG: HOSTCC_STATS_BLK_NIC_ADDR[%08x]\n",
9011 tr32(HOSTCC_STATS_BLK_NIC_ADDR));
9012 printk("DEBUG: HOSTCC_STATUS_BLK_NIC_ADDR[%08x]\n",
9013 tr32(HOSTCC_STATUS_BLK_NIC_ADDR));
9014
9015 /* Memory arbiter control block */
9016 printk("DEBUG: MEMARB_MODE[%08x] MEMARB_STATUS[%08x]\n",
9017 tr32(MEMARB_MODE), tr32(MEMARB_STATUS));
9018
9019 /* Buffer manager control block */
9020 printk("DEBUG: BUFMGR_MODE[%08x] BUFMGR_STATUS[%08x]\n",
9021 tr32(BUFMGR_MODE), tr32(BUFMGR_STATUS));
9022 printk("DEBUG: BUFMGR_MB_POOL_ADDR[%08x] BUFMGR_MB_POOL_SIZE[%08x]\n",
9023 tr32(BUFMGR_MB_POOL_ADDR), tr32(BUFMGR_MB_POOL_SIZE));
9024 printk("DEBUG: BUFMGR_DMA_DESC_POOL_ADDR[%08x] "
9025 "BUFMGR_DMA_DESC_POOL_SIZE[%08x]\n",
9026 tr32(BUFMGR_DMA_DESC_POOL_ADDR),
9027 tr32(BUFMGR_DMA_DESC_POOL_SIZE));
9028
9029 /* Read DMA control block */
9030 printk("DEBUG: RDMAC_MODE[%08x] RDMAC_STATUS[%08x]\n",
9031 tr32(RDMAC_MODE), tr32(RDMAC_STATUS));
9032
9033 /* Write DMA control block */
9034 printk("DEBUG: WDMAC_MODE[%08x] WDMAC_STATUS[%08x]\n",
9035 tr32(WDMAC_MODE), tr32(WDMAC_STATUS));
9036
9037 /* DMA completion block */
9038 printk("DEBUG: DMAC_MODE[%08x]\n",
9039 tr32(DMAC_MODE));
9040
9041 /* GRC block */
9042 printk("DEBUG: GRC_MODE[%08x] GRC_MISC_CFG[%08x]\n",
9043 tr32(GRC_MODE), tr32(GRC_MISC_CFG));
9044 printk("DEBUG: GRC_LOCAL_CTRL[%08x]\n",
9045 tr32(GRC_LOCAL_CTRL));
9046
9047 /* TG3_BDINFOs */
9048 printk("DEBUG: RCVDBDI_JUMBO_BD[%08x%08x:%08x:%08x]\n",
9049 tr32(RCVDBDI_JUMBO_BD + 0x0),
9050 tr32(RCVDBDI_JUMBO_BD + 0x4),
9051 tr32(RCVDBDI_JUMBO_BD + 0x8),
9052 tr32(RCVDBDI_JUMBO_BD + 0xc));
9053 printk("DEBUG: RCVDBDI_STD_BD[%08x%08x:%08x:%08x]\n",
9054 tr32(RCVDBDI_STD_BD + 0x0),
9055 tr32(RCVDBDI_STD_BD + 0x4),
9056 tr32(RCVDBDI_STD_BD + 0x8),
9057 tr32(RCVDBDI_STD_BD + 0xc));
9058 printk("DEBUG: RCVDBDI_MINI_BD[%08x%08x:%08x:%08x]\n",
9059 tr32(RCVDBDI_MINI_BD + 0x0),
9060 tr32(RCVDBDI_MINI_BD + 0x4),
9061 tr32(RCVDBDI_MINI_BD + 0x8),
9062 tr32(RCVDBDI_MINI_BD + 0xc));
9063
9064 tg3_read_mem(tp, NIC_SRAM_SEND_RCB + 0x0, &val32);
9065 tg3_read_mem(tp, NIC_SRAM_SEND_RCB + 0x4, &val32_2);
9066 tg3_read_mem(tp, NIC_SRAM_SEND_RCB + 0x8, &val32_3);
9067 tg3_read_mem(tp, NIC_SRAM_SEND_RCB + 0xc, &val32_4);
9068 printk("DEBUG: SRAM_SEND_RCB_0[%08x%08x:%08x:%08x]\n",
9069 val32, val32_2, val32_3, val32_4);
9070
9071 tg3_read_mem(tp, NIC_SRAM_RCV_RET_RCB + 0x0, &val32);
9072 tg3_read_mem(tp, NIC_SRAM_RCV_RET_RCB + 0x4, &val32_2);
9073 tg3_read_mem(tp, NIC_SRAM_RCV_RET_RCB + 0x8, &val32_3);
9074 tg3_read_mem(tp, NIC_SRAM_RCV_RET_RCB + 0xc, &val32_4);
9075 printk("DEBUG: SRAM_RCV_RET_RCB_0[%08x%08x:%08x:%08x]\n",
9076 val32, val32_2, val32_3, val32_4);
9077
9078 tg3_read_mem(tp, NIC_SRAM_STATUS_BLK + 0x0, &val32);
9079 tg3_read_mem(tp, NIC_SRAM_STATUS_BLK + 0x4, &val32_2);
9080 tg3_read_mem(tp, NIC_SRAM_STATUS_BLK + 0x8, &val32_3);
9081 tg3_read_mem(tp, NIC_SRAM_STATUS_BLK + 0xc, &val32_4);
9082 tg3_read_mem(tp, NIC_SRAM_STATUS_BLK + 0x10, &val32_5);
9083 printk("DEBUG: SRAM_STATUS_BLK[%08x:%08x:%08x:%08x:%08x]\n",
9084 val32, val32_2, val32_3, val32_4, val32_5);
9085
9086 /* SW status block */
9087 printk(KERN_DEBUG
9088 "Host status block [%08x:%08x:(%04x:%04x:%04x):(%04x:%04x)]\n",
9089 sblk->status,
9090 sblk->status_tag,
9091 sblk->rx_jumbo_consumer,
9092 sblk->rx_consumer,
9093 sblk->rx_mini_consumer,
9094 sblk->idx[0].rx_producer,
9095 sblk->idx[0].tx_consumer);
9096
9097 /* SW statistics block */
9098 printk("DEBUG: Host statistics block [%08x:%08x:%08x:%08x]\n",
9099 ((u32 *)tp->hw_stats)[0],
9100 ((u32 *)tp->hw_stats)[1],
9101 ((u32 *)tp->hw_stats)[2],
9102 ((u32 *)tp->hw_stats)[3]);
9103
9104 /* Mailboxes */
9105 printk("DEBUG: SNDHOST_PROD[%08x%08x] SNDNIC_PROD[%08x%08x]\n",
9106 tr32_mailbox(MAILBOX_SNDHOST_PROD_IDX_0 + 0x0),
9107 tr32_mailbox(MAILBOX_SNDHOST_PROD_IDX_0 + 0x4),
9108 tr32_mailbox(MAILBOX_SNDNIC_PROD_IDX_0 + 0x0),
9109 tr32_mailbox(MAILBOX_SNDNIC_PROD_IDX_0 + 0x4));
9110
9111 /* NIC side send descriptors. */
9112 for (i = 0; i < 6; i++) {
9113 unsigned long txd;
9114
9115 txd = tp->regs + NIC_SRAM_WIN_BASE + NIC_SRAM_TX_BUFFER_DESC
9116 + (i * sizeof(struct tg3_tx_buffer_desc));
9117 printk("DEBUG: NIC TXD(%d)[%08x:%08x:%08x:%08x]\n",
9118 i,
9119 readl(txd + 0x0), readl(txd + 0x4),
9120 readl(txd + 0x8), readl(txd + 0xc));
9121 }
9122
9123 /* NIC side RX descriptors. */
9124 for (i = 0; i < 6; i++) {
9125 unsigned long rxd;
9126
9127 rxd = tp->regs + NIC_SRAM_WIN_BASE + NIC_SRAM_RX_BUFFER_DESC
9128 + (i * sizeof(struct tg3_rx_buffer_desc));
9129 printk("DEBUG: NIC RXD_STD(%d)[0][%08x:%08x:%08x:%08x]\n",
9130 i,
9131 readl(rxd + 0x0), readl(rxd + 0x4),
9132 readl(rxd + 0x8), readl(rxd + 0xc));
9133 rxd += (4 * sizeof(u32));
9134 printk("DEBUG: NIC RXD_STD(%d)[1][%08x:%08x:%08x:%08x]\n",
9135 i,
9136 readl(rxd + 0x0), readl(rxd + 0x4),
9137 readl(rxd + 0x8), readl(rxd + 0xc));
9138 }
9139
9140 for (i = 0; i < 6; i++) {
9141 unsigned long rxd;
9142
9143 rxd = tp->regs + NIC_SRAM_WIN_BASE + NIC_SRAM_RX_JUMBO_BUFFER_DESC
9144 + (i * sizeof(struct tg3_rx_buffer_desc));
9145 printk("DEBUG: NIC RXD_JUMBO(%d)[0][%08x:%08x:%08x:%08x]\n",
9146 i,
9147 readl(rxd + 0x0), readl(rxd + 0x4),
9148 readl(rxd + 0x8), readl(rxd + 0xc));
9149 rxd += (4 * sizeof(u32));
9150 printk("DEBUG: NIC RXD_JUMBO(%d)[1][%08x:%08x:%08x:%08x]\n",
9151 i,
9152 readl(rxd + 0x0), readl(rxd + 0x4),
9153 readl(rxd + 0x8), readl(rxd + 0xc));
9154 }
9155}
9156#endif
9157
9158static struct net_device_stats *tg3_get_stats(struct net_device *); 8928static struct net_device_stats *tg3_get_stats(struct net_device *);
9159static struct tg3_ethtool_stats *tg3_get_estats(struct tg3 *); 8929static struct tg3_ethtool_stats *tg3_get_estats(struct tg3 *);
9160 8930
@@ -9173,9 +8943,6 @@ static int tg3_close(struct net_device *dev)
9173 tg3_phy_stop(tp); 8943 tg3_phy_stop(tp);
9174 8944
9175 tg3_full_lock(tp, 1); 8945 tg3_full_lock(tp, 1);
9176#if 0
9177 tg3_dump_state(tp);
9178#endif
9179 8946
9180 tg3_disable_ints(tp); 8947 tg3_disable_ints(tp);
9181 8948
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