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authorMichael Chan <mchan@broadcom.com>2006-12-07 03:21:14 -0500
committerDavid S. Miller <davem@davemloft.net>2006-12-07 03:21:14 -0500
commit9d26e213423923c9e033ccd373705118131827c9 (patch)
tree182ec37041687479c2e4697463e77a1b195b9d26 /drivers/net/tg3.c
parent676917d488212303ce4a7d033815ce8799201010 (diff)
[TG3]: Add TG3_FLG2_IS_NIC flag.
Add Tg3_FLG2_IS_NIC flag to unambiguously determine whether the device is NIC or onboard. Previously, the EEPROM_WRITE_PROT flag was overloaded to also mean onboard. With the separation, we can support some devices that are onboard but do not use eeprom write protect. Signed-off-by: Michael Chan <mchan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/tg3.c')
-rw-r--r--drivers/net/tg3.c37
1 files changed, 24 insertions, 13 deletions
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c
index 5514828b7929..16bc05fe531f 100644
--- a/drivers/net/tg3.c
+++ b/drivers/net/tg3.c
@@ -1062,7 +1062,7 @@ static void tg3_frob_aux_power(struct tg3 *tp)
1062{ 1062{
1063 struct tg3 *tp_peer = tp; 1063 struct tg3 *tp_peer = tp;
1064 1064
1065 if ((tp->tg3_flags & TG3_FLAG_EEPROM_WRITE_PROT) != 0) 1065 if ((tp->tg3_flags2 & TG3_FLG2_IS_NIC) == 0)
1066 return; 1066 return;
1067 1067
1068 if ((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5704) || 1068 if ((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5704) ||
@@ -1213,8 +1213,8 @@ static int tg3_set_power_state(struct tg3 *tp, pci_power_t state)
1213 power_control); 1213 power_control);
1214 udelay(100); /* Delay after power state change */ 1214 udelay(100); /* Delay after power state change */
1215 1215
1216 /* Switch out of Vaux if it is not a LOM */ 1216 /* Switch out of Vaux if it is a NIC */
1217 if (!(tp->tg3_flags & TG3_FLAG_EEPROM_WRITE_PROT)) 1217 if (tp->tg3_flags2 & TG3_FLG2_IS_NIC)
1218 tw32_wait_f(GRC_LOCAL_CTRL, tp->grc_local_ctrl, 100); 1218 tw32_wait_f(GRC_LOCAL_CTRL, tp->grc_local_ctrl, 100);
1219 1219
1220 return 0; 1220 return 0;
@@ -6397,16 +6397,17 @@ static int tg3_reset_hw(struct tg3 *tp, int reset_phy)
6397 udelay(40); 6397 udelay(40);
6398 6398
6399 /* tp->grc_local_ctrl is partially set up during tg3_get_invariants(). 6399 /* tp->grc_local_ctrl is partially set up during tg3_get_invariants().
6400 * If TG3_FLAG_EEPROM_WRITE_PROT is set, we should read the 6400 * If TG3_FLG2_IS_NIC is zero, we should read the
6401 * register to preserve the GPIO settings for LOMs. The GPIOs, 6401 * register to preserve the GPIO settings for LOMs. The GPIOs,
6402 * whether used as inputs or outputs, are set by boot code after 6402 * whether used as inputs or outputs, are set by boot code after
6403 * reset. 6403 * reset.
6404 */ 6404 */
6405 if (tp->tg3_flags & TG3_FLAG_EEPROM_WRITE_PROT) { 6405 if (!(tp->tg3_flags2 & TG3_FLG2_IS_NIC)) {
6406 u32 gpio_mask; 6406 u32 gpio_mask;
6407 6407
6408 gpio_mask = GRC_LCLCTRL_GPIO_OE0 | GRC_LCLCTRL_GPIO_OE2 | 6408 gpio_mask = GRC_LCLCTRL_GPIO_OE0 | GRC_LCLCTRL_GPIO_OE1 |
6409 GRC_LCLCTRL_GPIO_OUTPUT0 | GRC_LCLCTRL_GPIO_OUTPUT2; 6409 GRC_LCLCTRL_GPIO_OE2 | GRC_LCLCTRL_GPIO_OUTPUT0 |
6410 GRC_LCLCTRL_GPIO_OUTPUT1 | GRC_LCLCTRL_GPIO_OUTPUT2;
6410 6411
6411 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5752) 6412 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5752)
6412 gpio_mask |= GRC_LCLCTRL_GPIO_OE3 | 6413 gpio_mask |= GRC_LCLCTRL_GPIO_OE3 |
@@ -6418,8 +6419,9 @@ static int tg3_reset_hw(struct tg3 *tp, int reset_phy)
6418 tp->grc_local_ctrl |= tr32(GRC_LOCAL_CTRL) & gpio_mask; 6419 tp->grc_local_ctrl |= tr32(GRC_LOCAL_CTRL) & gpio_mask;
6419 6420
6420 /* GPIO1 must be driven high for eeprom write protect */ 6421 /* GPIO1 must be driven high for eeprom write protect */
6421 tp->grc_local_ctrl |= (GRC_LCLCTRL_GPIO_OE1 | 6422 if (tp->tg3_flags & TG3_FLAG_EEPROM_WRITE_PROT)
6422 GRC_LCLCTRL_GPIO_OUTPUT1); 6423 tp->grc_local_ctrl |= (GRC_LCLCTRL_GPIO_OE1 |
6424 GRC_LCLCTRL_GPIO_OUTPUT1);
6423 } 6425 }
6424 tw32_f(GRC_LOCAL_CTRL, tp->grc_local_ctrl); 6426 tw32_f(GRC_LOCAL_CTRL, tp->grc_local_ctrl);
6425 udelay(100); 6427 udelay(100);
@@ -9963,8 +9965,10 @@ static void __devinit tg3_get_eeprom_hw_cfg(struct tg3 *tp)
9963 tp->tg3_flags |= TG3_FLAG_EEPROM_WRITE_PROT; 9965 tp->tg3_flags |= TG3_FLAG_EEPROM_WRITE_PROT;
9964 9966
9965 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5906) { 9967 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5906) {
9966 if (!(tr32(PCIE_TRANSACTION_CFG) & PCIE_TRANS_CFG_LOM)) 9968 if (!(tr32(PCIE_TRANSACTION_CFG) & PCIE_TRANS_CFG_LOM)) {
9967 tp->tg3_flags &= ~TG3_FLAG_EEPROM_WRITE_PROT; 9969 tp->tg3_flags &= ~TG3_FLAG_EEPROM_WRITE_PROT;
9970 tp->tg3_flags2 |= TG3_FLG2_IS_NIC;
9971 }
9968 return; 9972 return;
9969 } 9973 }
9970 9974
@@ -10064,10 +10068,17 @@ static void __devinit tg3_get_eeprom_hw_cfg(struct tg3 *tp)
10064 tp->pdev->subsystem_vendor == PCI_VENDOR_ID_DELL) 10068 tp->pdev->subsystem_vendor == PCI_VENDOR_ID_DELL)
10065 tp->led_ctrl = LED_CTRL_MODE_PHY_2; 10069 tp->led_ctrl = LED_CTRL_MODE_PHY_2;
10066 10070
10067 if (nic_cfg & NIC_SRAM_DATA_CFG_EEPROM_WP) 10071 if (nic_cfg & NIC_SRAM_DATA_CFG_EEPROM_WP) {
10068 tp->tg3_flags |= TG3_FLAG_EEPROM_WRITE_PROT; 10072 tp->tg3_flags |= TG3_FLAG_EEPROM_WRITE_PROT;
10069 else 10073 if ((tp->pdev->subsystem_vendor ==
10074 PCI_VENDOR_ID_ARIMA) &&
10075 (tp->pdev->subsystem_device == 0x205a ||
10076 tp->pdev->subsystem_device == 0x2063))
10077 tp->tg3_flags &= ~TG3_FLAG_EEPROM_WRITE_PROT;
10078 } else {
10070 tp->tg3_flags &= ~TG3_FLAG_EEPROM_WRITE_PROT; 10079 tp->tg3_flags &= ~TG3_FLAG_EEPROM_WRITE_PROT;
10080 tp->tg3_flags2 |= TG3_FLG2_IS_NIC;
10081 }
10071 10082
10072 if (nic_cfg & NIC_SRAM_DATA_CFG_ASF_ENABLE) { 10083 if (nic_cfg & NIC_SRAM_DATA_CFG_ASF_ENABLE) {
10073 tp->tg3_flags |= TG3_FLAG_ENABLE_ASF; 10084 tp->tg3_flags |= TG3_FLAG_ENABLE_ASF;
@@ -10693,7 +10704,7 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
10693 tp->tg3_flags |= TG3_FLAG_SRAM_USE_CONFIG; 10704 tp->tg3_flags |= TG3_FLAG_SRAM_USE_CONFIG;
10694 10705
10695 /* Get eeprom hw config before calling tg3_set_power_state(). 10706 /* Get eeprom hw config before calling tg3_set_power_state().
10696 * In particular, the TG3_FLAG_EEPROM_WRITE_PROT flag must be 10707 * In particular, the TG3_FLG2_IS_NIC flag must be
10697 * determined before calling tg3_set_power_state() so that 10708 * determined before calling tg3_set_power_state() so that
10698 * we know whether or not to switch out of Vaux power. 10709 * we know whether or not to switch out of Vaux power.
10699 * When the flag is set, it means that GPIO1 is used for eeprom 10710 * When the flag is set, it means that GPIO1 is used for eeprom