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authorMichael Chan <mchan@broadcom.com>2005-06-08 17:13:14 -0400
committerDavid S. Miller <davem@davemloft.net>2005-06-08 17:13:14 -0400
commit6d1cfbab4de64f2d0c5b0f81177ade0d75b69288 (patch)
tree9076b18ac9d821bedba5b3499a7f34515ef44e57 /drivers/net/tg3.c
parent35d1bc90546d1f0af198886ae8062a550142d926 (diff)
[TG3]: Fix 5700/5701 DMA corruption on Apple G4.
Fix 5700/5701 DMA write corruption on Apple G4 by detecting the Apple UniNorth PCI 1.5 chipset and adjusting the DMA write boundary to 16. DMA test fails to detect the problem with this chipset. Thanks to Manuel Perez Ayala for reporting the problem and helping to debug it. Signed-off-by: Michael Chan <mchan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/tg3.c')
-rw-r--r--drivers/net/tg3.c18
1 files changed, 16 insertions, 2 deletions
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c
index e944aac258e3..77337c3b4285 100644
--- a/drivers/net/tg3.c
+++ b/drivers/net/tg3.c
@@ -9695,10 +9695,24 @@ static int __devinit tg3_test_dma(struct tg3 *tp)
9695 } 9695 }
9696 if ((tp->dma_rwctrl & DMA_RWCTRL_WRITE_BNDRY_MASK) != 9696 if ((tp->dma_rwctrl & DMA_RWCTRL_WRITE_BNDRY_MASK) !=
9697 DMA_RWCTRL_WRITE_BNDRY_16) { 9697 DMA_RWCTRL_WRITE_BNDRY_16) {
9698 static struct pci_device_id dma_wait_state_chipsets[] = {
9699 { PCI_DEVICE(PCI_VENDOR_ID_APPLE,
9700 PCI_DEVICE_ID_APPLE_UNI_N_PCI15) },
9701 { },
9702 };
9703
9698 /* DMA test passed without adjusting DMA boundary, 9704 /* DMA test passed without adjusting DMA boundary,
9699 * just restore the calculated DMA boundary 9705 * now look for chipsets that are known to expose the
9706 * DMA bug without failing the test.
9700 */ 9707 */
9701 tp->dma_rwctrl = saved_dma_rwctrl; 9708 if (pci_dev_present(dma_wait_state_chipsets)) {
9709 tp->dma_rwctrl &= ~DMA_RWCTRL_WRITE_BNDRY_MASK;
9710 tp->dma_rwctrl |= DMA_RWCTRL_WRITE_BNDRY_16;
9711 }
9712 else
9713 /* Safe to use the calculated DMA boundary. */
9714 tp->dma_rwctrl = saved_dma_rwctrl;
9715
9702 tw32(TG3PCI_DMA_RW_CTRL, tp->dma_rwctrl); 9716 tw32(TG3PCI_DMA_RW_CTRL, tp->dma_rwctrl);
9703 } 9717 }
9704 9718