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authorMatt Carlson <mcarlson@broadcom.com>2008-11-03 19:53:46 -0500
committerDavid S. Miller <davem@davemloft.net>2008-11-03 19:53:46 -0500
commit05ac4cb7dff4515447dce6e9a56c4de6b7e426d5 (patch)
tree51445add708f53d22ed919b0b7b5d6f98b102b7c /drivers/net/tg3.c
parentdf59c9403557397aafbe291533d113b752da7661 (diff)
tg3: Refine power management and WOL code
Commit 12dac0756d357325b107fe6ec24921ec38661839 ("tg3: adapt tg3 to use reworked PCI PM code") introduced the new PCI PM API to the tg3 driver. The patch was understandably conservative, so this patch elaborates on that work. The patch starts by creating a single point in tg3_set_power_state() to decide whether or not to enable WOL. The rest of the code in tg3_set_power_state() was then pivoted to use the result of this decision. The patch then makes sure the device is allowed to wakeup before reporting whether or not WOL is currently enabled. The final hunks of the patch consolidate where the WOL capability and WOL enabled flags are set to a single location. Signed-off-by: Matt Carlson <mcarlson@broadcom.com> Signed-off-by: Michael Chan <mchan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/tg3.c')
-rw-r--r--drivers/net/tg3.c40
1 files changed, 23 insertions, 17 deletions
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c
index aebc645a3b51..e64721b185d1 100644
--- a/drivers/net/tg3.c
+++ b/drivers/net/tg3.c
@@ -2052,6 +2052,7 @@ static void __tg3_set_mac_addr(struct tg3 *tp, int skip_mac_1)
2052static int tg3_set_power_state(struct tg3 *tp, pci_power_t state) 2052static int tg3_set_power_state(struct tg3 *tp, pci_power_t state)
2053{ 2053{
2054 u32 misc_host_ctrl; 2054 u32 misc_host_ctrl;
2055 bool device_should_wake;
2055 2056
2056 /* Make sure register accesses (indirect or otherwise) 2057 /* Make sure register accesses (indirect or otherwise)
2057 * will function correctly. 2058 * will function correctly.
@@ -2085,6 +2086,10 @@ static int tg3_set_power_state(struct tg3 *tp, pci_power_t state)
2085 tw32(TG3PCI_MISC_HOST_CTRL, 2086 tw32(TG3PCI_MISC_HOST_CTRL,
2086 misc_host_ctrl | MISC_HOST_CTRL_MASK_PCI_INT); 2087 misc_host_ctrl | MISC_HOST_CTRL_MASK_PCI_INT);
2087 2088
2089 device_should_wake = pci_pme_capable(tp->pdev, state) &&
2090 device_may_wakeup(&tp->pdev->dev) &&
2091 (tp->tg3_flags & TG3_FLAG_WOL_ENABLE);
2092
2088 if (tp->tg3_flags3 & TG3_FLG3_USE_PHYLIB) { 2093 if (tp->tg3_flags3 & TG3_FLG3_USE_PHYLIB) {
2089 if ((tp->tg3_flags3 & TG3_FLG3_PHY_CONNECTED) && 2094 if ((tp->tg3_flags3 & TG3_FLG3_PHY_CONNECTED) &&
2090 !tp->link_config.phy_is_low_power) { 2095 !tp->link_config.phy_is_low_power) {
@@ -2106,7 +2111,7 @@ static int tg3_set_power_state(struct tg3 *tp, pci_power_t state)
2106 ADVERTISED_10baseT_Half; 2111 ADVERTISED_10baseT_Half;
2107 2112
2108 if ((tp->tg3_flags & TG3_FLAG_ENABLE_ASF) || 2113 if ((tp->tg3_flags & TG3_FLAG_ENABLE_ASF) ||
2109 (tp->tg3_flags & TG3_FLAG_WOL_ENABLE)) { 2114 device_should_wake) {
2110 if (tp->tg3_flags & TG3_FLAG_WOL_SPEED_100MB) 2115 if (tp->tg3_flags & TG3_FLAG_WOL_SPEED_100MB)
2111 advertising |= 2116 advertising |=
2112 ADVERTISED_100baseT_Half | 2117 ADVERTISED_100baseT_Half |
@@ -2160,7 +2165,7 @@ static int tg3_set_power_state(struct tg3 *tp, pci_power_t state)
2160 WOL_DRV_WOL | 2165 WOL_DRV_WOL |
2161 WOL_SET_MAGIC_PKT); 2166 WOL_SET_MAGIC_PKT);
2162 2167
2163 if (tp->tg3_flags & TG3_FLAG_WOL_ENABLE) { 2168 if (device_should_wake) {
2164 u32 mac_mode; 2169 u32 mac_mode;
2165 2170
2166 if (!(tp->tg3_flags2 & TG3_FLG2_PHY_SERDES)) { 2171 if (!(tp->tg3_flags2 & TG3_FLG2_PHY_SERDES)) {
@@ -2192,15 +2197,12 @@ static int tg3_set_power_state(struct tg3 *tp, pci_power_t state)
2192 if (!(tp->tg3_flags2 & TG3_FLG2_5750_PLUS)) 2197 if (!(tp->tg3_flags2 & TG3_FLG2_5750_PLUS))
2193 tw32(MAC_LED_CTRL, tp->led_ctrl); 2198 tw32(MAC_LED_CTRL, tp->led_ctrl);
2194 2199
2195 if (pci_pme_capable(tp->pdev, state) && 2200 mac_mode |= MAC_MODE_MAGIC_PKT_ENABLE;
2196 (tp->tg3_flags & TG3_FLAG_WOL_ENABLE)) { 2201 if (((tp->tg3_flags2 & TG3_FLG2_5705_PLUS) &&
2197 mac_mode |= MAC_MODE_MAGIC_PKT_ENABLE; 2202 !(tp->tg3_flags2 & TG3_FLG2_5780_CLASS)) &&
2198 if (((tp->tg3_flags2 & TG3_FLG2_5705_PLUS) && 2203 ((tp->tg3_flags & TG3_FLAG_ENABLE_ASF) ||
2199 !(tp->tg3_flags2 & TG3_FLG2_5780_CLASS)) && 2204 (tp->tg3_flags3 & TG3_FLG3_ENABLE_APE)))
2200 ((tp->tg3_flags & TG3_FLAG_ENABLE_ASF) || 2205 mac_mode |= MAC_MODE_KEEP_FRAME_IN_WOL;
2201 (tp->tg3_flags3 & TG3_FLG3_ENABLE_APE)))
2202 mac_mode |= MAC_MODE_KEEP_FRAME_IN_WOL;
2203 }
2204 2206
2205 if (tp->tg3_flags3 & TG3_FLG3_ENABLE_APE) { 2207 if (tp->tg3_flags3 & TG3_FLG3_ENABLE_APE) {
2206 mac_mode |= tp->mac_mode & 2208 mac_mode |= tp->mac_mode &
@@ -2272,7 +2274,7 @@ static int tg3_set_power_state(struct tg3 *tp, pci_power_t state)
2272 } 2274 }
2273 } 2275 }
2274 2276
2275 if (!(tp->tg3_flags & TG3_FLAG_WOL_ENABLE) && 2277 if (!(device_should_wake) &&
2276 !(tp->tg3_flags & TG3_FLAG_ENABLE_ASF) && 2278 !(tp->tg3_flags & TG3_FLAG_ENABLE_ASF) &&
2277 !(tp->tg3_flags3 & TG3_FLG3_ENABLE_APE)) 2279 !(tp->tg3_flags3 & TG3_FLG3_ENABLE_APE))
2278 tg3_power_down_phy(tp); 2280 tg3_power_down_phy(tp);
@@ -2298,7 +2300,7 @@ static int tg3_set_power_state(struct tg3 *tp, pci_power_t state)
2298 2300
2299 tg3_write_sig_post_reset(tp, RESET_KIND_SHUTDOWN); 2301 tg3_write_sig_post_reset(tp, RESET_KIND_SHUTDOWN);
2300 2302
2301 if (tp->tg3_flags & TG3_FLAG_WOL_ENABLE) 2303 if (device_should_wake)
2302 pci_enable_wake(tp->pdev, state, true); 2304 pci_enable_wake(tp->pdev, state, true);
2303 2305
2304 /* Finally, set the new power state. */ 2306 /* Finally, set the new power state. */
@@ -9082,7 +9084,8 @@ static void tg3_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
9082 else 9084 else
9083 wol->supported = 0; 9085 wol->supported = 0;
9084 wol->wolopts = 0; 9086 wol->wolopts = 0;
9085 if (tp->tg3_flags & TG3_FLAG_WOL_ENABLE) 9087 if ((tp->tg3_flags & TG3_FLAG_WOL_ENABLE) &&
9088 device_can_wakeup(&tp->pdev->dev))
9086 wol->wolopts = WAKE_MAGIC; 9089 wol->wolopts = WAKE_MAGIC;
9087 memset(&wol->sopass, 0, sizeof(wol->sopass)); 9090 memset(&wol->sopass, 0, sizeof(wol->sopass));
9088} 9091}
@@ -11315,7 +11318,7 @@ static void __devinit tg3_get_eeprom_hw_cfg(struct tg3 *tp)
11315 (val & VCPU_CFGSHDW_WOL_MAGPKT) && 11318 (val & VCPU_CFGSHDW_WOL_MAGPKT) &&
11316 device_may_wakeup(&tp->pdev->dev)) 11319 device_may_wakeup(&tp->pdev->dev))
11317 tp->tg3_flags |= TG3_FLAG_WOL_ENABLE; 11320 tp->tg3_flags |= TG3_FLAG_WOL_ENABLE;
11318 return; 11321 goto done;
11319 } 11322 }
11320 11323
11321 tg3_read_mem(tp, NIC_SRAM_DATA_SIG, &val); 11324 tg3_read_mem(tp, NIC_SRAM_DATA_SIG, &val);
@@ -11447,8 +11450,7 @@ static void __devinit tg3_get_eeprom_hw_cfg(struct tg3 *tp)
11447 tp->tg3_flags &= ~TG3_FLAG_WOL_CAP; 11450 tp->tg3_flags &= ~TG3_FLAG_WOL_CAP;
11448 11451
11449 if ((tp->tg3_flags & TG3_FLAG_WOL_CAP) && 11452 if ((tp->tg3_flags & TG3_FLAG_WOL_CAP) &&
11450 (nic_cfg & NIC_SRAM_DATA_CFG_WOL_ENABLE) && 11453 (nic_cfg & NIC_SRAM_DATA_CFG_WOL_ENABLE))
11451 device_may_wakeup(&tp->pdev->dev))
11452 tp->tg3_flags |= TG3_FLAG_WOL_ENABLE; 11454 tp->tg3_flags |= TG3_FLAG_WOL_ENABLE;
11453 11455
11454 if (cfg2 & (1 << 17)) 11456 if (cfg2 & (1 << 17))
@@ -11474,6 +11476,10 @@ static void __devinit tg3_get_eeprom_hw_cfg(struct tg3 *tp)
11474 if (cfg4 & NIC_SRAM_RGMII_EXT_IBND_TX_EN) 11476 if (cfg4 & NIC_SRAM_RGMII_EXT_IBND_TX_EN)
11475 tp->tg3_flags3 |= TG3_FLG3_RGMII_EXT_IBND_TX_EN; 11477 tp->tg3_flags3 |= TG3_FLG3_RGMII_EXT_IBND_TX_EN;
11476 } 11478 }
11479done:
11480 device_init_wakeup(&tp->pdev->dev, tp->tg3_flags & TG3_FLAG_WOL_CAP);
11481 device_set_wakeup_enable(&tp->pdev->dev,
11482 tp->tg3_flags & TG3_FLAG_WOL_ENABLE);
11477} 11483}
11478 11484
11479static int __devinit tg3_issue_otp_command(struct tg3 *tp, u32 cmd) 11485static int __devinit tg3_issue_otp_command(struct tg3 *tp, u32 cmd)