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authorMichael Chan <mchan@broadcom.com>2006-11-03 04:01:03 -0500
committerDavid S. Miller <davem@sunset.davemloft.net>2006-11-05 17:11:30 -0500
commit36da4d869f23bc7d1a70a3185218cb626537845c (patch)
tree87ca921f64c2e10d24adbd5fb75cd40b651d1f9c /drivers/net/tg3.c
parentfebf0a431e42f5a1fdb2b763273700610552ddcc (diff)
[TG3]: Fix 2nd ifup failure on 5752M.
This fixes a bug reported in: http://bugzilla.kernel.org/show_bug.cgi?id=7438 tg3_close() turns off the PHY if WoL and ASF are both disabled. On the next tg3_open(), some devices such as the 5752M will not be brought up correctly without a PHY reset early in the reset sequence. The PHY clock is needed for some internal MAC blocks to function correctly. This problem is fixed by always resetting the PHY early in tg3_reset_hw() when it is called from tg3_open() or tg3_resume(). tg3_setup_phy() can then be called later in the sequence without the reset_phy parameter set to 1, since the PHY reset is already done. Update version to 3.68. Signed-off-by: Michael Chan <mchan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/tg3.c')
-rw-r--r--drivers/net/tg3.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c
index 8e398499c045..8f059b7968bd 100644
--- a/drivers/net/tg3.c
+++ b/drivers/net/tg3.c
@@ -68,8 +68,8 @@
68 68
69#define DRV_MODULE_NAME "tg3" 69#define DRV_MODULE_NAME "tg3"
70#define PFX DRV_MODULE_NAME ": " 70#define PFX DRV_MODULE_NAME ": "
71#define DRV_MODULE_VERSION "3.67" 71#define DRV_MODULE_VERSION "3.68"
72#define DRV_MODULE_RELDATE "October 18, 2006" 72#define DRV_MODULE_RELDATE "November 02, 2006"
73 73
74#define TG3_DEF_MAC_MODE 0 74#define TG3_DEF_MAC_MODE 0
75#define TG3_DEF_RX_MODE 0 75#define TG3_DEF_RX_MODE 0
@@ -6014,7 +6014,7 @@ static int tg3_reset_hw(struct tg3 *tp, int reset_phy)
6014 tg3_abort_hw(tp, 1); 6014 tg3_abort_hw(tp, 1);
6015 } 6015 }
6016 6016
6017 if ((tp->tg3_flags2 & TG3_FLG2_MII_SERDES) && reset_phy) 6017 if (reset_phy)
6018 tg3_phy_reset(tp); 6018 tg3_phy_reset(tp);
6019 6019
6020 err = tg3_chip_reset(tp); 6020 err = tg3_chip_reset(tp);
@@ -6574,7 +6574,7 @@ static int tg3_reset_hw(struct tg3 *tp, int reset_phy)
6574 tw32(GRC_LOCAL_CTRL, tp->grc_local_ctrl); 6574 tw32(GRC_LOCAL_CTRL, tp->grc_local_ctrl);
6575 } 6575 }
6576 6576
6577 err = tg3_setup_phy(tp, reset_phy); 6577 err = tg3_setup_phy(tp, 0);
6578 if (err) 6578 if (err)
6579 return err; 6579 return err;
6580 6580