tg3: Tune 5785 clock switching

This patch tunes the timeouts the CPMU uses to decide when to switch
from the clocks output by the PHY to internal clock sources.

Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
Reviewed-by: Michael Chan <mchan@broadcom.com>
Reviewed-by: Benjamin Li <benli@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

1 files changed, 10 insertions, 5 deletions

diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c
index 9ae332083585..41e0d40259e3 100644
--- a/drivers/net/tg3.c
+++ b/drivers/net/tg3.c
@@ -917,7 +917,9 @@ static void tg3_mdio_config_5785(struct tg3 *tp)
                 tw32(MAC_PHYCFG2, val);
 
                 val = tr32(MAC_PHYCFG1);
-                val &= ~MAC_PHYCFG1_RGMII_INT;
+                val &= ~(MAC_PHYCFG1_RGMII_INT |
+                         MAC_PHYCFG1_RXCLK_TO_MASK | MAC_PHYCFG1_TXCLK_TO_MASK);
+                val |= MAC_PHYCFG1_RXCLK_TIMEOUT | MAC_PHYCFG1_TXCLK_TIMEOUT;
                 tw32(MAC_PHYCFG1, val);
 
                 return;
@@ -933,15 +935,18 @@ static void tg3_mdio_config_5785(struct tg3 *tp)
 
         tw32(MAC_PHYCFG2, val);
 
-        val = tr32(MAC_PHYCFG1) & ~(MAC_PHYCFG1_RGMII_EXT_RX_DEC |
-                                    MAC_PHYCFG1_RGMII_SND_STAT_EN);
-        if (tp->tg3_flags3 & TG3_FLG3_RGMII_STD_IBND_DISABLE) {
+        val = tr32(MAC_PHYCFG1);
+        val &= ~(MAC_PHYCFG1_RXCLK_TO_MASK | MAC_PHYCFG1_TXCLK_TO_MASK |
+                 MAC_PHYCFG1_RGMII_EXT_RX_DEC | MAC_PHYCFG1_RGMII_SND_STAT_EN);
+        if (!(tp->tg3_flags3 & TG3_FLG3_RGMII_STD_IBND_DISABLE)) {
                 if (tp->tg3_flags3 & TG3_FLG3_RGMII_EXT_IBND_RX_EN)
                         val |= MAC_PHYCFG1_RGMII_EXT_RX_DEC;
                 if (tp->tg3_flags3 & TG3_FLG3_RGMII_EXT_IBND_TX_EN)
                         val |= MAC_PHYCFG1_RGMII_SND_STAT_EN;
         }
-        tw32(MAC_PHYCFG1, val | MAC_PHYCFG1_RGMII_INT | MAC_PHYCFG1_TXC_DRV);
+        val |= MAC_PHYCFG1_RXCLK_TIMEOUT | MAC_PHYCFG1_TXCLK_TIMEOUT |
+               MAC_PHYCFG1_RGMII_INT | MAC_PHYCFG1_TXC_DRV;
+        tw32(MAC_PHYCFG1, val);
 
         val = tr32(MAC_EXT_RGMII_MODE);
         val &= ~(MAC_RGMII_MODE_RX_INT_B |