diff options
author | Steve Glendinning <steve.glendinning@smsc.com> | 2008-12-16 05:00:48 -0500 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2008-12-16 05:00:48 -0500 |
commit | bc02ff95fe4ebd3e5ee7455c0aa6f76ebe39ebca (patch) | |
tree | 675887b8007a53464e84b9da2f7b54a77fab035a /drivers/net/tg3.c | |
parent | e18ce3465477502108187c6c08b6423fb784a313 (diff) |
net: Refactor full duplex flow control resolution
These 4 drivers have identical full duplex flow control resolution
functions. This patch changes them all to use one common function.
The function in question decides whether a device should enable TX and
RX flow control in a standard way (IEEE 802.3-2005 table 28B-3), so this
should also be useful for other drivers.
Signed-off-by: Steve Glendinning <steve.glendinning@smsc.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/tg3.c')
-rw-r--r-- | drivers/net/tg3.c | 24 |
1 files changed, 1 insertions, 23 deletions
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c index f353f69caeb8..06bd2f4eee6c 100644 --- a/drivers/net/tg3.c +++ b/drivers/net/tg3.c | |||
@@ -1227,28 +1227,6 @@ static u16 tg3_advert_flowctrl_1000X(u8 flow_ctrl) | |||
1227 | return miireg; | 1227 | return miireg; |
1228 | } | 1228 | } |
1229 | 1229 | ||
1230 | static u8 tg3_resolve_flowctrl_1000T(u16 lcladv, u16 rmtadv) | ||
1231 | { | ||
1232 | u8 cap = 0; | ||
1233 | |||
1234 | if (lcladv & ADVERTISE_PAUSE_CAP) { | ||
1235 | if (lcladv & ADVERTISE_PAUSE_ASYM) { | ||
1236 | if (rmtadv & LPA_PAUSE_CAP) | ||
1237 | cap = TG3_FLOW_CTRL_TX | TG3_FLOW_CTRL_RX; | ||
1238 | else if (rmtadv & LPA_PAUSE_ASYM) | ||
1239 | cap = TG3_FLOW_CTRL_RX; | ||
1240 | } else { | ||
1241 | if (rmtadv & LPA_PAUSE_CAP) | ||
1242 | cap = TG3_FLOW_CTRL_TX | TG3_FLOW_CTRL_RX; | ||
1243 | } | ||
1244 | } else if (lcladv & ADVERTISE_PAUSE_ASYM) { | ||
1245 | if ((rmtadv & LPA_PAUSE_CAP) && (rmtadv & LPA_PAUSE_ASYM)) | ||
1246 | cap = TG3_FLOW_CTRL_TX; | ||
1247 | } | ||
1248 | |||
1249 | return cap; | ||
1250 | } | ||
1251 | |||
1252 | static u8 tg3_resolve_flowctrl_1000X(u16 lcladv, u16 rmtadv) | 1230 | static u8 tg3_resolve_flowctrl_1000X(u16 lcladv, u16 rmtadv) |
1253 | { | 1231 | { |
1254 | u8 cap = 0; | 1232 | u8 cap = 0; |
@@ -1288,7 +1266,7 @@ static void tg3_setup_flow_control(struct tg3 *tp, u32 lcladv, u32 rmtadv) | |||
1288 | if (tp->tg3_flags2 & TG3_FLG2_ANY_SERDES) | 1266 | if (tp->tg3_flags2 & TG3_FLG2_ANY_SERDES) |
1289 | flowctrl = tg3_resolve_flowctrl_1000X(lcladv, rmtadv); | 1267 | flowctrl = tg3_resolve_flowctrl_1000X(lcladv, rmtadv); |
1290 | else | 1268 | else |
1291 | flowctrl = tg3_resolve_flowctrl_1000T(lcladv, rmtadv); | 1269 | flowctrl = mii_resolve_flowctrl_fdx(lcladv, rmtadv); |
1292 | } else | 1270 | } else |
1293 | flowctrl = tp->link_config.flowctrl; | 1271 | flowctrl = tp->link_config.flowctrl; |
1294 | 1272 | ||