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authorMatt Carlson <mcarlson@broadcom.com>2009-12-03 03:36:21 -0500
committerDavid S. Miller <davem@davemloft.net>2009-12-03 16:18:03 -0500
commitb703df6f628ab63eaa875232551b1f2f0503b9af (patch)
treecbeb9291af92306fc8b36a9fcac5d2d9b9d4c3df /drivers/net/tg3.c
parent19cfaecc094781da273b5cd1411ee46589898d0e (diff)
tg3: Add 57765 asic rev
This patch adds the 57765 asic revision. Signed-off-by: Matt Carlson <mcarlson@broadcom.com> Signed-off-by: Michael Chan <mchan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/tg3.c')
-rw-r--r--drivers/net/tg3.c72
1 files changed, 53 insertions, 19 deletions
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c
index 8b21f1ddf543..36f2e1b8cbb1 100644
--- a/drivers/net/tg3.c
+++ b/drivers/net/tg3.c
@@ -5514,7 +5514,7 @@ static netdev_tx_t tg3_start_xmit(struct sk_buff *skb,
5514 tnapi->tx_buffers[entry].skb = skb; 5514 tnapi->tx_buffers[entry].skb = skb;
5515 pci_unmap_addr_set(&tnapi->tx_buffers[entry], mapping, mapping); 5515 pci_unmap_addr_set(&tnapi->tx_buffers[entry], mapping, mapping);
5516 5516
5517 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 && 5517 if ((tp->tg3_flags3 & TG3_FLG3_USE_JUMBO_BDFLAG) &&
5518 !mss && skb->len > ETH_DATA_LEN) 5518 !mss && skb->len > ETH_DATA_LEN)
5519 base_flags |= TXD_FLAG_JMB_PKT; 5519 base_flags |= TXD_FLAG_JMB_PKT;
5520 5520
@@ -5726,7 +5726,7 @@ static netdev_tx_t tg3_start_xmit_dma_bug(struct sk_buff *skb,
5726 (vlan_tx_tag_get(skb) << 16)); 5726 (vlan_tx_tag_get(skb) << 16));
5727#endif 5727#endif
5728 5728
5729 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 && 5729 if ((tp->tg3_flags3 & TG3_FLG3_USE_JUMBO_BDFLAG) &&
5730 !mss && skb->len > ETH_DATA_LEN) 5730 !mss && skb->len > ETH_DATA_LEN)
5731 base_flags |= TXD_FLAG_JMB_PKT; 5731 base_flags |= TXD_FLAG_JMB_PKT;
5732 5732
@@ -6971,7 +6971,8 @@ static int tg3_chip_reset(struct tg3 *tp)
6971 if ((tp->tg3_flags2 & TG3_FLG2_PCI_EXPRESS) && 6971 if ((tp->tg3_flags2 & TG3_FLG2_PCI_EXPRESS) &&
6972 tp->pci_chip_rev_id != CHIPREV_ID_5750_A0 && 6972 tp->pci_chip_rev_id != CHIPREV_ID_5750_A0 &&
6973 GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5785 && 6973 GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5785 &&
6974 GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5717) { 6974 GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5717 &&
6975 GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_57765) {
6975 val = tr32(0x7c00); 6976 val = tr32(0x7c00);
6976 6977
6977 tw32(0x7c00, val | (1 << 25)); 6978 tw32(0x7c00, val | (1 << 25));
@@ -7398,6 +7399,8 @@ static void tg3_rings_reset(struct tg3 *tp)
7398 /* Disable all transmit rings but the first. */ 7399 /* Disable all transmit rings but the first. */
7399 if (!(tp->tg3_flags2 & TG3_FLG2_5705_PLUS)) 7400 if (!(tp->tg3_flags2 & TG3_FLG2_5705_PLUS))
7400 limit = NIC_SRAM_SEND_RCB + TG3_BDINFO_SIZE * 16; 7401 limit = NIC_SRAM_SEND_RCB + TG3_BDINFO_SIZE * 16;
7402 else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765)
7403 limit = NIC_SRAM_SEND_RCB + TG3_BDINFO_SIZE * 2;
7401 else 7404 else
7402 limit = NIC_SRAM_SEND_RCB + TG3_BDINFO_SIZE; 7405 limit = NIC_SRAM_SEND_RCB + TG3_BDINFO_SIZE;
7403 7406
@@ -7412,7 +7415,8 @@ static void tg3_rings_reset(struct tg3 *tp)
7412 limit = NIC_SRAM_RCV_RET_RCB + TG3_BDINFO_SIZE * 17; 7415 limit = NIC_SRAM_RCV_RET_RCB + TG3_BDINFO_SIZE * 17;
7413 else if (!(tp->tg3_flags2 & TG3_FLG2_5705_PLUS)) 7416 else if (!(tp->tg3_flags2 & TG3_FLG2_5705_PLUS))
7414 limit = NIC_SRAM_RCV_RET_RCB + TG3_BDINFO_SIZE * 16; 7417 limit = NIC_SRAM_RCV_RET_RCB + TG3_BDINFO_SIZE * 16;
7415 else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5755) 7418 else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5755 ||
7419 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765)
7416 limit = NIC_SRAM_RCV_RET_RCB + TG3_BDINFO_SIZE * 4; 7420 limit = NIC_SRAM_RCV_RET_RCB + TG3_BDINFO_SIZE * 4;
7417 else 7421 else
7418 limit = NIC_SRAM_RCV_RET_RCB + TG3_BDINFO_SIZE; 7422 limit = NIC_SRAM_RCV_RET_RCB + TG3_BDINFO_SIZE;
@@ -7609,7 +7613,8 @@ static int tg3_reset_hw(struct tg3 *tp, int reset_phy)
7609 if (err) 7613 if (err)
7610 return err; 7614 return err;
7611 7615
7612 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717) { 7616 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 ||
7617 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765) {
7613 val = tr32(TG3PCI_DMA_RW_CTRL) & 7618 val = tr32(TG3PCI_DMA_RW_CTRL) &
7614 ~DMA_RWCTRL_DIS_CACHE_ALIGNMENT; 7619 ~DMA_RWCTRL_DIS_CACHE_ALIGNMENT;
7615 tw32(TG3PCI_DMA_RW_CTRL, val | tp->dma_rwctrl); 7620 tw32(TG3PCI_DMA_RW_CTRL, val | tp->dma_rwctrl);
@@ -7770,7 +7775,8 @@ static int tg3_reset_hw(struct tg3 *tp, int reset_phy)
7770 BDINFO_FLAGS_DISABLED); 7775 BDINFO_FLAGS_DISABLED);
7771 } 7776 }
7772 7777
7773 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717) 7778 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 ||
7779 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765)
7774 val = (RX_STD_MAX_SIZE_5705 << BDINFO_FLAGS_MAXLEN_SHIFT) | 7780 val = (RX_STD_MAX_SIZE_5705 << BDINFO_FLAGS_MAXLEN_SHIFT) |
7775 (RX_STD_MAX_SIZE << 2); 7781 (RX_STD_MAX_SIZE << 2);
7776 else 7782 else
@@ -7787,7 +7793,8 @@ static int tg3_reset_hw(struct tg3 *tp, int reset_phy)
7787 tp->rx_jumbo_pending : 0; 7793 tp->rx_jumbo_pending : 0;
7788 tw32_rx_mbox(TG3_RX_JMB_PROD_IDX_REG, tpr->rx_jmb_prod_idx); 7794 tw32_rx_mbox(TG3_RX_JMB_PROD_IDX_REG, tpr->rx_jmb_prod_idx);
7789 7795
7790 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717) { 7796 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 ||
7797 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765) {
7791 tw32(STD_REPLENISH_LWM, 32); 7798 tw32(STD_REPLENISH_LWM, 32);
7792 tw32(JMB_REPLENISH_LWM, 16); 7799 tw32(JMB_REPLENISH_LWM, 16);
7793 } 7800 }
@@ -8464,7 +8471,8 @@ static int tg3_test_interrupt(struct tg3 *tp)
8464 * Turn off MSI one shot mode. Otherwise this test has no 8471 * Turn off MSI one shot mode. Otherwise this test has no
8465 * observable way to know whether the interrupt was delivered. 8472 * observable way to know whether the interrupt was delivered.
8466 */ 8473 */
8467 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 && 8474 if ((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 ||
8475 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765) &&
8468 (tp->tg3_flags2 & TG3_FLG2_USING_MSI)) { 8476 (tp->tg3_flags2 & TG3_FLG2_USING_MSI)) {
8469 val = tr32(MSGINT_MODE) | MSGINT_MODE_ONE_SHOT_DISABLE; 8477 val = tr32(MSGINT_MODE) | MSGINT_MODE_ONE_SHOT_DISABLE;
8470 tw32(MSGINT_MODE, val); 8478 tw32(MSGINT_MODE, val);
@@ -8507,7 +8515,8 @@ static int tg3_test_interrupt(struct tg3 *tp)
8507 8515
8508 if (intr_ok) { 8516 if (intr_ok) {
8509 /* Reenable MSI one shot mode. */ 8517 /* Reenable MSI one shot mode. */
8510 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 && 8518 if ((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 ||
8519 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765) &&
8511 (tp->tg3_flags2 & TG3_FLG2_USING_MSI)) { 8520 (tp->tg3_flags2 & TG3_FLG2_USING_MSI)) {
8512 val = tr32(MSGINT_MODE) & ~MSGINT_MODE_ONE_SHOT_DISABLE; 8521 val = tr32(MSGINT_MODE) & ~MSGINT_MODE_ONE_SHOT_DISABLE;
8513 tw32(MSGINT_MODE, val); 8522 tw32(MSGINT_MODE, val);
@@ -8803,6 +8812,7 @@ static int tg3_open(struct net_device *dev)
8803 } 8812 }
8804 8813
8805 if (GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5717 && 8814 if (GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5717 &&
8815 GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_57765 &&
8806 (tp->tg3_flags2 & TG3_FLG2_USING_MSI) && 8816 (tp->tg3_flags2 & TG3_FLG2_USING_MSI) &&
8807 (tp->tg3_flags2 & TG3_FLG2_1SHOT_MSI)) { 8817 (tp->tg3_flags2 & TG3_FLG2_1SHOT_MSI)) {
8808 u32 val = tr32(PCIE_TRANSACTION_CFG); 8818 u32 val = tr32(PCIE_TRANSACTION_CFG);
@@ -11697,7 +11707,8 @@ static void __devinit tg3_nvram_init(struct tg3 *tp)
11697 tg3_get_5761_nvram_info(tp); 11707 tg3_get_5761_nvram_info(tp);
11698 else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5906) 11708 else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5906)
11699 tg3_get_5906_nvram_info(tp); 11709 tg3_get_5906_nvram_info(tp);
11700 else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57780) 11710 else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57780 ||
11711 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765)
11701 tg3_get_57780_nvram_info(tp); 11712 tg3_get_57780_nvram_info(tp);
11702 else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717) 11713 else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717)
11703 tg3_get_5717_nvram_info(tp); 11714 tg3_get_5717_nvram_info(tp);
@@ -12531,6 +12542,8 @@ out_not_found:
12531 else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57780 && 12542 else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57780 &&
12532 tp->pdev->device == TG3PCI_DEVICE_TIGON3_57788) 12543 tp->pdev->device == TG3PCI_DEVICE_TIGON3_57788)
12533 strcpy(tp->board_part_number, "BCM57788"); 12544 strcpy(tp->board_part_number, "BCM57788");
12545 else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765)
12546 strcpy(tp->board_part_number, "BCM57765");
12534 else 12547 else
12535 strcpy(tp->board_part_number, "none"); 12548 strcpy(tp->board_part_number, "none");
12536} 12549}
@@ -12820,6 +12833,15 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
12820 pci_read_config_dword(tp->pdev, 12833 pci_read_config_dword(tp->pdev,
12821 TG3PCI_GEN2_PRODID_ASICREV, 12834 TG3PCI_GEN2_PRODID_ASICREV,
12822 &prod_id_asic_rev); 12835 &prod_id_asic_rev);
12836 else if (tp->pdev->device == TG3PCI_DEVICE_TIGON3_57781 ||
12837 tp->pdev->device == TG3PCI_DEVICE_TIGON3_57785 ||
12838 tp->pdev->device == TG3PCI_DEVICE_TIGON3_57761 ||
12839 tp->pdev->device == TG3PCI_DEVICE_TIGON3_57765 ||
12840 tp->pdev->device == TG3PCI_DEVICE_TIGON3_57791 ||
12841 tp->pdev->device == TG3PCI_DEVICE_TIGON3_57795)
12842 pci_read_config_dword(tp->pdev,
12843 TG3PCI_GEN15_PRODID_ASICREV,
12844 &prod_id_asic_rev);
12823 else 12845 else
12824 pci_read_config_dword(tp->pdev, TG3PCI_PRODID_ASICREV, 12846 pci_read_config_dword(tp->pdev, TG3PCI_PRODID_ASICREV,
12825 &prod_id_asic_rev); 12847 &prod_id_asic_rev);
@@ -12973,7 +12995,8 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
12973 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5761 || 12995 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5761 ||
12974 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5785 || 12996 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5785 ||
12975 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57780 || 12997 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57780 ||
12976 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717) 12998 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 ||
12999 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765)
12977 tp->tg3_flags3 |= TG3_FLG3_5755_PLUS; 13000 tp->tg3_flags3 |= TG3_FLG3_5755_PLUS;
12978 13001
12979 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5750 || 13002 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5750 ||
@@ -13000,7 +13023,8 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
13000 } 13023 }
13001 13024
13002 /* Determine TSO capabilities */ 13025 /* Determine TSO capabilities */
13003 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717) 13026 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 ||
13027 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765)
13004 tp->tg3_flags2 |= TG3_FLG2_HW_TSO_3; 13028 tp->tg3_flags2 |= TG3_FLG2_HW_TSO_3;
13005 else if ((tp->tg3_flags3 & TG3_FLG3_5755_PLUS) || 13029 else if ((tp->tg3_flags3 & TG3_FLG3_5755_PLUS) ||
13006 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5906) 13030 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5906)
@@ -13036,7 +13060,8 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
13036 tp->tg3_flags2 |= TG3_FLG2_1SHOT_MSI; 13060 tp->tg3_flags2 |= TG3_FLG2_1SHOT_MSI;
13037 } 13061 }
13038 13062
13039 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717) { 13063 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 ||
13064 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765) {
13040 tp->tg3_flags |= TG3_FLAG_SUPPORT_MSIX; 13065 tp->tg3_flags |= TG3_FLAG_SUPPORT_MSIX;
13041 tp->irq_max = TG3_IRQ_MAX_VECS; 13066 tp->irq_max = TG3_IRQ_MAX_VECS;
13042 } 13067 }
@@ -13050,9 +13075,13 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
13050 tp->tg3_flags3 |= TG3_FLG3_40BIT_DMA_LIMIT_BUG; 13075 tp->tg3_flags3 |= TG3_FLG3_40BIT_DMA_LIMIT_BUG;
13051 } 13076 }
13052 13077
13078 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 ||
13079 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765)
13080 tp->tg3_flags3 |= TG3_FLG3_USE_JUMBO_BDFLAG;
13081
13053 if (!(tp->tg3_flags2 & TG3_FLG2_5705_PLUS) || 13082 if (!(tp->tg3_flags2 & TG3_FLG2_5705_PLUS) ||
13054 (tp->tg3_flags2 & TG3_FLG2_5780_CLASS) || 13083 (tp->tg3_flags2 & TG3_FLG2_5780_CLASS) ||
13055 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717) 13084 (tp->tg3_flags3 & TG3_FLG3_USE_JUMBO_BDFLAG))
13056 tp->tg3_flags |= TG3_FLAG_JUMBO_CAPABLE; 13085 tp->tg3_flags |= TG3_FLAG_JUMBO_CAPABLE;
13057 13086
13058 pci_read_config_dword(tp->pdev, TG3PCI_PCISTATE, 13087 pci_read_config_dword(tp->pdev, TG3PCI_PCISTATE,
@@ -13245,7 +13274,8 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
13245 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5761 || 13274 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5761 ||
13246 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5785 || 13275 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5785 ||
13247 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57780 || 13276 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57780 ||
13248 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717) 13277 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 ||
13278 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765)
13249 tp->tg3_flags |= TG3_FLAG_CPMU_PRESENT; 13279 tp->tg3_flags |= TG3_FLAG_CPMU_PRESENT;
13250 13280
13251 /* Set up tp->grc_local_ctrl before calling tg3_set_power_state(). 13281 /* Set up tp->grc_local_ctrl before calling tg3_set_power_state().
@@ -13324,7 +13354,8 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
13324 !(tp->tg3_flags3 & TG3_FLG3_PHY_IS_FET) && 13354 !(tp->tg3_flags3 & TG3_FLG3_PHY_IS_FET) &&
13325 GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5785 && 13355 GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5785 &&
13326 GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_57780 && 13356 GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_57780 &&
13327 GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5717) { 13357 GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5717 &&
13358 GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_57765) {
13328 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5755 || 13359 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5755 ||
13329 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5787 || 13360 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5787 ||
13330 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5784 || 13361 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5784 ||
@@ -13648,7 +13679,8 @@ static u32 __devinit tg3_calc_dma_bndry(struct tg3 *tp, u32 val)
13648#endif 13679#endif
13649#endif 13680#endif
13650 13681
13651 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717) { 13682 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 ||
13683 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765) {
13652 val = goal ? 0 : DMA_RWCTRL_DIS_CACHE_ALIGNMENT; 13684 val = goal ? 0 : DMA_RWCTRL_DIS_CACHE_ALIGNMENT;
13653 goto out; 13685 goto out;
13654 } 13686 }
@@ -13860,7 +13892,8 @@ static int __devinit tg3_test_dma(struct tg3 *tp)
13860 13892
13861 tp->dma_rwctrl = tg3_calc_dma_bndry(tp, tp->dma_rwctrl); 13893 tp->dma_rwctrl = tg3_calc_dma_bndry(tp, tp->dma_rwctrl);
13862 13894
13863 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717) 13895 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 ||
13896 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765)
13864 goto out; 13897 goto out;
13865 13898
13866 if (tp->tg3_flags2 & TG3_FLG2_PCI_EXPRESS) { 13899 if (tp->tg3_flags2 & TG3_FLG2_PCI_EXPRESS) {
@@ -14053,7 +14086,8 @@ static void __devinit tg3_init_link_config(struct tg3 *tp)
14053static void __devinit tg3_init_bufmgr_config(struct tg3 *tp) 14086static void __devinit tg3_init_bufmgr_config(struct tg3 *tp)
14054{ 14087{
14055 if (tp->tg3_flags2 & TG3_FLG2_5705_PLUS && 14088 if (tp->tg3_flags2 & TG3_FLG2_5705_PLUS &&
14056 GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5717) { 14089 GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5717 &&
14090 GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_57765) {
14057 tp->bufmgr_config.mbuf_read_dma_low_water = 14091 tp->bufmgr_config.mbuf_read_dma_low_water =
14058 DEFAULT_MB_RDMA_LOW_WATER_5705; 14092 DEFAULT_MB_RDMA_LOW_WATER_5705;
14059 tp->bufmgr_config.mbuf_mac_rx_low_water = 14093 tp->bufmgr_config.mbuf_mac_rx_low_water =