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authorMatt Carlson <mcarlson@broadcom.com>2009-11-13 08:03:47 -0500
committerDavid S. Miller <davem@davemloft.net>2009-11-16 01:14:50 -0500
commit4361935afe3abc3e5a93006b99197fac1fabbd50 (patch)
tree88becadbc88f1f0800b224cd597a940caaccbdde /drivers/net/tg3.c
parent411da6407e778bf946911df08bb5afc505422f31 (diff)
tg3: Consider rx_std_prod_idx a hw mailbox
This patch changes how the code uses the rx_std_prod_idx member. In the following patch, the code will be changed so that it will act just like a hardware mailbox. This patch prepares the code so that memory barriers can be more easily inserted. Signed-off-by: Matt Carlson <mcarlson@broadcom.com> Reviewed-by: Michael Chan <mchan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/tg3.c')
-rw-r--r--drivers/net/tg3.c15
1 files changed, 9 insertions, 6 deletions
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c
index 59a715a25623..beda9bf0767b 100644
--- a/drivers/net/tg3.c
+++ b/drivers/net/tg3.c
@@ -4537,6 +4537,7 @@ static int tg3_rx(struct tg3_napi *tnapi, int budget)
4537{ 4537{
4538 struct tg3 *tp = tnapi->tp; 4538 struct tg3 *tp = tnapi->tp;
4539 u32 work_mask, rx_std_posted = 0; 4539 u32 work_mask, rx_std_posted = 0;
4540 u32 std_prod_idx, jmb_prod_idx;
4540 u32 sw_idx = tnapi->rx_rcb_ptr; 4541 u32 sw_idx = tnapi->rx_rcb_ptr;
4541 u16 hw_idx; 4542 u16 hw_idx;
4542 int received; 4543 int received;
@@ -4550,6 +4551,8 @@ static int tg3_rx(struct tg3_napi *tnapi, int budget)
4550 rmb(); 4551 rmb();
4551 work_mask = 0; 4552 work_mask = 0;
4552 received = 0; 4553 received = 0;
4554 std_prod_idx = tpr->rx_std_prod_idx;
4555 jmb_prod_idx = tpr->rx_jmb_prod_idx;
4553 while (sw_idx != hw_idx && budget > 0) { 4556 while (sw_idx != hw_idx && budget > 0) {
4554 struct ring_info *ri; 4557 struct ring_info *ri;
4555 struct tg3_rx_buffer_desc *desc = &tnapi->rx_rcb[sw_idx]; 4558 struct tg3_rx_buffer_desc *desc = &tnapi->rx_rcb[sw_idx];
@@ -4564,13 +4567,13 @@ static int tg3_rx(struct tg3_napi *tnapi, int budget)
4564 ri = &tpr->rx_std_buffers[desc_idx]; 4567 ri = &tpr->rx_std_buffers[desc_idx];
4565 dma_addr = pci_unmap_addr(ri, mapping); 4568 dma_addr = pci_unmap_addr(ri, mapping);
4566 skb = ri->skb; 4569 skb = ri->skb;
4567 post_ptr = &tpr->rx_std_prod_idx; 4570 post_ptr = &std_prod_idx;
4568 rx_std_posted++; 4571 rx_std_posted++;
4569 } else if (opaque_key == RXD_OPAQUE_RING_JUMBO) { 4572 } else if (opaque_key == RXD_OPAQUE_RING_JUMBO) {
4570 ri = &tpr->rx_jmb_buffers[desc_idx]; 4573 ri = &tpr->rx_jmb_buffers[desc_idx];
4571 dma_addr = pci_unmap_addr(ri, mapping); 4574 dma_addr = pci_unmap_addr(ri, mapping);
4572 skb = ri->skb; 4575 skb = ri->skb;
4573 post_ptr = &tpr->rx_jmb_prod_idx; 4576 post_ptr = &jmb_prod_idx;
4574 } else 4577 } else
4575 goto next_pkt_nopost; 4578 goto next_pkt_nopost;
4576 4579
@@ -4687,14 +4690,14 @@ next_pkt_nopost:
4687 4690
4688 /* Refill RX ring(s). */ 4691 /* Refill RX ring(s). */
4689 if (work_mask & RXD_OPAQUE_RING_STD) { 4692 if (work_mask & RXD_OPAQUE_RING_STD) {
4690 sw_idx = tpr->rx_std_prod_idx % TG3_RX_RING_SIZE; 4693 tpr->rx_std_prod_idx = std_prod_idx % TG3_RX_RING_SIZE;
4691 tw32_rx_mbox(MAILBOX_RCV_STD_PROD_IDX + TG3_64BIT_REG_LOW, 4694 tw32_rx_mbox(MAILBOX_RCV_STD_PROD_IDX + TG3_64BIT_REG_LOW,
4692 sw_idx); 4695 tpr->rx_std_prod_idx);
4693 } 4696 }
4694 if (work_mask & RXD_OPAQUE_RING_JUMBO) { 4697 if (work_mask & RXD_OPAQUE_RING_JUMBO) {
4695 sw_idx = tpr->rx_jmb_prod_idx % TG3_RX_JUMBO_RING_SIZE; 4698 tpr->rx_jmb_prod_idx = jmb_prod_idx % TG3_RX_JUMBO_RING_SIZE;
4696 tw32_rx_mbox(MAILBOX_RCV_JUMBO_PROD_IDX + TG3_64BIT_REG_LOW, 4699 tw32_rx_mbox(MAILBOX_RCV_JUMBO_PROD_IDX + TG3_64BIT_REG_LOW,
4697 sw_idx); 4700 tpr->rx_jmb_prod_idx);
4698 } 4701 }
4699 mmiowb(); 4702 mmiowb();
4700 4703