diff options
author | Linus Torvalds <torvalds@g5.osdl.org> | 2006-09-24 13:15:13 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@g5.osdl.org> | 2006-09-24 13:15:13 -0400 |
commit | a319a2773a13bab56a0d0b3744ba8703324313b5 (patch) | |
tree | f02c86acabd1031439fd422a167784007e84ebb1 /drivers/net/tg3.c | |
parent | e18fa700c9a31360bc8f193aa543b7ef7b39a06b (diff) | |
parent | 183798799216fad36c7219fe8d4d6dee6b8fa755 (diff) |
Merge branch 'upstream-linus' of master.kernel.org:/pub/scm/linux/kernel/git/jgarzik/netdev-2.6
* 'upstream-linus' of master.kernel.org:/pub/scm/linux/kernel/git/jgarzik/netdev-2.6: (217 commits)
net/ieee80211: fix more crypto-related build breakage
[PATCH] Spidernet: add ethtool -S (show statistics)
[NET] GT96100: Delete bitrotting ethernet driver
[PATCH] mv643xx_eth: restrict to 32-bit PPC_MULTIPLATFORM
[PATCH] Cirrus Logic ep93xx ethernet driver
r8169: the MMIO region of the 8167 stands behin BAR#1
e1000, ixgb: Remove pointless wrappers
[PATCH] Remove powerpc specific parts of 3c509 driver
[PATCH] s2io: Switch to pci_get_device
[PATCH] gt96100: move to pci_get_device API
[PATCH] ehea: bugfix for register access functions
[PATCH] e1000 disable device on PCI error
drivers/net/phy/fixed: #if 0 some incomplete code
drivers/net: const-ify ethtool_ops declarations
[PATCH] ethtool: allow const ethtool_ops
[PATCH] sky2: big endian
[PATCH] sky2: fiber support
[PATCH] sky2: tx pause bug fix
drivers/net: Trim trailing whitespace
[PATCH] ehea: IBM eHEA Ethernet Device Driver
...
Manually resolved conflicts in drivers/net/ixgb/ixgb_main.c and
drivers/net/sky2.c related to CHECKSUM_HW/CHECKSUM_PARTIAL changes by
commit 84fa7933a33f806bbbaae6775e87459b1ec584c0 that just happened to be
next to unrelated changes in this update.
Diffstat (limited to 'drivers/net/tg3.c')
-rw-r--r-- | drivers/net/tg3.c | 128 |
1 files changed, 64 insertions, 64 deletions
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c index fb7026153861..aaf45b907a78 100644 --- a/drivers/net/tg3.c +++ b/drivers/net/tg3.c | |||
@@ -308,7 +308,7 @@ static void tg3_write32(struct tg3 *tp, u32 off, u32 val) | |||
308 | 308 | ||
309 | static u32 tg3_read32(struct tg3 *tp, u32 off) | 309 | static u32 tg3_read32(struct tg3 *tp, u32 off) |
310 | { | 310 | { |
311 | return (readl(tp->regs + off)); | 311 | return (readl(tp->regs + off)); |
312 | } | 312 | } |
313 | 313 | ||
314 | static void tg3_write_indirect_reg32(struct tg3 *tp, u32 off, u32 val) | 314 | static void tg3_write_indirect_reg32(struct tg3 *tp, u32 off, u32 val) |
@@ -529,7 +529,7 @@ static inline unsigned int tg3_has_work(struct tg3 *tp) | |||
529 | /* tg3_restart_ints | 529 | /* tg3_restart_ints |
530 | * similar to tg3_enable_ints, but it accurately determines whether there | 530 | * similar to tg3_enable_ints, but it accurately determines whether there |
531 | * is new work pending and can return without flushing the PIO write | 531 | * is new work pending and can return without flushing the PIO write |
532 | * which reenables interrupts | 532 | * which reenables interrupts |
533 | */ | 533 | */ |
534 | static void tg3_restart_ints(struct tg3 *tp) | 534 | static void tg3_restart_ints(struct tg3 *tp) |
535 | { | 535 | { |
@@ -618,7 +618,7 @@ static int tg3_readphy(struct tg3 *tp, int reg, u32 *val) | |||
618 | frame_val |= ((reg << MI_COM_REG_ADDR_SHIFT) & | 618 | frame_val |= ((reg << MI_COM_REG_ADDR_SHIFT) & |
619 | MI_COM_REG_ADDR_MASK); | 619 | MI_COM_REG_ADDR_MASK); |
620 | frame_val |= (MI_COM_CMD_READ | MI_COM_START); | 620 | frame_val |= (MI_COM_CMD_READ | MI_COM_START); |
621 | 621 | ||
622 | tw32_f(MAC_MI_COM, frame_val); | 622 | tw32_f(MAC_MI_COM, frame_val); |
623 | 623 | ||
624 | loops = PHY_BUSY_LOOPS; | 624 | loops = PHY_BUSY_LOOPS; |
@@ -666,7 +666,7 @@ static int tg3_writephy(struct tg3 *tp, int reg, u32 val) | |||
666 | MI_COM_REG_ADDR_MASK); | 666 | MI_COM_REG_ADDR_MASK); |
667 | frame_val |= (val & MI_COM_DATA_MASK); | 667 | frame_val |= (val & MI_COM_DATA_MASK); |
668 | frame_val |= (MI_COM_CMD_WRITE | MI_COM_START); | 668 | frame_val |= (MI_COM_CMD_WRITE | MI_COM_START); |
669 | 669 | ||
670 | tw32_f(MAC_MI_COM, frame_val); | 670 | tw32_f(MAC_MI_COM, frame_val); |
671 | 671 | ||
672 | loops = PHY_BUSY_LOOPS; | 672 | loops = PHY_BUSY_LOOPS; |
@@ -1422,7 +1422,7 @@ static void tg3_setup_flow_control(struct tg3 *tp, u32 local_adv, u32 remote_adv | |||
1422 | if (old_rx_mode != tp->rx_mode) { | 1422 | if (old_rx_mode != tp->rx_mode) { |
1423 | tw32_f(MAC_RX_MODE, tp->rx_mode); | 1423 | tw32_f(MAC_RX_MODE, tp->rx_mode); |
1424 | } | 1424 | } |
1425 | 1425 | ||
1426 | if (new_tg3_flags & TG3_FLAG_TX_PAUSE) | 1426 | if (new_tg3_flags & TG3_FLAG_TX_PAUSE) |
1427 | tp->tx_mode |= TX_MODE_FLOW_CTRL_ENABLE; | 1427 | tp->tx_mode |= TX_MODE_FLOW_CTRL_ENABLE; |
1428 | else | 1428 | else |
@@ -2487,7 +2487,7 @@ static int tg3_setup_fiber_by_hand(struct tg3 *tp, u32 mac_status) | |||
2487 | if (tp->link_config.autoneg == AUTONEG_ENABLE) { | 2487 | if (tp->link_config.autoneg == AUTONEG_ENABLE) { |
2488 | u32 flags; | 2488 | u32 flags; |
2489 | int i; | 2489 | int i; |
2490 | 2490 | ||
2491 | if (fiber_autoneg(tp, &flags)) { | 2491 | if (fiber_autoneg(tp, &flags)) { |
2492 | u32 local_adv, remote_adv; | 2492 | u32 local_adv, remote_adv; |
2493 | 2493 | ||
@@ -3203,7 +3203,7 @@ static int tg3_rx(struct tg3 *tp, int budget) | |||
3203 | 3203 | ||
3204 | len = ((desc->idx_len & RXD_LEN_MASK) >> RXD_LEN_SHIFT) - 4; /* omit crc */ | 3204 | len = ((desc->idx_len & RXD_LEN_MASK) >> RXD_LEN_SHIFT) - 4; /* omit crc */ |
3205 | 3205 | ||
3206 | if (len > RX_COPY_THRESHOLD | 3206 | if (len > RX_COPY_THRESHOLD |
3207 | && tp->rx_offset == 2 | 3207 | && tp->rx_offset == 2 |
3208 | /* rx_offset != 2 iff this is a 5701 card running | 3208 | /* rx_offset != 2 iff this is a 5701 card running |
3209 | * in PCI-X mode [see tg3_get_invariants()] */ | 3209 | * in PCI-X mode [see tg3_get_invariants()] */ |
@@ -6753,7 +6753,7 @@ static int tg3_test_interrupt(struct tg3 *tp) | |||
6753 | tg3_disable_ints(tp); | 6753 | tg3_disable_ints(tp); |
6754 | 6754 | ||
6755 | free_irq(tp->pdev->irq, dev); | 6755 | free_irq(tp->pdev->irq, dev); |
6756 | 6756 | ||
6757 | err = tg3_request_irq(tp); | 6757 | err = tg3_request_irq(tp); |
6758 | 6758 | ||
6759 | if (err) | 6759 | if (err) |
@@ -7380,7 +7380,7 @@ static struct net_device_stats *tg3_get_stats(struct net_device *dev) | |||
7380 | get_stat64(&hw_stats->rx_ucast_packets) + | 7380 | get_stat64(&hw_stats->rx_ucast_packets) + |
7381 | get_stat64(&hw_stats->rx_mcast_packets) + | 7381 | get_stat64(&hw_stats->rx_mcast_packets) + |
7382 | get_stat64(&hw_stats->rx_bcast_packets); | 7382 | get_stat64(&hw_stats->rx_bcast_packets); |
7383 | 7383 | ||
7384 | stats->tx_packets = old_stats->tx_packets + | 7384 | stats->tx_packets = old_stats->tx_packets + |
7385 | get_stat64(&hw_stats->tx_ucast_packets) + | 7385 | get_stat64(&hw_stats->tx_ucast_packets) + |
7386 | get_stat64(&hw_stats->tx_mcast_packets) + | 7386 | get_stat64(&hw_stats->tx_mcast_packets) + |
@@ -7688,7 +7688,7 @@ static int tg3_get_eeprom(struct net_device *dev, struct ethtool_eeprom *eeprom, | |||
7688 | return 0; | 7688 | return 0; |
7689 | } | 7689 | } |
7690 | 7690 | ||
7691 | static int tg3_nvram_write_block(struct tg3 *tp, u32 offset, u32 len, u8 *buf); | 7691 | static int tg3_nvram_write_block(struct tg3 *tp, u32 offset, u32 len, u8 *buf); |
7692 | 7692 | ||
7693 | static int tg3_set_eeprom(struct net_device *dev, struct ethtool_eeprom *eeprom, u8 *data) | 7693 | static int tg3_set_eeprom(struct net_device *dev, struct ethtool_eeprom *eeprom, u8 *data) |
7694 | { | 7694 | { |
@@ -7752,7 +7752,7 @@ static int tg3_set_eeprom(struct net_device *dev, struct ethtool_eeprom *eeprom, | |||
7752 | static int tg3_get_settings(struct net_device *dev, struct ethtool_cmd *cmd) | 7752 | static int tg3_get_settings(struct net_device *dev, struct ethtool_cmd *cmd) |
7753 | { | 7753 | { |
7754 | struct tg3 *tp = netdev_priv(dev); | 7754 | struct tg3 *tp = netdev_priv(dev); |
7755 | 7755 | ||
7756 | cmd->supported = (SUPPORTED_Autoneg); | 7756 | cmd->supported = (SUPPORTED_Autoneg); |
7757 | 7757 | ||
7758 | if (!(tp->tg3_flags & TG3_FLAG_10_100_ONLY)) | 7758 | if (!(tp->tg3_flags & TG3_FLAG_10_100_ONLY)) |
@@ -7770,7 +7770,7 @@ static int tg3_get_settings(struct net_device *dev, struct ethtool_cmd *cmd) | |||
7770 | cmd->supported |= SUPPORTED_FIBRE; | 7770 | cmd->supported |= SUPPORTED_FIBRE; |
7771 | cmd->port = PORT_FIBRE; | 7771 | cmd->port = PORT_FIBRE; |
7772 | } | 7772 | } |
7773 | 7773 | ||
7774 | cmd->advertising = tp->link_config.advertising; | 7774 | cmd->advertising = tp->link_config.advertising; |
7775 | if (netif_running(dev)) { | 7775 | if (netif_running(dev)) { |
7776 | cmd->speed = tp->link_config.active_speed; | 7776 | cmd->speed = tp->link_config.active_speed; |
@@ -7783,12 +7783,12 @@ static int tg3_get_settings(struct net_device *dev, struct ethtool_cmd *cmd) | |||
7783 | cmd->maxrxpkt = 0; | 7783 | cmd->maxrxpkt = 0; |
7784 | return 0; | 7784 | return 0; |
7785 | } | 7785 | } |
7786 | 7786 | ||
7787 | static int tg3_set_settings(struct net_device *dev, struct ethtool_cmd *cmd) | 7787 | static int tg3_set_settings(struct net_device *dev, struct ethtool_cmd *cmd) |
7788 | { | 7788 | { |
7789 | struct tg3 *tp = netdev_priv(dev); | 7789 | struct tg3 *tp = netdev_priv(dev); |
7790 | 7790 | ||
7791 | if (tp->tg3_flags2 & TG3_FLG2_ANY_SERDES) { | 7791 | if (tp->tg3_flags2 & TG3_FLG2_ANY_SERDES) { |
7792 | /* These are the only valid advertisement bits allowed. */ | 7792 | /* These are the only valid advertisement bits allowed. */ |
7793 | if (cmd->autoneg == AUTONEG_ENABLE && | 7793 | if (cmd->autoneg == AUTONEG_ENABLE && |
7794 | (cmd->advertising & ~(ADVERTISED_1000baseT_Half | | 7794 | (cmd->advertising & ~(ADVERTISED_1000baseT_Half | |
@@ -7820,69 +7820,69 @@ static int tg3_set_settings(struct net_device *dev, struct ethtool_cmd *cmd) | |||
7820 | tp->link_config.speed = cmd->speed; | 7820 | tp->link_config.speed = cmd->speed; |
7821 | tp->link_config.duplex = cmd->duplex; | 7821 | tp->link_config.duplex = cmd->duplex; |
7822 | } | 7822 | } |
7823 | 7823 | ||
7824 | if (netif_running(dev)) | 7824 | if (netif_running(dev)) |
7825 | tg3_setup_phy(tp, 1); | 7825 | tg3_setup_phy(tp, 1); |
7826 | 7826 | ||
7827 | tg3_full_unlock(tp); | 7827 | tg3_full_unlock(tp); |
7828 | 7828 | ||
7829 | return 0; | 7829 | return 0; |
7830 | } | 7830 | } |
7831 | 7831 | ||
7832 | static void tg3_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info) | 7832 | static void tg3_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info) |
7833 | { | 7833 | { |
7834 | struct tg3 *tp = netdev_priv(dev); | 7834 | struct tg3 *tp = netdev_priv(dev); |
7835 | 7835 | ||
7836 | strcpy(info->driver, DRV_MODULE_NAME); | 7836 | strcpy(info->driver, DRV_MODULE_NAME); |
7837 | strcpy(info->version, DRV_MODULE_VERSION); | 7837 | strcpy(info->version, DRV_MODULE_VERSION); |
7838 | strcpy(info->fw_version, tp->fw_ver); | 7838 | strcpy(info->fw_version, tp->fw_ver); |
7839 | strcpy(info->bus_info, pci_name(tp->pdev)); | 7839 | strcpy(info->bus_info, pci_name(tp->pdev)); |
7840 | } | 7840 | } |
7841 | 7841 | ||
7842 | static void tg3_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol) | 7842 | static void tg3_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol) |
7843 | { | 7843 | { |
7844 | struct tg3 *tp = netdev_priv(dev); | 7844 | struct tg3 *tp = netdev_priv(dev); |
7845 | 7845 | ||
7846 | wol->supported = WAKE_MAGIC; | 7846 | wol->supported = WAKE_MAGIC; |
7847 | wol->wolopts = 0; | 7847 | wol->wolopts = 0; |
7848 | if (tp->tg3_flags & TG3_FLAG_WOL_ENABLE) | 7848 | if (tp->tg3_flags & TG3_FLAG_WOL_ENABLE) |
7849 | wol->wolopts = WAKE_MAGIC; | 7849 | wol->wolopts = WAKE_MAGIC; |
7850 | memset(&wol->sopass, 0, sizeof(wol->sopass)); | 7850 | memset(&wol->sopass, 0, sizeof(wol->sopass)); |
7851 | } | 7851 | } |
7852 | 7852 | ||
7853 | static int tg3_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol) | 7853 | static int tg3_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol) |
7854 | { | 7854 | { |
7855 | struct tg3 *tp = netdev_priv(dev); | 7855 | struct tg3 *tp = netdev_priv(dev); |
7856 | 7856 | ||
7857 | if (wol->wolopts & ~WAKE_MAGIC) | 7857 | if (wol->wolopts & ~WAKE_MAGIC) |
7858 | return -EINVAL; | 7858 | return -EINVAL; |
7859 | if ((wol->wolopts & WAKE_MAGIC) && | 7859 | if ((wol->wolopts & WAKE_MAGIC) && |
7860 | tp->tg3_flags2 & TG3_FLG2_PHY_SERDES && | 7860 | tp->tg3_flags2 & TG3_FLG2_PHY_SERDES && |
7861 | !(tp->tg3_flags & TG3_FLAG_SERDES_WOL_CAP)) | 7861 | !(tp->tg3_flags & TG3_FLAG_SERDES_WOL_CAP)) |
7862 | return -EINVAL; | 7862 | return -EINVAL; |
7863 | 7863 | ||
7864 | spin_lock_bh(&tp->lock); | 7864 | spin_lock_bh(&tp->lock); |
7865 | if (wol->wolopts & WAKE_MAGIC) | 7865 | if (wol->wolopts & WAKE_MAGIC) |
7866 | tp->tg3_flags |= TG3_FLAG_WOL_ENABLE; | 7866 | tp->tg3_flags |= TG3_FLAG_WOL_ENABLE; |
7867 | else | 7867 | else |
7868 | tp->tg3_flags &= ~TG3_FLAG_WOL_ENABLE; | 7868 | tp->tg3_flags &= ~TG3_FLAG_WOL_ENABLE; |
7869 | spin_unlock_bh(&tp->lock); | 7869 | spin_unlock_bh(&tp->lock); |
7870 | 7870 | ||
7871 | return 0; | 7871 | return 0; |
7872 | } | 7872 | } |
7873 | 7873 | ||
7874 | static u32 tg3_get_msglevel(struct net_device *dev) | 7874 | static u32 tg3_get_msglevel(struct net_device *dev) |
7875 | { | 7875 | { |
7876 | struct tg3 *tp = netdev_priv(dev); | 7876 | struct tg3 *tp = netdev_priv(dev); |
7877 | return tp->msg_enable; | 7877 | return tp->msg_enable; |
7878 | } | 7878 | } |
7879 | 7879 | ||
7880 | static void tg3_set_msglevel(struct net_device *dev, u32 value) | 7880 | static void tg3_set_msglevel(struct net_device *dev, u32 value) |
7881 | { | 7881 | { |
7882 | struct tg3 *tp = netdev_priv(dev); | 7882 | struct tg3 *tp = netdev_priv(dev); |
7883 | tp->msg_enable = value; | 7883 | tp->msg_enable = value; |
7884 | } | 7884 | } |
7885 | 7885 | ||
7886 | #if TG3_TSO_SUPPORT != 0 | 7886 | #if TG3_TSO_SUPPORT != 0 |
7887 | static int tg3_set_tso(struct net_device *dev, u32 value) | 7887 | static int tg3_set_tso(struct net_device *dev, u32 value) |
7888 | { | 7888 | { |
@@ -7902,13 +7902,13 @@ static int tg3_set_tso(struct net_device *dev, u32 value) | |||
7902 | return ethtool_op_set_tso(dev, value); | 7902 | return ethtool_op_set_tso(dev, value); |
7903 | } | 7903 | } |
7904 | #endif | 7904 | #endif |
7905 | 7905 | ||
7906 | static int tg3_nway_reset(struct net_device *dev) | 7906 | static int tg3_nway_reset(struct net_device *dev) |
7907 | { | 7907 | { |
7908 | struct tg3 *tp = netdev_priv(dev); | 7908 | struct tg3 *tp = netdev_priv(dev); |
7909 | u32 bmcr; | 7909 | u32 bmcr; |
7910 | int r; | 7910 | int r; |
7911 | 7911 | ||
7912 | if (!netif_running(dev)) | 7912 | if (!netif_running(dev)) |
7913 | return -EAGAIN; | 7913 | return -EAGAIN; |
7914 | 7914 | ||
@@ -7926,14 +7926,14 @@ static int tg3_nway_reset(struct net_device *dev) | |||
7926 | r = 0; | 7926 | r = 0; |
7927 | } | 7927 | } |
7928 | spin_unlock_bh(&tp->lock); | 7928 | spin_unlock_bh(&tp->lock); |
7929 | 7929 | ||
7930 | return r; | 7930 | return r; |
7931 | } | 7931 | } |
7932 | 7932 | ||
7933 | static void tg3_get_ringparam(struct net_device *dev, struct ethtool_ringparam *ering) | 7933 | static void tg3_get_ringparam(struct net_device *dev, struct ethtool_ringparam *ering) |
7934 | { | 7934 | { |
7935 | struct tg3 *tp = netdev_priv(dev); | 7935 | struct tg3 *tp = netdev_priv(dev); |
7936 | 7936 | ||
7937 | ering->rx_max_pending = TG3_RX_RING_SIZE - 1; | 7937 | ering->rx_max_pending = TG3_RX_RING_SIZE - 1; |
7938 | ering->rx_mini_max_pending = 0; | 7938 | ering->rx_mini_max_pending = 0; |
7939 | if (tp->tg3_flags & TG3_FLAG_JUMBO_RING_ENABLE) | 7939 | if (tp->tg3_flags & TG3_FLAG_JUMBO_RING_ENABLE) |
@@ -7952,24 +7952,24 @@ static void tg3_get_ringparam(struct net_device *dev, struct ethtool_ringparam * | |||
7952 | 7952 | ||
7953 | ering->tx_pending = tp->tx_pending; | 7953 | ering->tx_pending = tp->tx_pending; |
7954 | } | 7954 | } |
7955 | 7955 | ||
7956 | static int tg3_set_ringparam(struct net_device *dev, struct ethtool_ringparam *ering) | 7956 | static int tg3_set_ringparam(struct net_device *dev, struct ethtool_ringparam *ering) |
7957 | { | 7957 | { |
7958 | struct tg3 *tp = netdev_priv(dev); | 7958 | struct tg3 *tp = netdev_priv(dev); |
7959 | int irq_sync = 0, err = 0; | 7959 | int irq_sync = 0, err = 0; |
7960 | 7960 | ||
7961 | if ((ering->rx_pending > TG3_RX_RING_SIZE - 1) || | 7961 | if ((ering->rx_pending > TG3_RX_RING_SIZE - 1) || |
7962 | (ering->rx_jumbo_pending > TG3_RX_JUMBO_RING_SIZE - 1) || | 7962 | (ering->rx_jumbo_pending > TG3_RX_JUMBO_RING_SIZE - 1) || |
7963 | (ering->tx_pending > TG3_TX_RING_SIZE - 1)) | 7963 | (ering->tx_pending > TG3_TX_RING_SIZE - 1)) |
7964 | return -EINVAL; | 7964 | return -EINVAL; |
7965 | 7965 | ||
7966 | if (netif_running(dev)) { | 7966 | if (netif_running(dev)) { |
7967 | tg3_netif_stop(tp); | 7967 | tg3_netif_stop(tp); |
7968 | irq_sync = 1; | 7968 | irq_sync = 1; |
7969 | } | 7969 | } |
7970 | 7970 | ||
7971 | tg3_full_lock(tp, irq_sync); | 7971 | tg3_full_lock(tp, irq_sync); |
7972 | 7972 | ||
7973 | tp->rx_pending = ering->rx_pending; | 7973 | tp->rx_pending = ering->rx_pending; |
7974 | 7974 | ||
7975 | if ((tp->tg3_flags2 & TG3_FLG2_MAX_RXPEND_64) && | 7975 | if ((tp->tg3_flags2 & TG3_FLG2_MAX_RXPEND_64) && |
@@ -7986,24 +7986,24 @@ static int tg3_set_ringparam(struct net_device *dev, struct ethtool_ringparam *e | |||
7986 | } | 7986 | } |
7987 | 7987 | ||
7988 | tg3_full_unlock(tp); | 7988 | tg3_full_unlock(tp); |
7989 | 7989 | ||
7990 | return err; | 7990 | return err; |
7991 | } | 7991 | } |
7992 | 7992 | ||
7993 | static void tg3_get_pauseparam(struct net_device *dev, struct ethtool_pauseparam *epause) | 7993 | static void tg3_get_pauseparam(struct net_device *dev, struct ethtool_pauseparam *epause) |
7994 | { | 7994 | { |
7995 | struct tg3 *tp = netdev_priv(dev); | 7995 | struct tg3 *tp = netdev_priv(dev); |
7996 | 7996 | ||
7997 | epause->autoneg = (tp->tg3_flags & TG3_FLAG_PAUSE_AUTONEG) != 0; | 7997 | epause->autoneg = (tp->tg3_flags & TG3_FLAG_PAUSE_AUTONEG) != 0; |
7998 | epause->rx_pause = (tp->tg3_flags & TG3_FLAG_RX_PAUSE) != 0; | 7998 | epause->rx_pause = (tp->tg3_flags & TG3_FLAG_RX_PAUSE) != 0; |
7999 | epause->tx_pause = (tp->tg3_flags & TG3_FLAG_TX_PAUSE) != 0; | 7999 | epause->tx_pause = (tp->tg3_flags & TG3_FLAG_TX_PAUSE) != 0; |
8000 | } | 8000 | } |
8001 | 8001 | ||
8002 | static int tg3_set_pauseparam(struct net_device *dev, struct ethtool_pauseparam *epause) | 8002 | static int tg3_set_pauseparam(struct net_device *dev, struct ethtool_pauseparam *epause) |
8003 | { | 8003 | { |
8004 | struct tg3 *tp = netdev_priv(dev); | 8004 | struct tg3 *tp = netdev_priv(dev); |
8005 | int irq_sync = 0, err = 0; | 8005 | int irq_sync = 0, err = 0; |
8006 | 8006 | ||
8007 | if (netif_running(dev)) { | 8007 | if (netif_running(dev)) { |
8008 | tg3_netif_stop(tp); | 8008 | tg3_netif_stop(tp); |
8009 | irq_sync = 1; | 8009 | irq_sync = 1; |
@@ -8032,46 +8032,46 @@ static int tg3_set_pauseparam(struct net_device *dev, struct ethtool_pauseparam | |||
8032 | } | 8032 | } |
8033 | 8033 | ||
8034 | tg3_full_unlock(tp); | 8034 | tg3_full_unlock(tp); |
8035 | 8035 | ||
8036 | return err; | 8036 | return err; |
8037 | } | 8037 | } |
8038 | 8038 | ||
8039 | static u32 tg3_get_rx_csum(struct net_device *dev) | 8039 | static u32 tg3_get_rx_csum(struct net_device *dev) |
8040 | { | 8040 | { |
8041 | struct tg3 *tp = netdev_priv(dev); | 8041 | struct tg3 *tp = netdev_priv(dev); |
8042 | return (tp->tg3_flags & TG3_FLAG_RX_CHECKSUMS) != 0; | 8042 | return (tp->tg3_flags & TG3_FLAG_RX_CHECKSUMS) != 0; |
8043 | } | 8043 | } |
8044 | 8044 | ||
8045 | static int tg3_set_rx_csum(struct net_device *dev, u32 data) | 8045 | static int tg3_set_rx_csum(struct net_device *dev, u32 data) |
8046 | { | 8046 | { |
8047 | struct tg3 *tp = netdev_priv(dev); | 8047 | struct tg3 *tp = netdev_priv(dev); |
8048 | 8048 | ||
8049 | if (tp->tg3_flags & TG3_FLAG_BROKEN_CHECKSUMS) { | 8049 | if (tp->tg3_flags & TG3_FLAG_BROKEN_CHECKSUMS) { |
8050 | if (data != 0) | 8050 | if (data != 0) |
8051 | return -EINVAL; | 8051 | return -EINVAL; |
8052 | return 0; | 8052 | return 0; |
8053 | } | 8053 | } |
8054 | 8054 | ||
8055 | spin_lock_bh(&tp->lock); | 8055 | spin_lock_bh(&tp->lock); |
8056 | if (data) | 8056 | if (data) |
8057 | tp->tg3_flags |= TG3_FLAG_RX_CHECKSUMS; | 8057 | tp->tg3_flags |= TG3_FLAG_RX_CHECKSUMS; |
8058 | else | 8058 | else |
8059 | tp->tg3_flags &= ~TG3_FLAG_RX_CHECKSUMS; | 8059 | tp->tg3_flags &= ~TG3_FLAG_RX_CHECKSUMS; |
8060 | spin_unlock_bh(&tp->lock); | 8060 | spin_unlock_bh(&tp->lock); |
8061 | 8061 | ||
8062 | return 0; | 8062 | return 0; |
8063 | } | 8063 | } |
8064 | 8064 | ||
8065 | static int tg3_set_tx_csum(struct net_device *dev, u32 data) | 8065 | static int tg3_set_tx_csum(struct net_device *dev, u32 data) |
8066 | { | 8066 | { |
8067 | struct tg3 *tp = netdev_priv(dev); | 8067 | struct tg3 *tp = netdev_priv(dev); |
8068 | 8068 | ||
8069 | if (tp->tg3_flags & TG3_FLAG_BROKEN_CHECKSUMS) { | 8069 | if (tp->tg3_flags & TG3_FLAG_BROKEN_CHECKSUMS) { |
8070 | if (data != 0) | 8070 | if (data != 0) |
8071 | return -EINVAL; | 8071 | return -EINVAL; |
8072 | return 0; | 8072 | return 0; |
8073 | } | 8073 | } |
8074 | 8074 | ||
8075 | if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5755 || | 8075 | if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5755 || |
8076 | GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5787) | 8076 | GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5787) |
8077 | ethtool_op_set_tx_hw_csum(dev, data); | 8077 | ethtool_op_set_tx_hw_csum(dev, data); |
@@ -8126,7 +8126,7 @@ static int tg3_phys_id(struct net_device *dev, u32 data) | |||
8126 | LED_CTRL_TRAFFIC_OVERRIDE | | 8126 | LED_CTRL_TRAFFIC_OVERRIDE | |
8127 | LED_CTRL_TRAFFIC_BLINK | | 8127 | LED_CTRL_TRAFFIC_BLINK | |
8128 | LED_CTRL_TRAFFIC_LED); | 8128 | LED_CTRL_TRAFFIC_LED); |
8129 | 8129 | ||
8130 | else | 8130 | else |
8131 | tw32(MAC_LED_CTRL, LED_CTRL_LNKLED_OVERRIDE | | 8131 | tw32(MAC_LED_CTRL, LED_CTRL_LNKLED_OVERRIDE | |
8132 | LED_CTRL_TRAFFIC_OVERRIDE); | 8132 | LED_CTRL_TRAFFIC_OVERRIDE); |
@@ -8303,7 +8303,7 @@ static int tg3_test_registers(struct tg3 *tp) | |||
8303 | 0x00000000, 0xffff0002 }, | 8303 | 0x00000000, 0xffff0002 }, |
8304 | { RCVDBDI_STD_BD+0xc, 0x0000, | 8304 | { RCVDBDI_STD_BD+0xc, 0x0000, |
8305 | 0x00000000, 0xffffffff }, | 8305 | 0x00000000, 0xffffffff }, |
8306 | 8306 | ||
8307 | /* Receive BD Initiator Control Registers. */ | 8307 | /* Receive BD Initiator Control Registers. */ |
8308 | { RCVBDI_STD_THRESH, TG3_FL_NOT_5705, | 8308 | { RCVBDI_STD_THRESH, TG3_FL_NOT_5705, |
8309 | 0x00000000, 0xffffffff }, | 8309 | 0x00000000, 0xffffffff }, |
@@ -8311,7 +8311,7 @@ static int tg3_test_registers(struct tg3 *tp) | |||
8311 | 0x00000000, 0x000003ff }, | 8311 | 0x00000000, 0x000003ff }, |
8312 | { RCVBDI_JUMBO_THRESH, TG3_FL_NOT_5705, | 8312 | { RCVBDI_JUMBO_THRESH, TG3_FL_NOT_5705, |
8313 | 0x00000000, 0xffffffff }, | 8313 | 0x00000000, 0xffffffff }, |
8314 | 8314 | ||
8315 | /* Host Coalescing Control Registers. */ | 8315 | /* Host Coalescing Control Registers. */ |
8316 | { HOSTCC_MODE, TG3_FL_NOT_5705, | 8316 | { HOSTCC_MODE, TG3_FL_NOT_5705, |
8317 | 0x00000000, 0x00000004 }, | 8317 | 0x00000000, 0x00000004 }, |
@@ -8375,7 +8375,7 @@ static int tg3_test_registers(struct tg3 *tp) | |||
8375 | 0xffffffff, 0x00000000 }, | 8375 | 0xffffffff, 0x00000000 }, |
8376 | { BUFMGR_DMA_DESC_POOL_SIZE, TG3_FL_NOT_5705, | 8376 | { BUFMGR_DMA_DESC_POOL_SIZE, TG3_FL_NOT_5705, |
8377 | 0xffffffff, 0x00000000 }, | 8377 | 0xffffffff, 0x00000000 }, |
8378 | 8378 | ||
8379 | /* Mailbox Registers */ | 8379 | /* Mailbox Registers */ |
8380 | { GRCMBOX_RCVSTD_PROD_IDX+4, 0x0000, | 8380 | { GRCMBOX_RCVSTD_PROD_IDX+4, 0x0000, |
8381 | 0x00000000, 0x000001ff }, | 8381 | 0x00000000, 0x000001ff }, |
@@ -8515,7 +8515,7 @@ static int tg3_test_memory(struct tg3 *tp) | |||
8515 | mem_tbl[i].len)) != 0) | 8515 | mem_tbl[i].len)) != 0) |
8516 | break; | 8516 | break; |
8517 | } | 8517 | } |
8518 | 8518 | ||
8519 | return err; | 8519 | return err; |
8520 | } | 8520 | } |
8521 | 8521 | ||
@@ -8650,7 +8650,7 @@ static int tg3_run_loopback(struct tg3 *tp, int loopback_mode) | |||
8650 | goto out; | 8650 | goto out; |
8651 | } | 8651 | } |
8652 | err = 0; | 8652 | err = 0; |
8653 | 8653 | ||
8654 | /* tg3_free_rings will unmap and free the rx_skb */ | 8654 | /* tg3_free_rings will unmap and free the rx_skb */ |
8655 | out: | 8655 | out: |
8656 | return err; | 8656 | return err; |
@@ -8907,7 +8907,7 @@ static int tg3_set_coalesce(struct net_device *dev, struct ethtool_coalesce *ec) | |||
8907 | return 0; | 8907 | return 0; |
8908 | } | 8908 | } |
8909 | 8909 | ||
8910 | static struct ethtool_ops tg3_ethtool_ops = { | 8910 | static const struct ethtool_ops tg3_ethtool_ops = { |
8911 | .get_settings = tg3_get_settings, | 8911 | .get_settings = tg3_get_settings, |
8912 | .set_settings = tg3_set_settings, | 8912 | .set_settings = tg3_set_settings, |
8913 | .get_drvinfo = tg3_get_drvinfo, | 8913 | .get_drvinfo = tg3_get_drvinfo, |
@@ -8978,7 +8978,7 @@ static void __devinit tg3_get_eeprom_size(struct tg3 *tp) | |||
8978 | 8978 | ||
8979 | tp->nvram_size = cursize; | 8979 | tp->nvram_size = cursize; |
8980 | } | 8980 | } |
8981 | 8981 | ||
8982 | static void __devinit tg3_get_nvram_size(struct tg3 *tp) | 8982 | static void __devinit tg3_get_nvram_size(struct tg3 *tp) |
8983 | { | 8983 | { |
8984 | u32 val; | 8984 | u32 val; |
@@ -9394,7 +9394,7 @@ static int tg3_nvram_write_block_using_eeprom(struct tg3 *tp, | |||
9394 | (addr & EEPROM_ADDR_ADDR_MASK) | | 9394 | (addr & EEPROM_ADDR_ADDR_MASK) | |
9395 | EEPROM_ADDR_START | | 9395 | EEPROM_ADDR_START | |
9396 | EEPROM_ADDR_WRITE); | 9396 | EEPROM_ADDR_WRITE); |
9397 | 9397 | ||
9398 | for (j = 0; j < 10000; j++) { | 9398 | for (j = 0; j < 10000; j++) { |
9399 | val = tr32(GRC_EEPROM_ADDR); | 9399 | val = tr32(GRC_EEPROM_ADDR); |
9400 | 9400 | ||
@@ -9430,7 +9430,7 @@ static int tg3_nvram_write_block_unbuffered(struct tg3 *tp, u32 offset, u32 len, | |||
9430 | u32 phy_addr, page_off, size; | 9430 | u32 phy_addr, page_off, size; |
9431 | 9431 | ||
9432 | phy_addr = offset & ~pagemask; | 9432 | phy_addr = offset & ~pagemask; |
9433 | 9433 | ||
9434 | for (j = 0; j < pagesize; j += 4) { | 9434 | for (j = 0; j < pagesize; j += 4) { |
9435 | if ((ret = tg3_nvram_read(tp, phy_addr + j, | 9435 | if ((ret = tg3_nvram_read(tp, phy_addr + j, |
9436 | (u32 *) (tmp + j)))) | 9436 | (u32 *) (tmp + j)))) |
@@ -9886,7 +9886,7 @@ static int __devinit tg3_phy_probe(struct tg3 *tp) | |||
9886 | if (!tg3_readphy(tp, MII_BMSR, &bmsr) && | 9886 | if (!tg3_readphy(tp, MII_BMSR, &bmsr) && |
9887 | (bmsr & BMSR_LSTATUS)) | 9887 | (bmsr & BMSR_LSTATUS)) |
9888 | goto skip_phy_reset; | 9888 | goto skip_phy_reset; |
9889 | 9889 | ||
9890 | err = tg3_phy_reset(tp); | 9890 | err = tg3_phy_reset(tp); |
9891 | if (err) | 9891 | if (err) |
9892 | return err; | 9892 | return err; |
@@ -10406,7 +10406,7 @@ static int __devinit tg3_get_invariants(struct tg3 *tp) | |||
10406 | * When the flag is set, it means that GPIO1 is used for eeprom | 10406 | * When the flag is set, it means that GPIO1 is used for eeprom |
10407 | * write protect and also implies that it is a LOM where GPIOs | 10407 | * write protect and also implies that it is a LOM where GPIOs |
10408 | * are not used to switch power. | 10408 | * are not used to switch power. |
10409 | */ | 10409 | */ |
10410 | tg3_get_eeprom_hw_cfg(tp); | 10410 | tg3_get_eeprom_hw_cfg(tp); |
10411 | 10411 | ||
10412 | /* Set up tp->grc_local_ctrl before calling tg3_set_power_state(). | 10412 | /* Set up tp->grc_local_ctrl before calling tg3_set_power_state(). |
@@ -11764,7 +11764,7 @@ static struct pci_driver tg3_driver = { | |||
11764 | 11764 | ||
11765 | static int __init tg3_init(void) | 11765 | static int __init tg3_init(void) |
11766 | { | 11766 | { |
11767 | return pci_module_init(&tg3_driver); | 11767 | return pci_register_driver(&tg3_driver); |
11768 | } | 11768 | } |
11769 | 11769 | ||
11770 | static void __exit tg3_cleanup(void) | 11770 | static void __exit tg3_cleanup(void) |