diff options
author | Michael Chan <mchan@broadcom.com> | 2006-03-23 04:28:25 -0500 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2006-03-23 04:28:25 -0500 |
commit | d3c7b886978bef42f5ea487dec376c482d3cd7e3 (patch) | |
tree | 0776fcc78eb223beccc5af0a88b991a7d0284677 /drivers/net/tg3.c | |
parent | af36e6b6d7f4ad7a5ccfd14dfa71ec941255f93d (diff) |
[TG3]: Add 5755 nvram support
Add 5755 nvram support.
Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/tg3.c')
-rw-r--r-- | drivers/net/tg3.c | 43 |
1 files changed, 43 insertions, 0 deletions
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c index c69c8df088d0..b4c5bab2bb40 100644 --- a/drivers/net/tg3.c +++ b/drivers/net/tg3.c | |||
@@ -8938,6 +8938,47 @@ static void __devinit tg3_get_5752_nvram_info(struct tg3 *tp) | |||
8938 | } | 8938 | } |
8939 | } | 8939 | } |
8940 | 8940 | ||
8941 | static void __devinit tg3_get_5755_nvram_info(struct tg3 *tp) | ||
8942 | { | ||
8943 | u32 nvcfg1; | ||
8944 | |||
8945 | nvcfg1 = tr32(NVRAM_CFG1); | ||
8946 | |||
8947 | /* NVRAM protection for TPM */ | ||
8948 | if (nvcfg1 & (1 << 27)) | ||
8949 | tp->tg3_flags2 |= TG3_FLG2_PROTECTED_NVRAM; | ||
8950 | |||
8951 | switch (nvcfg1 & NVRAM_CFG1_5752VENDOR_MASK) { | ||
8952 | case FLASH_5755VENDOR_ATMEL_EEPROM_64KHZ: | ||
8953 | case FLASH_5755VENDOR_ATMEL_EEPROM_376KHZ: | ||
8954 | tp->nvram_jedecnum = JEDEC_ATMEL; | ||
8955 | tp->tg3_flags |= TG3_FLAG_NVRAM_BUFFERED; | ||
8956 | tp->nvram_pagesize = ATMEL_AT24C512_CHIP_SIZE; | ||
8957 | |||
8958 | nvcfg1 &= ~NVRAM_CFG1_COMPAT_BYPASS; | ||
8959 | tw32(NVRAM_CFG1, nvcfg1); | ||
8960 | break; | ||
8961 | case FLASH_5752VENDOR_ATMEL_FLASH_BUFFERED: | ||
8962 | case FLASH_5755VENDOR_ATMEL_FLASH_1: | ||
8963 | case FLASH_5755VENDOR_ATMEL_FLASH_2: | ||
8964 | case FLASH_5755VENDOR_ATMEL_FLASH_3: | ||
8965 | case FLASH_5755VENDOR_ATMEL_FLASH_4: | ||
8966 | tp->nvram_jedecnum = JEDEC_ATMEL; | ||
8967 | tp->tg3_flags |= TG3_FLAG_NVRAM_BUFFERED; | ||
8968 | tp->tg3_flags2 |= TG3_FLG2_FLASH; | ||
8969 | tp->nvram_pagesize = 264; | ||
8970 | break; | ||
8971 | case FLASH_5752VENDOR_ST_M45PE10: | ||
8972 | case FLASH_5752VENDOR_ST_M45PE20: | ||
8973 | case FLASH_5752VENDOR_ST_M45PE40: | ||
8974 | tp->nvram_jedecnum = JEDEC_ST; | ||
8975 | tp->tg3_flags |= TG3_FLAG_NVRAM_BUFFERED; | ||
8976 | tp->tg3_flags2 |= TG3_FLG2_FLASH; | ||
8977 | tp->nvram_pagesize = 256; | ||
8978 | break; | ||
8979 | } | ||
8980 | } | ||
8981 | |||
8941 | static void __devinit tg3_get_5787_nvram_info(struct tg3 *tp) | 8982 | static void __devinit tg3_get_5787_nvram_info(struct tg3 *tp) |
8942 | { | 8983 | { |
8943 | u32 nvcfg1; | 8984 | u32 nvcfg1; |
@@ -9011,6 +9052,8 @@ static void __devinit tg3_nvram_init(struct tg3 *tp) | |||
9011 | 9052 | ||
9012 | if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5752) | 9053 | if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5752) |
9013 | tg3_get_5752_nvram_info(tp); | 9054 | tg3_get_5752_nvram_info(tp); |
9055 | else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5755) | ||
9056 | tg3_get_5755_nvram_info(tp); | ||
9014 | else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5787) | 9057 | else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5787) |
9015 | tg3_get_5787_nvram_info(tp); | 9058 | tg3_get_5787_nvram_info(tp); |
9016 | else | 9059 | else |