diff options
author | Matt Carlson <mcarlson@broadcom.com> | 2009-08-28 10:01:37 -0400 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2009-08-29 18:42:56 -0400 |
commit | 8ef0442f98850333196bc56415192e52a6267878 (patch) | |
tree | 5ba3ec9ed6ef805ecec9073906017e233063aa2e /drivers/net/tg3.c | |
parent | 07b0173cb5d6a9d77646cd855066ebe90b9203f2 (diff) |
tg3: Move napi to per-int struct
This patch creates a per-interrupt data structure, moves the napi
member over, and creates a tg3 pointer back to the device structure.
Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/tg3.c')
-rw-r--r-- | drivers/net/tg3.c | 39 |
1 files changed, 17 insertions, 22 deletions
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c index 37a462986db2..b308c409e474 100644 --- a/drivers/net/tg3.c +++ b/drivers/net/tg3.c | |||
@@ -687,7 +687,7 @@ static void tg3_restart_ints(struct tg3 *tp) | |||
687 | static inline void tg3_netif_stop(struct tg3 *tp) | 687 | static inline void tg3_netif_stop(struct tg3 *tp) |
688 | { | 688 | { |
689 | tp->dev->trans_start = jiffies; /* prevent tx timeout */ | 689 | tp->dev->trans_start = jiffies; /* prevent tx timeout */ |
690 | napi_disable(&tp->napi); | 690 | napi_disable(&tp->napi[0].napi); |
691 | netif_tx_disable(tp->dev); | 691 | netif_tx_disable(tp->dev); |
692 | } | 692 | } |
693 | 693 | ||
@@ -698,7 +698,7 @@ static inline void tg3_netif_start(struct tg3 *tp) | |||
698 | * so long as all callers are assured to have free tx slots | 698 | * so long as all callers are assured to have free tx slots |
699 | * (such as after tg3_init_hw) | 699 | * (such as after tg3_init_hw) |
700 | */ | 700 | */ |
701 | napi_enable(&tp->napi); | 701 | napi_enable(&tp->napi[0].napi); |
702 | tp->hw_status->status |= SD_STATUS_UPDATED; | 702 | tp->hw_status->status |= SD_STATUS_UPDATED; |
703 | tg3_enable_ints(tp); | 703 | tg3_enable_ints(tp); |
704 | } | 704 | } |
@@ -4447,13 +4447,6 @@ static void tg3_recycle_rx(struct tg3 *tp, u32 opaque_key, | |||
4447 | src_map->skb = NULL; | 4447 | src_map->skb = NULL; |
4448 | } | 4448 | } |
4449 | 4449 | ||
4450 | #if TG3_VLAN_TAG_USED | ||
4451 | static int tg3_vlan_rx(struct tg3 *tp, struct sk_buff *skb, u16 vlan_tag) | ||
4452 | { | ||
4453 | return vlan_gro_receive(&tp->napi, tp->vlgrp, vlan_tag, skb); | ||
4454 | } | ||
4455 | #endif | ||
4456 | |||
4457 | /* The RX ring scheme is composed of multiple rings which post fresh | 4450 | /* The RX ring scheme is composed of multiple rings which post fresh |
4458 | * buffers to the chip, and one special ring the chip uses to report | 4451 | * buffers to the chip, and one special ring the chip uses to report |
4459 | * status back to the host. | 4452 | * status back to the host. |
@@ -4591,11 +4584,11 @@ static int tg3_rx(struct tg3 *tp, int budget) | |||
4591 | #if TG3_VLAN_TAG_USED | 4584 | #if TG3_VLAN_TAG_USED |
4592 | if (tp->vlgrp != NULL && | 4585 | if (tp->vlgrp != NULL && |
4593 | desc->type_flags & RXD_FLAG_VLAN) { | 4586 | desc->type_flags & RXD_FLAG_VLAN) { |
4594 | tg3_vlan_rx(tp, skb, | 4587 | vlan_gro_receive(&tp->napi[0].napi, tp->vlgrp, |
4595 | desc->err_vlan & RXD_VLAN_MASK); | 4588 | desc->err_vlan & RXD_VLAN_MASK, skb); |
4596 | } else | 4589 | } else |
4597 | #endif | 4590 | #endif |
4598 | napi_gro_receive(&tp->napi, skb); | 4591 | napi_gro_receive(&tp->napi[0].napi, skb); |
4599 | 4592 | ||
4600 | received++; | 4593 | received++; |
4601 | budget--; | 4594 | budget--; |
@@ -4686,7 +4679,8 @@ static int tg3_poll_work(struct tg3 *tp, int work_done, int budget) | |||
4686 | 4679 | ||
4687 | static int tg3_poll(struct napi_struct *napi, int budget) | 4680 | static int tg3_poll(struct napi_struct *napi, int budget) |
4688 | { | 4681 | { |
4689 | struct tg3 *tp = container_of(napi, struct tg3, napi); | 4682 | struct tg3_napi *tnapi = container_of(napi, struct tg3_napi, napi); |
4683 | struct tg3 *tp = tnapi->tp; | ||
4690 | int work_done = 0; | 4684 | int work_done = 0; |
4691 | struct tg3_hw_status *sblk = tp->hw_status; | 4685 | struct tg3_hw_status *sblk = tp->hw_status; |
4692 | 4686 | ||
@@ -4770,7 +4764,7 @@ static irqreturn_t tg3_msi_1shot(int irq, void *dev_id) | |||
4770 | prefetch(&tp->rx_rcb[tp->rx_rcb_ptr]); | 4764 | prefetch(&tp->rx_rcb[tp->rx_rcb_ptr]); |
4771 | 4765 | ||
4772 | if (likely(!tg3_irq_sync(tp))) | 4766 | if (likely(!tg3_irq_sync(tp))) |
4773 | napi_schedule(&tp->napi); | 4767 | napi_schedule(&tp->napi[0].napi); |
4774 | 4768 | ||
4775 | return IRQ_HANDLED; | 4769 | return IRQ_HANDLED; |
4776 | } | 4770 | } |
@@ -4795,7 +4789,7 @@ static irqreturn_t tg3_msi(int irq, void *dev_id) | |||
4795 | */ | 4789 | */ |
4796 | tw32_mailbox(MAILBOX_INTERRUPT_0 + TG3_64BIT_REG_LOW, 0x00000001); | 4790 | tw32_mailbox(MAILBOX_INTERRUPT_0 + TG3_64BIT_REG_LOW, 0x00000001); |
4797 | if (likely(!tg3_irq_sync(tp))) | 4791 | if (likely(!tg3_irq_sync(tp))) |
4798 | napi_schedule(&tp->napi); | 4792 | napi_schedule(&tp->napi[0].napi); |
4799 | 4793 | ||
4800 | return IRQ_RETVAL(1); | 4794 | return IRQ_RETVAL(1); |
4801 | } | 4795 | } |
@@ -4837,7 +4831,7 @@ static irqreturn_t tg3_interrupt(int irq, void *dev_id) | |||
4837 | sblk->status &= ~SD_STATUS_UPDATED; | 4831 | sblk->status &= ~SD_STATUS_UPDATED; |
4838 | if (likely(tg3_has_work(tp))) { | 4832 | if (likely(tg3_has_work(tp))) { |
4839 | prefetch(&tp->rx_rcb[tp->rx_rcb_ptr]); | 4833 | prefetch(&tp->rx_rcb[tp->rx_rcb_ptr]); |
4840 | napi_schedule(&tp->napi); | 4834 | napi_schedule(&tp->napi[0].napi); |
4841 | } else { | 4835 | } else { |
4842 | /* No work, shared interrupt perhaps? re-enable | 4836 | /* No work, shared interrupt perhaps? re-enable |
4843 | * interrupts, and flush that PCI write | 4837 | * interrupts, and flush that PCI write |
@@ -4895,7 +4889,7 @@ static irqreturn_t tg3_interrupt_tagged(int irq, void *dev_id) | |||
4895 | 4889 | ||
4896 | prefetch(&tp->rx_rcb[tp->rx_rcb_ptr]); | 4890 | prefetch(&tp->rx_rcb[tp->rx_rcb_ptr]); |
4897 | 4891 | ||
4898 | napi_schedule(&tp->napi); | 4892 | napi_schedule(&tp->napi[0].napi); |
4899 | 4893 | ||
4900 | out: | 4894 | out: |
4901 | return IRQ_RETVAL(handled); | 4895 | return IRQ_RETVAL(handled); |
@@ -4936,7 +4930,7 @@ static int tg3_restart_hw(struct tg3 *tp, int reset_phy) | |||
4936 | tg3_full_unlock(tp); | 4930 | tg3_full_unlock(tp); |
4937 | del_timer_sync(&tp->timer); | 4931 | del_timer_sync(&tp->timer); |
4938 | tp->irq_sync = 0; | 4932 | tp->irq_sync = 0; |
4939 | napi_enable(&tp->napi); | 4933 | napi_enable(&tp->napi[0].napi); |
4940 | dev_close(tp->dev); | 4934 | dev_close(tp->dev); |
4941 | tg3_full_lock(tp, 0); | 4935 | tg3_full_lock(tp, 0); |
4942 | } | 4936 | } |
@@ -7935,7 +7929,7 @@ static int tg3_open(struct net_device *dev) | |||
7935 | 7929 | ||
7936 | tg3_ints_init(tp); | 7930 | tg3_ints_init(tp); |
7937 | 7931 | ||
7938 | napi_enable(&tp->napi); | 7932 | napi_enable(&tp->napi[0].napi); |
7939 | 7933 | ||
7940 | err = tg3_request_irq(tp); | 7934 | err = tg3_request_irq(tp); |
7941 | 7935 | ||
@@ -8011,7 +8005,7 @@ err_out2: | |||
8011 | free_irq(tp->pdev->irq, dev); | 8005 | free_irq(tp->pdev->irq, dev); |
8012 | 8006 | ||
8013 | err_out1: | 8007 | err_out1: |
8014 | napi_disable(&tp->napi); | 8008 | napi_disable(&tp->napi[0].napi); |
8015 | tg3_ints_fini(tp); | 8009 | tg3_ints_fini(tp); |
8016 | tg3_free_consistent(tp); | 8010 | tg3_free_consistent(tp); |
8017 | return err; | 8011 | return err; |
@@ -8252,7 +8246,7 @@ static int tg3_close(struct net_device *dev) | |||
8252 | { | 8246 | { |
8253 | struct tg3 *tp = netdev_priv(dev); | 8247 | struct tg3 *tp = netdev_priv(dev); |
8254 | 8248 | ||
8255 | napi_disable(&tp->napi); | 8249 | napi_disable(&tp->napi[0].napi); |
8256 | cancel_work_sync(&tp->reset_task); | 8250 | cancel_work_sync(&tp->reset_task); |
8257 | 8251 | ||
8258 | netif_stop_queue(dev); | 8252 | netif_stop_queue(dev); |
@@ -13396,7 +13390,8 @@ static int __devinit tg3_init_one(struct pci_dev *pdev, | |||
13396 | tp->rx_jumbo_pending = TG3_DEF_RX_JUMBO_RING_PENDING; | 13390 | tp->rx_jumbo_pending = TG3_DEF_RX_JUMBO_RING_PENDING; |
13397 | tp->tx_pending = TG3_DEF_TX_RING_PENDING; | 13391 | tp->tx_pending = TG3_DEF_TX_RING_PENDING; |
13398 | 13392 | ||
13399 | netif_napi_add(dev, &tp->napi, tg3_poll, 64); | 13393 | tp->napi[0].tp = tp; |
13394 | netif_napi_add(dev, &tp->napi[0].napi, tg3_poll, 64); | ||
13400 | dev->ethtool_ops = &tg3_ethtool_ops; | 13395 | dev->ethtool_ops = &tg3_ethtool_ops; |
13401 | dev->watchdog_timeo = TG3_TX_TIMEOUT; | 13396 | dev->watchdog_timeo = TG3_TX_TIMEOUT; |
13402 | dev->irq = pdev->irq; | 13397 | dev->irq = pdev->irq; |