diff options
author | Michael Chan <mchan@broadcom.com> | 2006-09-27 19:03:31 -0400 |
---|---|---|
committer | David S. Miller <davem@sunset.davemloft.net> | 2006-09-28 21:01:39 -0400 |
commit | 7a6f4369449a471a6e5718a87c53ac75a46960ba (patch) | |
tree | 16de5bf219d8c9730ff4ac0f4a06eb9b0e975f73 /drivers/net/tg3.c | |
parent | 126a336822a6594662f5898f1ddf33e6d048fcc7 (diff) |
[TG3]: Add tg3_poll_fw().
Put the firmware polling logic into a separate function. This makes
the code cleaner.
Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/tg3.c')
-rw-r--r-- | drivers/net/tg3.c | 54 |
1 files changed, 33 insertions, 21 deletions
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c index d443b7372325..eafca2a0dd00 100644 --- a/drivers/net/tg3.c +++ b/drivers/net/tg3.c | |||
@@ -4662,6 +4662,35 @@ static void tg3_write_sig_legacy(struct tg3 *tp, int kind) | |||
4662 | } | 4662 | } |
4663 | } | 4663 | } |
4664 | 4664 | ||
4665 | static int tg3_poll_fw(struct tg3 *tp) | ||
4666 | { | ||
4667 | int i; | ||
4668 | u32 val; | ||
4669 | |||
4670 | /* Wait for firmware initialization to complete. */ | ||
4671 | for (i = 0; i < 100000; i++) { | ||
4672 | tg3_read_mem(tp, NIC_SRAM_FIRMWARE_MBOX, &val); | ||
4673 | if (val == ~NIC_SRAM_FIRMWARE_MBOX_MAGIC1) | ||
4674 | break; | ||
4675 | udelay(10); | ||
4676 | } | ||
4677 | |||
4678 | /* Chip might not be fitted with firmware. Some Sun onboard | ||
4679 | * parts are configured like that. So don't signal the timeout | ||
4680 | * of the above loop as an error, but do report the lack of | ||
4681 | * running firmware once. | ||
4682 | */ | ||
4683 | if (i >= 100000 && | ||
4684 | !(tp->tg3_flags2 & TG3_FLG2_NO_FWARE_REPORTED)) { | ||
4685 | tp->tg3_flags2 |= TG3_FLG2_NO_FWARE_REPORTED; | ||
4686 | |||
4687 | printk(KERN_INFO PFX "%s: No firmware running.\n", | ||
4688 | tp->dev->name); | ||
4689 | } | ||
4690 | |||
4691 | return 0; | ||
4692 | } | ||
4693 | |||
4665 | static void tg3_stop_fw(struct tg3 *); | 4694 | static void tg3_stop_fw(struct tg3 *); |
4666 | 4695 | ||
4667 | /* tp->lock is held. */ | 4696 | /* tp->lock is held. */ |
@@ -4669,7 +4698,7 @@ static int tg3_chip_reset(struct tg3 *tp) | |||
4669 | { | 4698 | { |
4670 | u32 val; | 4699 | u32 val; |
4671 | void (*write_op)(struct tg3 *, u32, u32); | 4700 | void (*write_op)(struct tg3 *, u32, u32); |
4672 | int i; | 4701 | int err; |
4673 | 4702 | ||
4674 | tg3_nvram_lock(tp); | 4703 | tg3_nvram_lock(tp); |
4675 | 4704 | ||
@@ -4829,26 +4858,9 @@ static int tg3_chip_reset(struct tg3 *tp) | |||
4829 | tw32_f(MAC_MODE, 0); | 4858 | tw32_f(MAC_MODE, 0); |
4830 | udelay(40); | 4859 | udelay(40); |
4831 | 4860 | ||
4832 | /* Wait for firmware initialization to complete. */ | 4861 | err = tg3_poll_fw(tp); |
4833 | for (i = 0; i < 100000; i++) { | 4862 | if (err) |
4834 | tg3_read_mem(tp, NIC_SRAM_FIRMWARE_MBOX, &val); | 4863 | return err; |
4835 | if (val == ~NIC_SRAM_FIRMWARE_MBOX_MAGIC1) | ||
4836 | break; | ||
4837 | udelay(10); | ||
4838 | } | ||
4839 | |||
4840 | /* Chip might not be fitted with firmare. Some Sun onboard | ||
4841 | * parts are configured like that. So don't signal the timeout | ||
4842 | * of the above loop as an error, but do report the lack of | ||
4843 | * running firmware once. | ||
4844 | */ | ||
4845 | if (i >= 100000 && | ||
4846 | !(tp->tg3_flags2 & TG3_FLG2_NO_FWARE_REPORTED)) { | ||
4847 | tp->tg3_flags2 |= TG3_FLG2_NO_FWARE_REPORTED; | ||
4848 | |||
4849 | printk(KERN_INFO PFX "%s: No firmware running.\n", | ||
4850 | tp->dev->name); | ||
4851 | } | ||
4852 | 4864 | ||
4853 | if ((tp->tg3_flags2 & TG3_FLG2_PCI_EXPRESS) && | 4865 | if ((tp->tg3_flags2 & TG3_FLG2_PCI_EXPRESS) && |
4854 | tp->pci_chip_rev_id != CHIPREV_ID_5750_A0) { | 4866 | tp->pci_chip_rev_id != CHIPREV_ID_5750_A0) { |