diff options
author | Michael Chan <mchan@broadcom.com> | 2006-12-07 03:23:25 -0500 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2006-12-07 03:23:25 -0500 |
commit | 9d57f01c1331cb7bfd0a9d4f7723da5b9329394f (patch) | |
tree | bb3c2a53146500196c2707de5290bb084725e6ae /drivers/net/tg3.c | |
parent | 9f88f29fc502192824aba092e90af1297a87eb82 (diff) |
[TG3]: Use msleep.
Change some udelay() in some eeprom functions to msleep(). Eeprom
related functions are always called from sleepable context.
Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/tg3.c')
-rw-r--r-- | drivers/net/tg3.c | 14 |
1 files changed, 5 insertions, 9 deletions
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c index 0b50f1fc4e63..cfb9098c800a 100644 --- a/drivers/net/tg3.c +++ b/drivers/net/tg3.c | |||
@@ -9467,16 +9467,12 @@ static void __devinit tg3_get_5906_nvram_info(struct tg3 *tp) | |||
9467 | /* Chips other than 5700/5701 use the NVRAM for fetching info. */ | 9467 | /* Chips other than 5700/5701 use the NVRAM for fetching info. */ |
9468 | static void __devinit tg3_nvram_init(struct tg3 *tp) | 9468 | static void __devinit tg3_nvram_init(struct tg3 *tp) |
9469 | { | 9469 | { |
9470 | int j; | ||
9471 | |||
9472 | tw32_f(GRC_EEPROM_ADDR, | 9470 | tw32_f(GRC_EEPROM_ADDR, |
9473 | (EEPROM_ADDR_FSM_RESET | | 9471 | (EEPROM_ADDR_FSM_RESET | |
9474 | (EEPROM_DEFAULT_CLOCK_PERIOD << | 9472 | (EEPROM_DEFAULT_CLOCK_PERIOD << |
9475 | EEPROM_ADDR_CLKPERD_SHIFT))); | 9473 | EEPROM_ADDR_CLKPERD_SHIFT))); |
9476 | 9474 | ||
9477 | /* XXX schedule_timeout() ... */ | 9475 | msleep(1); |
9478 | for (j = 0; j < 100; j++) | ||
9479 | udelay(10); | ||
9480 | 9476 | ||
9481 | /* Enable seeprom accesses. */ | 9477 | /* Enable seeprom accesses. */ |
9482 | tw32_f(GRC_LOCAL_CTRL, | 9478 | tw32_f(GRC_LOCAL_CTRL, |
@@ -9537,12 +9533,12 @@ static int tg3_nvram_read_using_eeprom(struct tg3 *tp, | |||
9537 | EEPROM_ADDR_ADDR_MASK) | | 9533 | EEPROM_ADDR_ADDR_MASK) | |
9538 | EEPROM_ADDR_READ | EEPROM_ADDR_START); | 9534 | EEPROM_ADDR_READ | EEPROM_ADDR_START); |
9539 | 9535 | ||
9540 | for (i = 0; i < 10000; i++) { | 9536 | for (i = 0; i < 1000; i++) { |
9541 | tmp = tr32(GRC_EEPROM_ADDR); | 9537 | tmp = tr32(GRC_EEPROM_ADDR); |
9542 | 9538 | ||
9543 | if (tmp & EEPROM_ADDR_COMPLETE) | 9539 | if (tmp & EEPROM_ADDR_COMPLETE) |
9544 | break; | 9540 | break; |
9545 | udelay(100); | 9541 | msleep(1); |
9546 | } | 9542 | } |
9547 | if (!(tmp & EEPROM_ADDR_COMPLETE)) | 9543 | if (!(tmp & EEPROM_ADDR_COMPLETE)) |
9548 | return -EBUSY; | 9544 | return -EBUSY; |
@@ -9667,12 +9663,12 @@ static int tg3_nvram_write_block_using_eeprom(struct tg3 *tp, | |||
9667 | EEPROM_ADDR_START | | 9663 | EEPROM_ADDR_START | |
9668 | EEPROM_ADDR_WRITE); | 9664 | EEPROM_ADDR_WRITE); |
9669 | 9665 | ||
9670 | for (j = 0; j < 10000; j++) { | 9666 | for (j = 0; j < 1000; j++) { |
9671 | val = tr32(GRC_EEPROM_ADDR); | 9667 | val = tr32(GRC_EEPROM_ADDR); |
9672 | 9668 | ||
9673 | if (val & EEPROM_ADDR_COMPLETE) | 9669 | if (val & EEPROM_ADDR_COMPLETE) |
9674 | break; | 9670 | break; |
9675 | udelay(100); | 9671 | msleep(1); |
9676 | } | 9672 | } |
9677 | if (!(val & EEPROM_ADDR_COMPLETE)) { | 9673 | if (!(val & EEPROM_ADDR_COMPLETE)) { |
9678 | rc = -EBUSY; | 9674 | rc = -EBUSY; |