diff options
author | David S. Miller <davem@davemloft.net> | 2014-08-28 01:59:26 -0400 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2014-08-28 02:07:12 -0400 |
commit | abc4da4503bf6cb1864454b464c52959241239bd (patch) | |
tree | 144555c483489084eea908606c4ce79742380968 /drivers/net/sungem_phy.c | |
parent | 73852b2bfb743298dff9e731615ee0162b33630c (diff) |
sungem: Fix global namespace pollution of phy accessors.
The sungem driver has "phy_read()" and "phy_write()" functions, which
we need to rename because the generic phy layer is about to export
generic interfaces with the same name.
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/sungem_phy.c')
-rw-r--r-- | drivers/net/sungem_phy.c | 304 |
1 files changed, 152 insertions, 152 deletions
diff --git a/drivers/net/sungem_phy.c b/drivers/net/sungem_phy.c index ae7cd7f3656d..92578d72e4ee 100644 --- a/drivers/net/sungem_phy.c +++ b/drivers/net/sungem_phy.c | |||
@@ -47,22 +47,22 @@ static const int phy_BCM5400_link_table[8][3] = { | |||
47 | { 1, 0, 1 }, /* 1000BT */ | 47 | { 1, 0, 1 }, /* 1000BT */ |
48 | }; | 48 | }; |
49 | 49 | ||
50 | static inline int __phy_read(struct mii_phy* phy, int id, int reg) | 50 | static inline int __sungem_phy_read(struct mii_phy* phy, int id, int reg) |
51 | { | 51 | { |
52 | return phy->mdio_read(phy->dev, id, reg); | 52 | return phy->mdio_read(phy->dev, id, reg); |
53 | } | 53 | } |
54 | 54 | ||
55 | static inline void __phy_write(struct mii_phy* phy, int id, int reg, int val) | 55 | static inline void __sungem_phy_write(struct mii_phy* phy, int id, int reg, int val) |
56 | { | 56 | { |
57 | phy->mdio_write(phy->dev, id, reg, val); | 57 | phy->mdio_write(phy->dev, id, reg, val); |
58 | } | 58 | } |
59 | 59 | ||
60 | static inline int phy_read(struct mii_phy* phy, int reg) | 60 | static inline int sungem_phy_read(struct mii_phy* phy, int reg) |
61 | { | 61 | { |
62 | return phy->mdio_read(phy->dev, phy->mii_id, reg); | 62 | return phy->mdio_read(phy->dev, phy->mii_id, reg); |
63 | } | 63 | } |
64 | 64 | ||
65 | static inline void phy_write(struct mii_phy* phy, int reg, int val) | 65 | static inline void sungem_phy_write(struct mii_phy* phy, int reg, int val) |
66 | { | 66 | { |
67 | phy->mdio_write(phy->dev, phy->mii_id, reg, val); | 67 | phy->mdio_write(phy->dev, phy->mii_id, reg, val); |
68 | } | 68 | } |
@@ -72,21 +72,21 @@ static int reset_one_mii_phy(struct mii_phy* phy, int phy_id) | |||
72 | u16 val; | 72 | u16 val; |
73 | int limit = 10000; | 73 | int limit = 10000; |
74 | 74 | ||
75 | val = __phy_read(phy, phy_id, MII_BMCR); | 75 | val = __sungem_phy_read(phy, phy_id, MII_BMCR); |
76 | val &= ~(BMCR_ISOLATE | BMCR_PDOWN); | 76 | val &= ~(BMCR_ISOLATE | BMCR_PDOWN); |
77 | val |= BMCR_RESET; | 77 | val |= BMCR_RESET; |
78 | __phy_write(phy, phy_id, MII_BMCR, val); | 78 | __sungem_phy_write(phy, phy_id, MII_BMCR, val); |
79 | 79 | ||
80 | udelay(100); | 80 | udelay(100); |
81 | 81 | ||
82 | while (--limit) { | 82 | while (--limit) { |
83 | val = __phy_read(phy, phy_id, MII_BMCR); | 83 | val = __sungem_phy_read(phy, phy_id, MII_BMCR); |
84 | if ((val & BMCR_RESET) == 0) | 84 | if ((val & BMCR_RESET) == 0) |
85 | break; | 85 | break; |
86 | udelay(10); | 86 | udelay(10); |
87 | } | 87 | } |
88 | if ((val & BMCR_ISOLATE) && limit > 0) | 88 | if ((val & BMCR_ISOLATE) && limit > 0) |
89 | __phy_write(phy, phy_id, MII_BMCR, val & ~BMCR_ISOLATE); | 89 | __sungem_phy_write(phy, phy_id, MII_BMCR, val & ~BMCR_ISOLATE); |
90 | 90 | ||
91 | return limit <= 0; | 91 | return limit <= 0; |
92 | } | 92 | } |
@@ -95,19 +95,19 @@ static int bcm5201_init(struct mii_phy* phy) | |||
95 | { | 95 | { |
96 | u16 data; | 96 | u16 data; |
97 | 97 | ||
98 | data = phy_read(phy, MII_BCM5201_MULTIPHY); | 98 | data = sungem_phy_read(phy, MII_BCM5201_MULTIPHY); |
99 | data &= ~MII_BCM5201_MULTIPHY_SUPERISOLATE; | 99 | data &= ~MII_BCM5201_MULTIPHY_SUPERISOLATE; |
100 | phy_write(phy, MII_BCM5201_MULTIPHY, data); | 100 | sungem_phy_write(phy, MII_BCM5201_MULTIPHY, data); |
101 | 101 | ||
102 | phy_write(phy, MII_BCM5201_INTERRUPT, 0); | 102 | sungem_phy_write(phy, MII_BCM5201_INTERRUPT, 0); |
103 | 103 | ||
104 | return 0; | 104 | return 0; |
105 | } | 105 | } |
106 | 106 | ||
107 | static int bcm5201_suspend(struct mii_phy* phy) | 107 | static int bcm5201_suspend(struct mii_phy* phy) |
108 | { | 108 | { |
109 | phy_write(phy, MII_BCM5201_INTERRUPT, 0); | 109 | sungem_phy_write(phy, MII_BCM5201_INTERRUPT, 0); |
110 | phy_write(phy, MII_BCM5201_MULTIPHY, MII_BCM5201_MULTIPHY_SUPERISOLATE); | 110 | sungem_phy_write(phy, MII_BCM5201_MULTIPHY, MII_BCM5201_MULTIPHY_SUPERISOLATE); |
111 | 111 | ||
112 | return 0; | 112 | return 0; |
113 | } | 113 | } |
@@ -116,20 +116,20 @@ static int bcm5221_init(struct mii_phy* phy) | |||
116 | { | 116 | { |
117 | u16 data; | 117 | u16 data; |
118 | 118 | ||
119 | data = phy_read(phy, MII_BCM5221_TEST); | 119 | data = sungem_phy_read(phy, MII_BCM5221_TEST); |
120 | phy_write(phy, MII_BCM5221_TEST, | 120 | sungem_phy_write(phy, MII_BCM5221_TEST, |
121 | data | MII_BCM5221_TEST_ENABLE_SHADOWS); | 121 | data | MII_BCM5221_TEST_ENABLE_SHADOWS); |
122 | 122 | ||
123 | data = phy_read(phy, MII_BCM5221_SHDOW_AUX_STAT2); | 123 | data = sungem_phy_read(phy, MII_BCM5221_SHDOW_AUX_STAT2); |
124 | phy_write(phy, MII_BCM5221_SHDOW_AUX_STAT2, | 124 | sungem_phy_write(phy, MII_BCM5221_SHDOW_AUX_STAT2, |
125 | data | MII_BCM5221_SHDOW_AUX_STAT2_APD); | 125 | data | MII_BCM5221_SHDOW_AUX_STAT2_APD); |
126 | 126 | ||
127 | data = phy_read(phy, MII_BCM5221_SHDOW_AUX_MODE4); | 127 | data = sungem_phy_read(phy, MII_BCM5221_SHDOW_AUX_MODE4); |
128 | phy_write(phy, MII_BCM5221_SHDOW_AUX_MODE4, | 128 | sungem_phy_write(phy, MII_BCM5221_SHDOW_AUX_MODE4, |
129 | data | MII_BCM5221_SHDOW_AUX_MODE4_CLKLOPWR); | 129 | data | MII_BCM5221_SHDOW_AUX_MODE4_CLKLOPWR); |
130 | 130 | ||
131 | data = phy_read(phy, MII_BCM5221_TEST); | 131 | data = sungem_phy_read(phy, MII_BCM5221_TEST); |
132 | phy_write(phy, MII_BCM5221_TEST, | 132 | sungem_phy_write(phy, MII_BCM5221_TEST, |
133 | data & ~MII_BCM5221_TEST_ENABLE_SHADOWS); | 133 | data & ~MII_BCM5221_TEST_ENABLE_SHADOWS); |
134 | 134 | ||
135 | return 0; | 135 | return 0; |
@@ -139,12 +139,12 @@ static int bcm5221_suspend(struct mii_phy* phy) | |||
139 | { | 139 | { |
140 | u16 data; | 140 | u16 data; |
141 | 141 | ||
142 | data = phy_read(phy, MII_BCM5221_TEST); | 142 | data = sungem_phy_read(phy, MII_BCM5221_TEST); |
143 | phy_write(phy, MII_BCM5221_TEST, | 143 | sungem_phy_write(phy, MII_BCM5221_TEST, |
144 | data | MII_BCM5221_TEST_ENABLE_SHADOWS); | 144 | data | MII_BCM5221_TEST_ENABLE_SHADOWS); |
145 | 145 | ||
146 | data = phy_read(phy, MII_BCM5221_SHDOW_AUX_MODE4); | 146 | data = sungem_phy_read(phy, MII_BCM5221_SHDOW_AUX_MODE4); |
147 | phy_write(phy, MII_BCM5221_SHDOW_AUX_MODE4, | 147 | sungem_phy_write(phy, MII_BCM5221_SHDOW_AUX_MODE4, |
148 | data | MII_BCM5221_SHDOW_AUX_MODE4_IDDQMODE); | 148 | data | MII_BCM5221_SHDOW_AUX_MODE4_IDDQMODE); |
149 | 149 | ||
150 | return 0; | 150 | return 0; |
@@ -154,20 +154,20 @@ static int bcm5241_init(struct mii_phy* phy) | |||
154 | { | 154 | { |
155 | u16 data; | 155 | u16 data; |
156 | 156 | ||
157 | data = phy_read(phy, MII_BCM5221_TEST); | 157 | data = sungem_phy_read(phy, MII_BCM5221_TEST); |
158 | phy_write(phy, MII_BCM5221_TEST, | 158 | sungem_phy_write(phy, MII_BCM5221_TEST, |
159 | data | MII_BCM5221_TEST_ENABLE_SHADOWS); | 159 | data | MII_BCM5221_TEST_ENABLE_SHADOWS); |
160 | 160 | ||
161 | data = phy_read(phy, MII_BCM5221_SHDOW_AUX_STAT2); | 161 | data = sungem_phy_read(phy, MII_BCM5221_SHDOW_AUX_STAT2); |
162 | phy_write(phy, MII_BCM5221_SHDOW_AUX_STAT2, | 162 | sungem_phy_write(phy, MII_BCM5221_SHDOW_AUX_STAT2, |
163 | data | MII_BCM5221_SHDOW_AUX_STAT2_APD); | 163 | data | MII_BCM5221_SHDOW_AUX_STAT2_APD); |
164 | 164 | ||
165 | data = phy_read(phy, MII_BCM5221_SHDOW_AUX_MODE4); | 165 | data = sungem_phy_read(phy, MII_BCM5221_SHDOW_AUX_MODE4); |
166 | phy_write(phy, MII_BCM5221_SHDOW_AUX_MODE4, | 166 | sungem_phy_write(phy, MII_BCM5221_SHDOW_AUX_MODE4, |
167 | data & ~MII_BCM5241_SHDOW_AUX_MODE4_STANDBYPWR); | 167 | data & ~MII_BCM5241_SHDOW_AUX_MODE4_STANDBYPWR); |
168 | 168 | ||
169 | data = phy_read(phy, MII_BCM5221_TEST); | 169 | data = sungem_phy_read(phy, MII_BCM5221_TEST); |
170 | phy_write(phy, MII_BCM5221_TEST, | 170 | sungem_phy_write(phy, MII_BCM5221_TEST, |
171 | data & ~MII_BCM5221_TEST_ENABLE_SHADOWS); | 171 | data & ~MII_BCM5221_TEST_ENABLE_SHADOWS); |
172 | 172 | ||
173 | return 0; | 173 | return 0; |
@@ -177,12 +177,12 @@ static int bcm5241_suspend(struct mii_phy* phy) | |||
177 | { | 177 | { |
178 | u16 data; | 178 | u16 data; |
179 | 179 | ||
180 | data = phy_read(phy, MII_BCM5221_TEST); | 180 | data = sungem_phy_read(phy, MII_BCM5221_TEST); |
181 | phy_write(phy, MII_BCM5221_TEST, | 181 | sungem_phy_write(phy, MII_BCM5221_TEST, |
182 | data | MII_BCM5221_TEST_ENABLE_SHADOWS); | 182 | data | MII_BCM5221_TEST_ENABLE_SHADOWS); |
183 | 183 | ||
184 | data = phy_read(phy, MII_BCM5221_SHDOW_AUX_MODE4); | 184 | data = sungem_phy_read(phy, MII_BCM5221_SHDOW_AUX_MODE4); |
185 | phy_write(phy, MII_BCM5221_SHDOW_AUX_MODE4, | 185 | sungem_phy_write(phy, MII_BCM5221_SHDOW_AUX_MODE4, |
186 | data | MII_BCM5241_SHDOW_AUX_MODE4_STANDBYPWR); | 186 | data | MII_BCM5241_SHDOW_AUX_MODE4_STANDBYPWR); |
187 | 187 | ||
188 | return 0; | 188 | return 0; |
@@ -193,26 +193,26 @@ static int bcm5400_init(struct mii_phy* phy) | |||
193 | u16 data; | 193 | u16 data; |
194 | 194 | ||
195 | /* Configure for gigabit full duplex */ | 195 | /* Configure for gigabit full duplex */ |
196 | data = phy_read(phy, MII_BCM5400_AUXCONTROL); | 196 | data = sungem_phy_read(phy, MII_BCM5400_AUXCONTROL); |
197 | data |= MII_BCM5400_AUXCONTROL_PWR10BASET; | 197 | data |= MII_BCM5400_AUXCONTROL_PWR10BASET; |
198 | phy_write(phy, MII_BCM5400_AUXCONTROL, data); | 198 | sungem_phy_write(phy, MII_BCM5400_AUXCONTROL, data); |
199 | 199 | ||
200 | data = phy_read(phy, MII_BCM5400_GB_CONTROL); | 200 | data = sungem_phy_read(phy, MII_BCM5400_GB_CONTROL); |
201 | data |= MII_BCM5400_GB_CONTROL_FULLDUPLEXCAP; | 201 | data |= MII_BCM5400_GB_CONTROL_FULLDUPLEXCAP; |
202 | phy_write(phy, MII_BCM5400_GB_CONTROL, data); | 202 | sungem_phy_write(phy, MII_BCM5400_GB_CONTROL, data); |
203 | 203 | ||
204 | udelay(100); | 204 | udelay(100); |
205 | 205 | ||
206 | /* Reset and configure cascaded 10/100 PHY */ | 206 | /* Reset and configure cascaded 10/100 PHY */ |
207 | (void)reset_one_mii_phy(phy, 0x1f); | 207 | (void)reset_one_mii_phy(phy, 0x1f); |
208 | 208 | ||
209 | data = __phy_read(phy, 0x1f, MII_BCM5201_MULTIPHY); | 209 | data = __sungem_phy_read(phy, 0x1f, MII_BCM5201_MULTIPHY); |
210 | data |= MII_BCM5201_MULTIPHY_SERIALMODE; | 210 | data |= MII_BCM5201_MULTIPHY_SERIALMODE; |
211 | __phy_write(phy, 0x1f, MII_BCM5201_MULTIPHY, data); | 211 | __sungem_phy_write(phy, 0x1f, MII_BCM5201_MULTIPHY, data); |
212 | 212 | ||
213 | data = phy_read(phy, MII_BCM5400_AUXCONTROL); | 213 | data = sungem_phy_read(phy, MII_BCM5400_AUXCONTROL); |
214 | data &= ~MII_BCM5400_AUXCONTROL_PWR10BASET; | 214 | data &= ~MII_BCM5400_AUXCONTROL_PWR10BASET; |
215 | phy_write(phy, MII_BCM5400_AUXCONTROL, data); | 215 | sungem_phy_write(phy, MII_BCM5400_AUXCONTROL, data); |
216 | 216 | ||
217 | return 0; | 217 | return 0; |
218 | } | 218 | } |
@@ -220,7 +220,7 @@ static int bcm5400_init(struct mii_phy* phy) | |||
220 | static int bcm5400_suspend(struct mii_phy* phy) | 220 | static int bcm5400_suspend(struct mii_phy* phy) |
221 | { | 221 | { |
222 | #if 0 /* Commented out in Darwin... someone has those dawn docs ? */ | 222 | #if 0 /* Commented out in Darwin... someone has those dawn docs ? */ |
223 | phy_write(phy, MII_BMCR, BMCR_PDOWN); | 223 | sungem_phy_write(phy, MII_BMCR, BMCR_PDOWN); |
224 | #endif | 224 | #endif |
225 | return 0; | 225 | return 0; |
226 | } | 226 | } |
@@ -230,7 +230,7 @@ static int bcm5401_init(struct mii_phy* phy) | |||
230 | u16 data; | 230 | u16 data; |
231 | int rev; | 231 | int rev; |
232 | 232 | ||
233 | rev = phy_read(phy, MII_PHYSID2) & 0x000f; | 233 | rev = sungem_phy_read(phy, MII_PHYSID2) & 0x000f; |
234 | if (rev == 0 || rev == 3) { | 234 | if (rev == 0 || rev == 3) { |
235 | /* Some revisions of 5401 appear to need this | 235 | /* Some revisions of 5401 appear to need this |
236 | * initialisation sequence to disable, according | 236 | * initialisation sequence to disable, according |
@@ -243,32 +243,32 @@ static int bcm5401_init(struct mii_phy* phy) | |||
243 | * Note: This should (and does) match tg3_init_5401phy_dsp | 243 | * Note: This should (and does) match tg3_init_5401phy_dsp |
244 | * in the tg3.c driver. -DaveM | 244 | * in the tg3.c driver. -DaveM |
245 | */ | 245 | */ |
246 | phy_write(phy, 0x18, 0x0c20); | 246 | sungem_phy_write(phy, 0x18, 0x0c20); |
247 | phy_write(phy, 0x17, 0x0012); | 247 | sungem_phy_write(phy, 0x17, 0x0012); |
248 | phy_write(phy, 0x15, 0x1804); | 248 | sungem_phy_write(phy, 0x15, 0x1804); |
249 | phy_write(phy, 0x17, 0x0013); | 249 | sungem_phy_write(phy, 0x17, 0x0013); |
250 | phy_write(phy, 0x15, 0x1204); | 250 | sungem_phy_write(phy, 0x15, 0x1204); |
251 | phy_write(phy, 0x17, 0x8006); | 251 | sungem_phy_write(phy, 0x17, 0x8006); |
252 | phy_write(phy, 0x15, 0x0132); | 252 | sungem_phy_write(phy, 0x15, 0x0132); |
253 | phy_write(phy, 0x17, 0x8006); | 253 | sungem_phy_write(phy, 0x17, 0x8006); |
254 | phy_write(phy, 0x15, 0x0232); | 254 | sungem_phy_write(phy, 0x15, 0x0232); |
255 | phy_write(phy, 0x17, 0x201f); | 255 | sungem_phy_write(phy, 0x17, 0x201f); |
256 | phy_write(phy, 0x15, 0x0a20); | 256 | sungem_phy_write(phy, 0x15, 0x0a20); |
257 | } | 257 | } |
258 | 258 | ||
259 | /* Configure for gigabit full duplex */ | 259 | /* Configure for gigabit full duplex */ |
260 | data = phy_read(phy, MII_BCM5400_GB_CONTROL); | 260 | data = sungem_phy_read(phy, MII_BCM5400_GB_CONTROL); |
261 | data |= MII_BCM5400_GB_CONTROL_FULLDUPLEXCAP; | 261 | data |= MII_BCM5400_GB_CONTROL_FULLDUPLEXCAP; |
262 | phy_write(phy, MII_BCM5400_GB_CONTROL, data); | 262 | sungem_phy_write(phy, MII_BCM5400_GB_CONTROL, data); |
263 | 263 | ||
264 | udelay(10); | 264 | udelay(10); |
265 | 265 | ||
266 | /* Reset and configure cascaded 10/100 PHY */ | 266 | /* Reset and configure cascaded 10/100 PHY */ |
267 | (void)reset_one_mii_phy(phy, 0x1f); | 267 | (void)reset_one_mii_phy(phy, 0x1f); |
268 | 268 | ||
269 | data = __phy_read(phy, 0x1f, MII_BCM5201_MULTIPHY); | 269 | data = __sungem_phy_read(phy, 0x1f, MII_BCM5201_MULTIPHY); |
270 | data |= MII_BCM5201_MULTIPHY_SERIALMODE; | 270 | data |= MII_BCM5201_MULTIPHY_SERIALMODE; |
271 | __phy_write(phy, 0x1f, MII_BCM5201_MULTIPHY, data); | 271 | __sungem_phy_write(phy, 0x1f, MII_BCM5201_MULTIPHY, data); |
272 | 272 | ||
273 | return 0; | 273 | return 0; |
274 | } | 274 | } |
@@ -276,7 +276,7 @@ static int bcm5401_init(struct mii_phy* phy) | |||
276 | static int bcm5401_suspend(struct mii_phy* phy) | 276 | static int bcm5401_suspend(struct mii_phy* phy) |
277 | { | 277 | { |
278 | #if 0 /* Commented out in Darwin... someone has those dawn docs ? */ | 278 | #if 0 /* Commented out in Darwin... someone has those dawn docs ? */ |
279 | phy_write(phy, MII_BMCR, BMCR_PDOWN); | 279 | sungem_phy_write(phy, MII_BMCR, BMCR_PDOWN); |
280 | #endif | 280 | #endif |
281 | return 0; | 281 | return 0; |
282 | } | 282 | } |
@@ -288,19 +288,19 @@ static int bcm5411_init(struct mii_phy* phy) | |||
288 | /* Here's some more Apple black magic to setup | 288 | /* Here's some more Apple black magic to setup |
289 | * some voltage stuffs. | 289 | * some voltage stuffs. |
290 | */ | 290 | */ |
291 | phy_write(phy, 0x1c, 0x8c23); | 291 | sungem_phy_write(phy, 0x1c, 0x8c23); |
292 | phy_write(phy, 0x1c, 0x8ca3); | 292 | sungem_phy_write(phy, 0x1c, 0x8ca3); |
293 | phy_write(phy, 0x1c, 0x8c23); | 293 | sungem_phy_write(phy, 0x1c, 0x8c23); |
294 | 294 | ||
295 | /* Here, Apple seems to want to reset it, do | 295 | /* Here, Apple seems to want to reset it, do |
296 | * it as well | 296 | * it as well |
297 | */ | 297 | */ |
298 | phy_write(phy, MII_BMCR, BMCR_RESET); | 298 | sungem_phy_write(phy, MII_BMCR, BMCR_RESET); |
299 | phy_write(phy, MII_BMCR, 0x1340); | 299 | sungem_phy_write(phy, MII_BMCR, 0x1340); |
300 | 300 | ||
301 | data = phy_read(phy, MII_BCM5400_GB_CONTROL); | 301 | data = sungem_phy_read(phy, MII_BCM5400_GB_CONTROL); |
302 | data |= MII_BCM5400_GB_CONTROL_FULLDUPLEXCAP; | 302 | data |= MII_BCM5400_GB_CONTROL_FULLDUPLEXCAP; |
303 | phy_write(phy, MII_BCM5400_GB_CONTROL, data); | 303 | sungem_phy_write(phy, MII_BCM5400_GB_CONTROL, data); |
304 | 304 | ||
305 | udelay(10); | 305 | udelay(10); |
306 | 306 | ||
@@ -321,7 +321,7 @@ static int genmii_setup_aneg(struct mii_phy *phy, u32 advertise) | |||
321 | phy->advertising = advertise; | 321 | phy->advertising = advertise; |
322 | 322 | ||
323 | /* Setup standard advertise */ | 323 | /* Setup standard advertise */ |
324 | adv = phy_read(phy, MII_ADVERTISE); | 324 | adv = sungem_phy_read(phy, MII_ADVERTISE); |
325 | adv &= ~(ADVERTISE_ALL | ADVERTISE_100BASE4); | 325 | adv &= ~(ADVERTISE_ALL | ADVERTISE_100BASE4); |
326 | if (advertise & ADVERTISED_10baseT_Half) | 326 | if (advertise & ADVERTISED_10baseT_Half) |
327 | adv |= ADVERTISE_10HALF; | 327 | adv |= ADVERTISE_10HALF; |
@@ -331,12 +331,12 @@ static int genmii_setup_aneg(struct mii_phy *phy, u32 advertise) | |||
331 | adv |= ADVERTISE_100HALF; | 331 | adv |= ADVERTISE_100HALF; |
332 | if (advertise & ADVERTISED_100baseT_Full) | 332 | if (advertise & ADVERTISED_100baseT_Full) |
333 | adv |= ADVERTISE_100FULL; | 333 | adv |= ADVERTISE_100FULL; |
334 | phy_write(phy, MII_ADVERTISE, adv); | 334 | sungem_phy_write(phy, MII_ADVERTISE, adv); |
335 | 335 | ||
336 | /* Start/Restart aneg */ | 336 | /* Start/Restart aneg */ |
337 | ctl = phy_read(phy, MII_BMCR); | 337 | ctl = sungem_phy_read(phy, MII_BMCR); |
338 | ctl |= (BMCR_ANENABLE | BMCR_ANRESTART); | 338 | ctl |= (BMCR_ANENABLE | BMCR_ANRESTART); |
339 | phy_write(phy, MII_BMCR, ctl); | 339 | sungem_phy_write(phy, MII_BMCR, ctl); |
340 | 340 | ||
341 | return 0; | 341 | return 0; |
342 | } | 342 | } |
@@ -350,11 +350,11 @@ static int genmii_setup_forced(struct mii_phy *phy, int speed, int fd) | |||
350 | phy->duplex = fd; | 350 | phy->duplex = fd; |
351 | phy->pause = 0; | 351 | phy->pause = 0; |
352 | 352 | ||
353 | ctl = phy_read(phy, MII_BMCR); | 353 | ctl = sungem_phy_read(phy, MII_BMCR); |
354 | ctl &= ~(BMCR_FULLDPLX|BMCR_SPEED100|BMCR_ANENABLE); | 354 | ctl &= ~(BMCR_FULLDPLX|BMCR_SPEED100|BMCR_ANENABLE); |
355 | 355 | ||
356 | /* First reset the PHY */ | 356 | /* First reset the PHY */ |
357 | phy_write(phy, MII_BMCR, ctl | BMCR_RESET); | 357 | sungem_phy_write(phy, MII_BMCR, ctl | BMCR_RESET); |
358 | 358 | ||
359 | /* Select speed & duplex */ | 359 | /* Select speed & duplex */ |
360 | switch(speed) { | 360 | switch(speed) { |
@@ -369,7 +369,7 @@ static int genmii_setup_forced(struct mii_phy *phy, int speed, int fd) | |||
369 | } | 369 | } |
370 | if (fd == DUPLEX_FULL) | 370 | if (fd == DUPLEX_FULL) |
371 | ctl |= BMCR_FULLDPLX; | 371 | ctl |= BMCR_FULLDPLX; |
372 | phy_write(phy, MII_BMCR, ctl); | 372 | sungem_phy_write(phy, MII_BMCR, ctl); |
373 | 373 | ||
374 | return 0; | 374 | return 0; |
375 | } | 375 | } |
@@ -378,8 +378,8 @@ static int genmii_poll_link(struct mii_phy *phy) | |||
378 | { | 378 | { |
379 | u16 status; | 379 | u16 status; |
380 | 380 | ||
381 | (void)phy_read(phy, MII_BMSR); | 381 | (void)sungem_phy_read(phy, MII_BMSR); |
382 | status = phy_read(phy, MII_BMSR); | 382 | status = sungem_phy_read(phy, MII_BMSR); |
383 | if ((status & BMSR_LSTATUS) == 0) | 383 | if ((status & BMSR_LSTATUS) == 0) |
384 | return 0; | 384 | return 0; |
385 | if (phy->autoneg && !(status & BMSR_ANEGCOMPLETE)) | 385 | if (phy->autoneg && !(status & BMSR_ANEGCOMPLETE)) |
@@ -392,7 +392,7 @@ static int genmii_read_link(struct mii_phy *phy) | |||
392 | u16 lpa; | 392 | u16 lpa; |
393 | 393 | ||
394 | if (phy->autoneg) { | 394 | if (phy->autoneg) { |
395 | lpa = phy_read(phy, MII_LPA); | 395 | lpa = sungem_phy_read(phy, MII_LPA); |
396 | 396 | ||
397 | if (lpa & (LPA_10FULL | LPA_100FULL)) | 397 | if (lpa & (LPA_10FULL | LPA_100FULL)) |
398 | phy->duplex = DUPLEX_FULL; | 398 | phy->duplex = DUPLEX_FULL; |
@@ -413,7 +413,7 @@ static int genmii_read_link(struct mii_phy *phy) | |||
413 | 413 | ||
414 | static int generic_suspend(struct mii_phy* phy) | 414 | static int generic_suspend(struct mii_phy* phy) |
415 | { | 415 | { |
416 | phy_write(phy, MII_BMCR, BMCR_PDOWN); | 416 | sungem_phy_write(phy, MII_BMCR, BMCR_PDOWN); |
417 | 417 | ||
418 | return 0; | 418 | return 0; |
419 | } | 419 | } |
@@ -423,27 +423,27 @@ static int bcm5421_init(struct mii_phy* phy) | |||
423 | u16 data; | 423 | u16 data; |
424 | unsigned int id; | 424 | unsigned int id; |
425 | 425 | ||
426 | id = (phy_read(phy, MII_PHYSID1) << 16 | phy_read(phy, MII_PHYSID2)); | 426 | id = (sungem_phy_read(phy, MII_PHYSID1) << 16 | sungem_phy_read(phy, MII_PHYSID2)); |
427 | 427 | ||
428 | /* Revision 0 of 5421 needs some fixups */ | 428 | /* Revision 0 of 5421 needs some fixups */ |
429 | if (id == 0x002060e0) { | 429 | if (id == 0x002060e0) { |
430 | /* This is borrowed from MacOS | 430 | /* This is borrowed from MacOS |
431 | */ | 431 | */ |
432 | phy_write(phy, 0x18, 0x1007); | 432 | sungem_phy_write(phy, 0x18, 0x1007); |
433 | data = phy_read(phy, 0x18); | 433 | data = sungem_phy_read(phy, 0x18); |
434 | phy_write(phy, 0x18, data | 0x0400); | 434 | sungem_phy_write(phy, 0x18, data | 0x0400); |
435 | phy_write(phy, 0x18, 0x0007); | 435 | sungem_phy_write(phy, 0x18, 0x0007); |
436 | data = phy_read(phy, 0x18); | 436 | data = sungem_phy_read(phy, 0x18); |
437 | phy_write(phy, 0x18, data | 0x0800); | 437 | sungem_phy_write(phy, 0x18, data | 0x0800); |
438 | phy_write(phy, 0x17, 0x000a); | 438 | sungem_phy_write(phy, 0x17, 0x000a); |
439 | data = phy_read(phy, 0x15); | 439 | data = sungem_phy_read(phy, 0x15); |
440 | phy_write(phy, 0x15, data | 0x0200); | 440 | sungem_phy_write(phy, 0x15, data | 0x0200); |
441 | } | 441 | } |
442 | 442 | ||
443 | /* Pick up some init code from OF for K2 version */ | 443 | /* Pick up some init code from OF for K2 version */ |
444 | if ((id & 0xfffffff0) == 0x002062e0) { | 444 | if ((id & 0xfffffff0) == 0x002062e0) { |
445 | phy_write(phy, 4, 0x01e1); | 445 | sungem_phy_write(phy, 4, 0x01e1); |
446 | phy_write(phy, 9, 0x0300); | 446 | sungem_phy_write(phy, 9, 0x0300); |
447 | } | 447 | } |
448 | 448 | ||
449 | /* Check if we can enable automatic low power */ | 449 | /* Check if we can enable automatic low power */ |
@@ -455,9 +455,9 @@ static int bcm5421_init(struct mii_phy* phy) | |||
455 | can_low_power = 0; | 455 | can_low_power = 0; |
456 | if (can_low_power) { | 456 | if (can_low_power) { |
457 | /* Enable automatic low-power */ | 457 | /* Enable automatic low-power */ |
458 | phy_write(phy, 0x1c, 0x9002); | 458 | sungem_phy_write(phy, 0x1c, 0x9002); |
459 | phy_write(phy, 0x1c, 0xa821); | 459 | sungem_phy_write(phy, 0x1c, 0xa821); |
460 | phy_write(phy, 0x1c, 0x941d); | 460 | sungem_phy_write(phy, 0x1c, 0x941d); |
461 | } | 461 | } |
462 | } | 462 | } |
463 | #endif /* CONFIG_PPC_PMAC */ | 463 | #endif /* CONFIG_PPC_PMAC */ |
@@ -476,7 +476,7 @@ static int bcm54xx_setup_aneg(struct mii_phy *phy, u32 advertise) | |||
476 | phy->advertising = advertise; | 476 | phy->advertising = advertise; |
477 | 477 | ||
478 | /* Setup standard advertise */ | 478 | /* Setup standard advertise */ |
479 | adv = phy_read(phy, MII_ADVERTISE); | 479 | adv = sungem_phy_read(phy, MII_ADVERTISE); |
480 | adv &= ~(ADVERTISE_ALL | ADVERTISE_100BASE4); | 480 | adv &= ~(ADVERTISE_ALL | ADVERTISE_100BASE4); |
481 | if (advertise & ADVERTISED_10baseT_Half) | 481 | if (advertise & ADVERTISED_10baseT_Half) |
482 | adv |= ADVERTISE_10HALF; | 482 | adv |= ADVERTISE_10HALF; |
@@ -490,21 +490,21 @@ static int bcm54xx_setup_aneg(struct mii_phy *phy, u32 advertise) | |||
490 | adv |= ADVERTISE_PAUSE_CAP; | 490 | adv |= ADVERTISE_PAUSE_CAP; |
491 | if (advertise & ADVERTISED_Asym_Pause) | 491 | if (advertise & ADVERTISED_Asym_Pause) |
492 | adv |= ADVERTISE_PAUSE_ASYM; | 492 | adv |= ADVERTISE_PAUSE_ASYM; |
493 | phy_write(phy, MII_ADVERTISE, adv); | 493 | sungem_phy_write(phy, MII_ADVERTISE, adv); |
494 | 494 | ||
495 | /* Setup 1000BT advertise */ | 495 | /* Setup 1000BT advertise */ |
496 | adv = phy_read(phy, MII_1000BASETCONTROL); | 496 | adv = sungem_phy_read(phy, MII_1000BASETCONTROL); |
497 | adv &= ~(MII_1000BASETCONTROL_FULLDUPLEXCAP|MII_1000BASETCONTROL_HALFDUPLEXCAP); | 497 | adv &= ~(MII_1000BASETCONTROL_FULLDUPLEXCAP|MII_1000BASETCONTROL_HALFDUPLEXCAP); |
498 | if (advertise & SUPPORTED_1000baseT_Half) | 498 | if (advertise & SUPPORTED_1000baseT_Half) |
499 | adv |= MII_1000BASETCONTROL_HALFDUPLEXCAP; | 499 | adv |= MII_1000BASETCONTROL_HALFDUPLEXCAP; |
500 | if (advertise & SUPPORTED_1000baseT_Full) | 500 | if (advertise & SUPPORTED_1000baseT_Full) |
501 | adv |= MII_1000BASETCONTROL_FULLDUPLEXCAP; | 501 | adv |= MII_1000BASETCONTROL_FULLDUPLEXCAP; |
502 | phy_write(phy, MII_1000BASETCONTROL, adv); | 502 | sungem_phy_write(phy, MII_1000BASETCONTROL, adv); |
503 | 503 | ||
504 | /* Start/Restart aneg */ | 504 | /* Start/Restart aneg */ |
505 | ctl = phy_read(phy, MII_BMCR); | 505 | ctl = sungem_phy_read(phy, MII_BMCR); |
506 | ctl |= (BMCR_ANENABLE | BMCR_ANRESTART); | 506 | ctl |= (BMCR_ANENABLE | BMCR_ANRESTART); |
507 | phy_write(phy, MII_BMCR, ctl); | 507 | sungem_phy_write(phy, MII_BMCR, ctl); |
508 | 508 | ||
509 | return 0; | 509 | return 0; |
510 | } | 510 | } |
@@ -518,11 +518,11 @@ static int bcm54xx_setup_forced(struct mii_phy *phy, int speed, int fd) | |||
518 | phy->duplex = fd; | 518 | phy->duplex = fd; |
519 | phy->pause = 0; | 519 | phy->pause = 0; |
520 | 520 | ||
521 | ctl = phy_read(phy, MII_BMCR); | 521 | ctl = sungem_phy_read(phy, MII_BMCR); |
522 | ctl &= ~(BMCR_FULLDPLX|BMCR_SPEED100|BMCR_SPD2|BMCR_ANENABLE); | 522 | ctl &= ~(BMCR_FULLDPLX|BMCR_SPEED100|BMCR_SPD2|BMCR_ANENABLE); |
523 | 523 | ||
524 | /* First reset the PHY */ | 524 | /* First reset the PHY */ |
525 | phy_write(phy, MII_BMCR, ctl | BMCR_RESET); | 525 | sungem_phy_write(phy, MII_BMCR, ctl | BMCR_RESET); |
526 | 526 | ||
527 | /* Select speed & duplex */ | 527 | /* Select speed & duplex */ |
528 | switch(speed) { | 528 | switch(speed) { |
@@ -539,7 +539,7 @@ static int bcm54xx_setup_forced(struct mii_phy *phy, int speed, int fd) | |||
539 | 539 | ||
540 | // XXX Should we set the sungem to GII now on 1000BT ? | 540 | // XXX Should we set the sungem to GII now on 1000BT ? |
541 | 541 | ||
542 | phy_write(phy, MII_BMCR, ctl); | 542 | sungem_phy_write(phy, MII_BMCR, ctl); |
543 | 543 | ||
544 | return 0; | 544 | return 0; |
545 | } | 545 | } |
@@ -550,7 +550,7 @@ static int bcm54xx_read_link(struct mii_phy *phy) | |||
550 | u16 val; | 550 | u16 val; |
551 | 551 | ||
552 | if (phy->autoneg) { | 552 | if (phy->autoneg) { |
553 | val = phy_read(phy, MII_BCM5400_AUXSTATUS); | 553 | val = sungem_phy_read(phy, MII_BCM5400_AUXSTATUS); |
554 | link_mode = ((val & MII_BCM5400_AUXSTATUS_LINKMODE_MASK) >> | 554 | link_mode = ((val & MII_BCM5400_AUXSTATUS_LINKMODE_MASK) >> |
555 | MII_BCM5400_AUXSTATUS_LINKMODE_SHIFT); | 555 | MII_BCM5400_AUXSTATUS_LINKMODE_SHIFT); |
556 | phy->duplex = phy_BCM5400_link_table[link_mode][0] ? | 556 | phy->duplex = phy_BCM5400_link_table[link_mode][0] ? |
@@ -559,7 +559,7 @@ static int bcm54xx_read_link(struct mii_phy *phy) | |||
559 | SPEED_1000 : | 559 | SPEED_1000 : |
560 | (phy_BCM5400_link_table[link_mode][1] ? | 560 | (phy_BCM5400_link_table[link_mode][1] ? |
561 | SPEED_100 : SPEED_10); | 561 | SPEED_100 : SPEED_10); |
562 | val = phy_read(phy, MII_LPA); | 562 | val = sungem_phy_read(phy, MII_LPA); |
563 | phy->pause = (phy->duplex == DUPLEX_FULL) && | 563 | phy->pause = (phy->duplex == DUPLEX_FULL) && |
564 | ((val & LPA_PAUSE) != 0); | 564 | ((val & LPA_PAUSE) != 0); |
565 | } | 565 | } |
@@ -575,19 +575,19 @@ static int marvell88e1111_init(struct mii_phy* phy) | |||
575 | u16 rev; | 575 | u16 rev; |
576 | 576 | ||
577 | /* magic init sequence for rev 0 */ | 577 | /* magic init sequence for rev 0 */ |
578 | rev = phy_read(phy, MII_PHYSID2) & 0x000f; | 578 | rev = sungem_phy_read(phy, MII_PHYSID2) & 0x000f; |
579 | if (rev == 0) { | 579 | if (rev == 0) { |
580 | phy_write(phy, 0x1d, 0x000a); | 580 | sungem_phy_write(phy, 0x1d, 0x000a); |
581 | phy_write(phy, 0x1e, 0x0821); | 581 | sungem_phy_write(phy, 0x1e, 0x0821); |
582 | 582 | ||
583 | phy_write(phy, 0x1d, 0x0006); | 583 | sungem_phy_write(phy, 0x1d, 0x0006); |
584 | phy_write(phy, 0x1e, 0x8600); | 584 | sungem_phy_write(phy, 0x1e, 0x8600); |
585 | 585 | ||
586 | phy_write(phy, 0x1d, 0x000b); | 586 | sungem_phy_write(phy, 0x1d, 0x000b); |
587 | phy_write(phy, 0x1e, 0x0100); | 587 | sungem_phy_write(phy, 0x1e, 0x0100); |
588 | 588 | ||
589 | phy_write(phy, 0x1d, 0x0004); | 589 | sungem_phy_write(phy, 0x1d, 0x0004); |
590 | phy_write(phy, 0x1e, 0x4850); | 590 | sungem_phy_write(phy, 0x1e, 0x4850); |
591 | } | 591 | } |
592 | return 0; | 592 | return 0; |
593 | } | 593 | } |
@@ -600,8 +600,8 @@ static int bcm5421_poll_link(struct mii_phy* phy) | |||
600 | int mode; | 600 | int mode; |
601 | 601 | ||
602 | /* find out in what mode we are */ | 602 | /* find out in what mode we are */ |
603 | phy_write(phy, MII_NCONFIG, 0x1000); | 603 | sungem_phy_write(phy, MII_NCONFIG, 0x1000); |
604 | phy_reg = phy_read(phy, MII_NCONFIG); | 604 | phy_reg = sungem_phy_read(phy, MII_NCONFIG); |
605 | 605 | ||
606 | mode = (phy_reg & BCM5421_MODE_MASK) >> 5; | 606 | mode = (phy_reg & BCM5421_MODE_MASK) >> 5; |
607 | 607 | ||
@@ -609,8 +609,8 @@ static int bcm5421_poll_link(struct mii_phy* phy) | |||
609 | return genmii_poll_link(phy); | 609 | return genmii_poll_link(phy); |
610 | 610 | ||
611 | /* try to find out whether we have a link */ | 611 | /* try to find out whether we have a link */ |
612 | phy_write(phy, MII_NCONFIG, 0x2000); | 612 | sungem_phy_write(phy, MII_NCONFIG, 0x2000); |
613 | phy_reg = phy_read(phy, MII_NCONFIG); | 613 | phy_reg = sungem_phy_read(phy, MII_NCONFIG); |
614 | 614 | ||
615 | if (phy_reg & 0x0020) | 615 | if (phy_reg & 0x0020) |
616 | return 0; | 616 | return 0; |
@@ -624,8 +624,8 @@ static int bcm5421_read_link(struct mii_phy* phy) | |||
624 | int mode; | 624 | int mode; |
625 | 625 | ||
626 | /* find out in what mode we are */ | 626 | /* find out in what mode we are */ |
627 | phy_write(phy, MII_NCONFIG, 0x1000); | 627 | sungem_phy_write(phy, MII_NCONFIG, 0x1000); |
628 | phy_reg = phy_read(phy, MII_NCONFIG); | 628 | phy_reg = sungem_phy_read(phy, MII_NCONFIG); |
629 | 629 | ||
630 | mode = (phy_reg & BCM5421_MODE_MASK ) >> 5; | 630 | mode = (phy_reg & BCM5421_MODE_MASK ) >> 5; |
631 | 631 | ||
@@ -635,8 +635,8 @@ static int bcm5421_read_link(struct mii_phy* phy) | |||
635 | phy->speed = SPEED_1000; | 635 | phy->speed = SPEED_1000; |
636 | 636 | ||
637 | /* find out whether we are running half- or full duplex */ | 637 | /* find out whether we are running half- or full duplex */ |
638 | phy_write(phy, MII_NCONFIG, 0x2000); | 638 | sungem_phy_write(phy, MII_NCONFIG, 0x2000); |
639 | phy_reg = phy_read(phy, MII_NCONFIG); | 639 | phy_reg = sungem_phy_read(phy, MII_NCONFIG); |
640 | 640 | ||
641 | if ( (phy_reg & 0x0080) >> 7) | 641 | if ( (phy_reg & 0x0080) >> 7) |
642 | phy->duplex |= DUPLEX_HALF; | 642 | phy->duplex |= DUPLEX_HALF; |
@@ -649,14 +649,14 @@ static int bcm5421_read_link(struct mii_phy* phy) | |||
649 | static int bcm5421_enable_fiber(struct mii_phy* phy, int autoneg) | 649 | static int bcm5421_enable_fiber(struct mii_phy* phy, int autoneg) |
650 | { | 650 | { |
651 | /* enable fiber mode */ | 651 | /* enable fiber mode */ |
652 | phy_write(phy, MII_NCONFIG, 0x9020); | 652 | sungem_phy_write(phy, MII_NCONFIG, 0x9020); |
653 | /* LEDs active in both modes, autosense prio = fiber */ | 653 | /* LEDs active in both modes, autosense prio = fiber */ |
654 | phy_write(phy, MII_NCONFIG, 0x945f); | 654 | sungem_phy_write(phy, MII_NCONFIG, 0x945f); |
655 | 655 | ||
656 | if (!autoneg) { | 656 | if (!autoneg) { |
657 | /* switch off fibre autoneg */ | 657 | /* switch off fibre autoneg */ |
658 | phy_write(phy, MII_NCONFIG, 0xfc01); | 658 | sungem_phy_write(phy, MII_NCONFIG, 0xfc01); |
659 | phy_write(phy, 0x0b, 0x0004); | 659 | sungem_phy_write(phy, 0x0b, 0x0004); |
660 | } | 660 | } |
661 | 661 | ||
662 | phy->autoneg = autoneg; | 662 | phy->autoneg = autoneg; |
@@ -673,8 +673,8 @@ static int bcm5461_poll_link(struct mii_phy* phy) | |||
673 | int mode; | 673 | int mode; |
674 | 674 | ||
675 | /* find out in what mode we are */ | 675 | /* find out in what mode we are */ |
676 | phy_write(phy, MII_NCONFIG, 0x7c00); | 676 | sungem_phy_write(phy, MII_NCONFIG, 0x7c00); |
677 | phy_reg = phy_read(phy, MII_NCONFIG); | 677 | phy_reg = sungem_phy_read(phy, MII_NCONFIG); |
678 | 678 | ||
679 | mode = (phy_reg & BCM5461_MODE_MASK ) >> 1; | 679 | mode = (phy_reg & BCM5461_MODE_MASK ) >> 1; |
680 | 680 | ||
@@ -682,8 +682,8 @@ static int bcm5461_poll_link(struct mii_phy* phy) | |||
682 | return genmii_poll_link(phy); | 682 | return genmii_poll_link(phy); |
683 | 683 | ||
684 | /* find out whether we have a link */ | 684 | /* find out whether we have a link */ |
685 | phy_write(phy, MII_NCONFIG, 0x7000); | 685 | sungem_phy_write(phy, MII_NCONFIG, 0x7000); |
686 | phy_reg = phy_read(phy, MII_NCONFIG); | 686 | phy_reg = sungem_phy_read(phy, MII_NCONFIG); |
687 | 687 | ||
688 | if (phy_reg & BCM5461_FIBER_LINK) | 688 | if (phy_reg & BCM5461_FIBER_LINK) |
689 | return 1; | 689 | return 1; |
@@ -699,8 +699,8 @@ static int bcm5461_read_link(struct mii_phy* phy) | |||
699 | int mode; | 699 | int mode; |
700 | 700 | ||
701 | /* find out in what mode we are */ | 701 | /* find out in what mode we are */ |
702 | phy_write(phy, MII_NCONFIG, 0x7c00); | 702 | sungem_phy_write(phy, MII_NCONFIG, 0x7c00); |
703 | phy_reg = phy_read(phy, MII_NCONFIG); | 703 | phy_reg = sungem_phy_read(phy, MII_NCONFIG); |
704 | 704 | ||
705 | mode = (phy_reg & BCM5461_MODE_MASK ) >> 1; | 705 | mode = (phy_reg & BCM5461_MODE_MASK ) >> 1; |
706 | 706 | ||
@@ -711,8 +711,8 @@ static int bcm5461_read_link(struct mii_phy* phy) | |||
711 | phy->speed = SPEED_1000; | 711 | phy->speed = SPEED_1000; |
712 | 712 | ||
713 | /* find out whether we are running half- or full duplex */ | 713 | /* find out whether we are running half- or full duplex */ |
714 | phy_write(phy, MII_NCONFIG, 0x7000); | 714 | sungem_phy_write(phy, MII_NCONFIG, 0x7000); |
715 | phy_reg = phy_read(phy, MII_NCONFIG); | 715 | phy_reg = sungem_phy_read(phy, MII_NCONFIG); |
716 | 716 | ||
717 | if (phy_reg & BCM5461_FIBER_DUPLEX) | 717 | if (phy_reg & BCM5461_FIBER_DUPLEX) |
718 | phy->duplex |= DUPLEX_FULL; | 718 | phy->duplex |= DUPLEX_FULL; |
@@ -725,15 +725,15 @@ static int bcm5461_read_link(struct mii_phy* phy) | |||
725 | static int bcm5461_enable_fiber(struct mii_phy* phy, int autoneg) | 725 | static int bcm5461_enable_fiber(struct mii_phy* phy, int autoneg) |
726 | { | 726 | { |
727 | /* select fiber mode, enable 1000 base-X registers */ | 727 | /* select fiber mode, enable 1000 base-X registers */ |
728 | phy_write(phy, MII_NCONFIG, 0xfc0b); | 728 | sungem_phy_write(phy, MII_NCONFIG, 0xfc0b); |
729 | 729 | ||
730 | if (autoneg) { | 730 | if (autoneg) { |
731 | /* enable fiber with no autonegotiation */ | 731 | /* enable fiber with no autonegotiation */ |
732 | phy_write(phy, MII_ADVERTISE, 0x01e0); | 732 | sungem_phy_write(phy, MII_ADVERTISE, 0x01e0); |
733 | phy_write(phy, MII_BMCR, 0x1140); | 733 | sungem_phy_write(phy, MII_BMCR, 0x1140); |
734 | } else { | 734 | } else { |
735 | /* enable fiber with autonegotiation */ | 735 | /* enable fiber with autonegotiation */ |
736 | phy_write(phy, MII_BMCR, 0x0140); | 736 | sungem_phy_write(phy, MII_BMCR, 0x0140); |
737 | } | 737 | } |
738 | 738 | ||
739 | phy->autoneg = autoneg; | 739 | phy->autoneg = autoneg; |
@@ -752,7 +752,7 @@ static int marvell_setup_aneg(struct mii_phy *phy, u32 advertise) | |||
752 | phy->advertising = advertise; | 752 | phy->advertising = advertise; |
753 | 753 | ||
754 | /* Setup standard advertise */ | 754 | /* Setup standard advertise */ |
755 | adv = phy_read(phy, MII_ADVERTISE); | 755 | adv = sungem_phy_read(phy, MII_ADVERTISE); |
756 | adv &= ~(ADVERTISE_ALL | ADVERTISE_100BASE4); | 756 | adv &= ~(ADVERTISE_ALL | ADVERTISE_100BASE4); |
757 | if (advertise & ADVERTISED_10baseT_Half) | 757 | if (advertise & ADVERTISED_10baseT_Half) |
758 | adv |= ADVERTISE_10HALF; | 758 | adv |= ADVERTISE_10HALF; |
@@ -766,7 +766,7 @@ static int marvell_setup_aneg(struct mii_phy *phy, u32 advertise) | |||
766 | adv |= ADVERTISE_PAUSE_CAP; | 766 | adv |= ADVERTISE_PAUSE_CAP; |
767 | if (advertise & ADVERTISED_Asym_Pause) | 767 | if (advertise & ADVERTISED_Asym_Pause) |
768 | adv |= ADVERTISE_PAUSE_ASYM; | 768 | adv |= ADVERTISE_PAUSE_ASYM; |
769 | phy_write(phy, MII_ADVERTISE, adv); | 769 | sungem_phy_write(phy, MII_ADVERTISE, adv); |
770 | 770 | ||
771 | /* Setup 1000BT advertise & enable crossover detect | 771 | /* Setup 1000BT advertise & enable crossover detect |
772 | * XXX How do we advertise 1000BT ? Darwin source is | 772 | * XXX How do we advertise 1000BT ? Darwin source is |
@@ -774,7 +774,7 @@ static int marvell_setup_aneg(struct mii_phy *phy, u32 advertise) | |||
774 | * write to control... Someone has specs for those | 774 | * write to control... Someone has specs for those |
775 | * beasts ? | 775 | * beasts ? |
776 | */ | 776 | */ |
777 | adv = phy_read(phy, MII_M1011_PHY_SPEC_CONTROL); | 777 | adv = sungem_phy_read(phy, MII_M1011_PHY_SPEC_CONTROL); |
778 | adv |= MII_M1011_PHY_SPEC_CONTROL_AUTO_MDIX; | 778 | adv |= MII_M1011_PHY_SPEC_CONTROL_AUTO_MDIX; |
779 | adv &= ~(MII_1000BASETCONTROL_FULLDUPLEXCAP | | 779 | adv &= ~(MII_1000BASETCONTROL_FULLDUPLEXCAP | |
780 | MII_1000BASETCONTROL_HALFDUPLEXCAP); | 780 | MII_1000BASETCONTROL_HALFDUPLEXCAP); |
@@ -782,12 +782,12 @@ static int marvell_setup_aneg(struct mii_phy *phy, u32 advertise) | |||
782 | adv |= MII_1000BASETCONTROL_HALFDUPLEXCAP; | 782 | adv |= MII_1000BASETCONTROL_HALFDUPLEXCAP; |
783 | if (advertise & SUPPORTED_1000baseT_Full) | 783 | if (advertise & SUPPORTED_1000baseT_Full) |
784 | adv |= MII_1000BASETCONTROL_FULLDUPLEXCAP; | 784 | adv |= MII_1000BASETCONTROL_FULLDUPLEXCAP; |
785 | phy_write(phy, MII_1000BASETCONTROL, adv); | 785 | sungem_phy_write(phy, MII_1000BASETCONTROL, adv); |
786 | 786 | ||
787 | /* Start/Restart aneg */ | 787 | /* Start/Restart aneg */ |
788 | ctl = phy_read(phy, MII_BMCR); | 788 | ctl = sungem_phy_read(phy, MII_BMCR); |
789 | ctl |= (BMCR_ANENABLE | BMCR_ANRESTART); | 789 | ctl |= (BMCR_ANENABLE | BMCR_ANRESTART); |
790 | phy_write(phy, MII_BMCR, ctl); | 790 | sungem_phy_write(phy, MII_BMCR, ctl); |
791 | 791 | ||
792 | return 0; | 792 | return 0; |
793 | } | 793 | } |
@@ -801,7 +801,7 @@ static int marvell_setup_forced(struct mii_phy *phy, int speed, int fd) | |||
801 | phy->duplex = fd; | 801 | phy->duplex = fd; |
802 | phy->pause = 0; | 802 | phy->pause = 0; |
803 | 803 | ||
804 | ctl = phy_read(phy, MII_BMCR); | 804 | ctl = sungem_phy_read(phy, MII_BMCR); |
805 | ctl &= ~(BMCR_FULLDPLX|BMCR_SPEED100|BMCR_SPD2|BMCR_ANENABLE); | 805 | ctl &= ~(BMCR_FULLDPLX|BMCR_SPEED100|BMCR_SPD2|BMCR_ANENABLE); |
806 | ctl |= BMCR_RESET; | 806 | ctl |= BMCR_RESET; |
807 | 807 | ||
@@ -824,7 +824,7 @@ static int marvell_setup_forced(struct mii_phy *phy, int speed, int fd) | |||
824 | /* Disable crossover. Again, the way Apple does it is strange, | 824 | /* Disable crossover. Again, the way Apple does it is strange, |
825 | * though I don't assume they are wrong ;) | 825 | * though I don't assume they are wrong ;) |
826 | */ | 826 | */ |
827 | ctl2 = phy_read(phy, MII_M1011_PHY_SPEC_CONTROL); | 827 | ctl2 = sungem_phy_read(phy, MII_M1011_PHY_SPEC_CONTROL); |
828 | ctl2 &= ~(MII_M1011_PHY_SPEC_CONTROL_MANUAL_MDIX | | 828 | ctl2 &= ~(MII_M1011_PHY_SPEC_CONTROL_MANUAL_MDIX | |
829 | MII_M1011_PHY_SPEC_CONTROL_AUTO_MDIX | | 829 | MII_M1011_PHY_SPEC_CONTROL_AUTO_MDIX | |
830 | MII_1000BASETCONTROL_FULLDUPLEXCAP | | 830 | MII_1000BASETCONTROL_FULLDUPLEXCAP | |
@@ -833,11 +833,11 @@ static int marvell_setup_forced(struct mii_phy *phy, int speed, int fd) | |||
833 | ctl2 |= (fd == DUPLEX_FULL) ? | 833 | ctl2 |= (fd == DUPLEX_FULL) ? |
834 | MII_1000BASETCONTROL_FULLDUPLEXCAP : | 834 | MII_1000BASETCONTROL_FULLDUPLEXCAP : |
835 | MII_1000BASETCONTROL_HALFDUPLEXCAP; | 835 | MII_1000BASETCONTROL_HALFDUPLEXCAP; |
836 | phy_write(phy, MII_1000BASETCONTROL, ctl2); | 836 | sungem_phy_write(phy, MII_1000BASETCONTROL, ctl2); |
837 | 837 | ||
838 | // XXX Should we set the sungem to GII now on 1000BT ? | 838 | // XXX Should we set the sungem to GII now on 1000BT ? |
839 | 839 | ||
840 | phy_write(phy, MII_BMCR, ctl); | 840 | sungem_phy_write(phy, MII_BMCR, ctl); |
841 | 841 | ||
842 | return 0; | 842 | return 0; |
843 | } | 843 | } |
@@ -847,7 +847,7 @@ static int marvell_read_link(struct mii_phy *phy) | |||
847 | u16 status, pmask; | 847 | u16 status, pmask; |
848 | 848 | ||
849 | if (phy->autoneg) { | 849 | if (phy->autoneg) { |
850 | status = phy_read(phy, MII_M1011_PHY_SPEC_STATUS); | 850 | status = sungem_phy_read(phy, MII_M1011_PHY_SPEC_STATUS); |
851 | if ((status & MII_M1011_PHY_SPEC_STATUS_RESOLVED) == 0) | 851 | if ((status & MII_M1011_PHY_SPEC_STATUS_RESOLVED) == 0) |
852 | return -EAGAIN; | 852 | return -EAGAIN; |
853 | if (status & MII_M1011_PHY_SPEC_STATUS_1000) | 853 | if (status & MII_M1011_PHY_SPEC_STATUS_1000) |
@@ -1174,7 +1174,7 @@ int sungem_phy_probe(struct mii_phy *phy, int mii_id) | |||
1174 | goto fail; | 1174 | goto fail; |
1175 | 1175 | ||
1176 | /* Read ID and find matching entry */ | 1176 | /* Read ID and find matching entry */ |
1177 | id = (phy_read(phy, MII_PHYSID1) << 16 | phy_read(phy, MII_PHYSID2)); | 1177 | id = (sungem_phy_read(phy, MII_PHYSID1) << 16 | sungem_phy_read(phy, MII_PHYSID2)); |
1178 | printk(KERN_DEBUG KBUILD_MODNAME ": " "PHY ID: %x, addr: %x\n", | 1178 | printk(KERN_DEBUG KBUILD_MODNAME ": " "PHY ID: %x, addr: %x\n", |
1179 | id, mii_id); | 1179 | id, mii_id); |
1180 | for (i=0; (def = mii_phy_table[i]) != NULL; i++) | 1180 | for (i=0; (def = mii_phy_table[i]) != NULL; i++) |