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authoravisconti <armando.visconti@st.com>2010-10-25 14:58:14 -0400
committerDavid S. Miller <davem@davemloft.net>2010-10-28 14:47:54 -0400
commit19449bfc10d163f0024dd5ae5808e28cda32e7b4 (patch)
treeb32bcc4f66ac12f1a6c94d73a0ada36412cfa8a7 /drivers/net/stmmac
parentd1abc9a9aca06ceb795eb5405264eaafe016ec5c (diff)
stmmac: enable/disable rx/tx in the core with a single write.
This patch enables and disables the rx and tx bits in the MAC control reg by using a single write operation. This also solves a possible problem (spotted on SPEAr platforms) at 10Mbps where two consecutive writes to a MAC control register can take more than 4 phy_clk cycles. Signed-off-by: Armando Visconti <armando.visconti@st.com> Acked-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/stmmac')
-rw-r--r--drivers/net/stmmac/stmmac_main.c40
1 files changed, 10 insertions, 30 deletions
diff --git a/drivers/net/stmmac/stmmac_main.c b/drivers/net/stmmac/stmmac_main.c
index 823b9e6431d5..06bc6034ce81 100644
--- a/drivers/net/stmmac/stmmac_main.c
+++ b/drivers/net/stmmac/stmmac_main.c
@@ -337,33 +337,19 @@ static int stmmac_init_phy(struct net_device *dev)
337 return 0; 337 return 0;
338} 338}
339 339
340static inline void stmmac_mac_enable_rx(void __iomem *ioaddr) 340static inline void stmmac_enable_mac(void __iomem *ioaddr)
341{ 341{
342 u32 value = readl(ioaddr + MAC_CTRL_REG); 342 u32 value = readl(ioaddr + MAC_CTRL_REG);
343 value |= MAC_RNABLE_RX;
344 /* Set the RE (receive enable bit into the MAC CTRL register). */
345 writel(value, ioaddr + MAC_CTRL_REG);
346}
347 343
348static inline void stmmac_mac_enable_tx(void __iomem *ioaddr) 344 value |= MAC_RNABLE_RX | MAC_ENABLE_TX;
349{
350 u32 value = readl(ioaddr + MAC_CTRL_REG);
351 value |= MAC_ENABLE_TX;
352 /* Set the TE (transmit enable bit into the MAC CTRL register). */
353 writel(value, ioaddr + MAC_CTRL_REG); 345 writel(value, ioaddr + MAC_CTRL_REG);
354} 346}
355 347
356static inline void stmmac_mac_disable_rx(void __iomem *ioaddr) 348static inline void stmmac_disable_mac(void __iomem *ioaddr)
357{ 349{
358 u32 value = readl(ioaddr + MAC_CTRL_REG); 350 u32 value = readl(ioaddr + MAC_CTRL_REG);
359 value &= ~MAC_RNABLE_RX;
360 writel(value, ioaddr + MAC_CTRL_REG);
361}
362 351
363static inline void stmmac_mac_disable_tx(void __iomem *ioaddr) 352 value &= ~(MAC_ENABLE_TX | MAC_RNABLE_RX);
364{
365 u32 value = readl(ioaddr + MAC_CTRL_REG);
366 value &= ~MAC_ENABLE_TX;
367 writel(value, ioaddr + MAC_CTRL_REG); 353 writel(value, ioaddr + MAC_CTRL_REG);
368} 354}
369 355
@@ -857,8 +843,7 @@ static int stmmac_open(struct net_device *dev)
857 writel(0xffffffff, priv->ioaddr + MMC_LOW_INTR_MASK); 843 writel(0xffffffff, priv->ioaddr + MMC_LOW_INTR_MASK);
858 844
859 /* Enable the MAC Rx/Tx */ 845 /* Enable the MAC Rx/Tx */
860 stmmac_mac_enable_rx(priv->ioaddr); 846 stmmac_enable_mac(priv->ioaddr);
861 stmmac_mac_enable_tx(priv->ioaddr);
862 847
863 /* Set the HW DMA mode and the COE */ 848 /* Set the HW DMA mode and the COE */
864 stmmac_dma_operation_mode(priv); 849 stmmac_dma_operation_mode(priv);
@@ -928,9 +913,8 @@ static int stmmac_release(struct net_device *dev)
928 /* Release and free the Rx/Tx resources */ 913 /* Release and free the Rx/Tx resources */
929 free_dma_desc_resources(priv); 914 free_dma_desc_resources(priv);
930 915
931 /* Disable the MAC core */ 916 /* Disable the MAC Rx/Tx */
932 stmmac_mac_disable_tx(priv->ioaddr); 917 stmmac_disable_mac(priv->ioaddr);
933 stmmac_mac_disable_rx(priv->ioaddr);
934 918
935 netif_carrier_off(dev); 919 netif_carrier_off(dev);
936 920
@@ -1787,8 +1771,7 @@ static int stmmac_dvr_remove(struct platform_device *pdev)
1787 priv->hw->dma->stop_rx(priv->ioaddr); 1771 priv->hw->dma->stop_rx(priv->ioaddr);
1788 priv->hw->dma->stop_tx(priv->ioaddr); 1772 priv->hw->dma->stop_tx(priv->ioaddr);
1789 1773
1790 stmmac_mac_disable_rx(priv->ioaddr); 1774 stmmac_disable_mac(priv->ioaddr);
1791 stmmac_mac_disable_tx(priv->ioaddr);
1792 1775
1793 netif_carrier_off(ndev); 1776 netif_carrier_off(ndev);
1794 1777
@@ -1839,13 +1822,11 @@ static int stmmac_suspend(struct platform_device *pdev, pm_message_t state)
1839 dis_ic); 1822 dis_ic);
1840 priv->hw->desc->init_tx_desc(priv->dma_tx, priv->dma_tx_size); 1823 priv->hw->desc->init_tx_desc(priv->dma_tx, priv->dma_tx_size);
1841 1824
1842 stmmac_mac_disable_tx(priv->ioaddr);
1843
1844 /* Enable Power down mode by programming the PMT regs */ 1825 /* Enable Power down mode by programming the PMT regs */
1845 if (device_can_wakeup(priv->device)) 1826 if (device_can_wakeup(priv->device))
1846 priv->hw->mac->pmt(priv->ioaddr, priv->wolopts); 1827 priv->hw->mac->pmt(priv->ioaddr, priv->wolopts);
1847 else 1828 else
1848 stmmac_mac_disable_rx(priv->ioaddr); 1829 stmmac_disable_mac(priv->ioaddr);
1849 } else { 1830 } else {
1850 priv->shutdown = 1; 1831 priv->shutdown = 1;
1851 /* Although this can appear slightly redundant it actually 1832 /* Although this can appear slightly redundant it actually
@@ -1886,8 +1867,7 @@ static int stmmac_resume(struct platform_device *pdev)
1886 netif_device_attach(dev); 1867 netif_device_attach(dev);
1887 1868
1888 /* Enable the MAC and DMA */ 1869 /* Enable the MAC and DMA */
1889 stmmac_mac_enable_rx(priv->ioaddr); 1870 stmmac_enable_mac(priv->ioaddr);
1890 stmmac_mac_enable_tx(priv->ioaddr);
1891 priv->hw->dma->start_tx(priv->ioaddr); 1871 priv->hw->dma->start_tx(priv->ioaddr);
1892 priv->hw->dma->start_rx(priv->ioaddr); 1872 priv->hw->dma->start_rx(priv->ioaddr);
1893 1873