diff options
| author | Giuseppe CAVALLARO <peppe.cavallaro@st.com> | 2010-08-23 16:40:42 -0400 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2010-08-25 19:30:51 -0400 |
| commit | ad01b7d480a4a135f974afd5c617c417e0b0542f (patch) | |
| tree | bd69865fb4bb323e697d46c8b0365ec1774a9696 /drivers/net/stmmac/stmmac_mdio.c | |
| parent | ac75791aa943c7953521cb4fa7728bf51f9abd2d (diff) | |
stmmac: make ioaddr 'void __iomem *' rather than unsigned long
This avoids unnecessary casting and adds the ioaddr in the
private structure.
This patch also removes many warning when compile the driver.
Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/stmmac/stmmac_mdio.c')
| -rw-r--r-- | drivers/net/stmmac/stmmac_mdio.c | 21 |
1 files changed, 9 insertions, 12 deletions
diff --git a/drivers/net/stmmac/stmmac_mdio.c b/drivers/net/stmmac/stmmac_mdio.c index 40b2c7929719..03dea1401571 100644 --- a/drivers/net/stmmac/stmmac_mdio.c +++ b/drivers/net/stmmac/stmmac_mdio.c | |||
| @@ -47,7 +47,6 @@ static int stmmac_mdio_read(struct mii_bus *bus, int phyaddr, int phyreg) | |||
| 47 | { | 47 | { |
| 48 | struct net_device *ndev = bus->priv; | 48 | struct net_device *ndev = bus->priv; |
| 49 | struct stmmac_priv *priv = netdev_priv(ndev); | 49 | struct stmmac_priv *priv = netdev_priv(ndev); |
| 50 | unsigned long ioaddr = ndev->base_addr; | ||
| 51 | unsigned int mii_address = priv->hw->mii.addr; | 50 | unsigned int mii_address = priv->hw->mii.addr; |
| 52 | unsigned int mii_data = priv->hw->mii.data; | 51 | unsigned int mii_data = priv->hw->mii.data; |
| 53 | 52 | ||
| @@ -56,12 +55,12 @@ static int stmmac_mdio_read(struct mii_bus *bus, int phyaddr, int phyreg) | |||
| 56 | ((phyreg << 6) & (0x000007C0))); | 55 | ((phyreg << 6) & (0x000007C0))); |
| 57 | regValue |= MII_BUSY; /* in case of GMAC */ | 56 | regValue |= MII_BUSY; /* in case of GMAC */ |
| 58 | 57 | ||
| 59 | do {} while (((readl(ioaddr + mii_address)) & MII_BUSY) == 1); | 58 | do {} while (((readl(priv->ioaddr + mii_address)) & MII_BUSY) == 1); |
| 60 | writel(regValue, ioaddr + mii_address); | 59 | writel(regValue, priv->ioaddr + mii_address); |
| 61 | do {} while (((readl(ioaddr + mii_address)) & MII_BUSY) == 1); | 60 | do {} while (((readl(priv->ioaddr + mii_address)) & MII_BUSY) == 1); |
| 62 | 61 | ||
| 63 | /* Read the data from the MII data register */ | 62 | /* Read the data from the MII data register */ |
| 64 | data = (int)readl(ioaddr + mii_data); | 63 | data = (int)readl(priv->ioaddr + mii_data); |
| 65 | 64 | ||
| 66 | return data; | 65 | return data; |
| 67 | } | 66 | } |
| @@ -79,7 +78,6 @@ static int stmmac_mdio_write(struct mii_bus *bus, int phyaddr, int phyreg, | |||
| 79 | { | 78 | { |
| 80 | struct net_device *ndev = bus->priv; | 79 | struct net_device *ndev = bus->priv; |
| 81 | struct stmmac_priv *priv = netdev_priv(ndev); | 80 | struct stmmac_priv *priv = netdev_priv(ndev); |
| 82 | unsigned long ioaddr = ndev->base_addr; | ||
| 83 | unsigned int mii_address = priv->hw->mii.addr; | 81 | unsigned int mii_address = priv->hw->mii.addr; |
| 84 | unsigned int mii_data = priv->hw->mii.data; | 82 | unsigned int mii_data = priv->hw->mii.data; |
| 85 | 83 | ||
| @@ -90,14 +88,14 @@ static int stmmac_mdio_write(struct mii_bus *bus, int phyaddr, int phyreg, | |||
| 90 | value |= MII_BUSY; | 88 | value |= MII_BUSY; |
| 91 | 89 | ||
| 92 | /* Wait until any existing MII operation is complete */ | 90 | /* Wait until any existing MII operation is complete */ |
| 93 | do {} while (((readl(ioaddr + mii_address)) & MII_BUSY) == 1); | 91 | do {} while (((readl(priv->ioaddr + mii_address)) & MII_BUSY) == 1); |
| 94 | 92 | ||
| 95 | /* Set the MII address register to write */ | 93 | /* Set the MII address register to write */ |
| 96 | writel(phydata, ioaddr + mii_data); | 94 | writel(phydata, priv->ioaddr + mii_data); |
| 97 | writel(value, ioaddr + mii_address); | 95 | writel(value, priv->ioaddr + mii_address); |
| 98 | 96 | ||
| 99 | /* Wait until any existing MII operation is complete */ | 97 | /* Wait until any existing MII operation is complete */ |
| 100 | do {} while (((readl(ioaddr + mii_address)) & MII_BUSY) == 1); | 98 | do {} while (((readl(priv->ioaddr + mii_address)) & MII_BUSY) == 1); |
| 101 | 99 | ||
| 102 | return 0; | 100 | return 0; |
| 103 | } | 101 | } |
| @@ -111,7 +109,6 @@ static int stmmac_mdio_reset(struct mii_bus *bus) | |||
| 111 | { | 109 | { |
| 112 | struct net_device *ndev = bus->priv; | 110 | struct net_device *ndev = bus->priv; |
| 113 | struct stmmac_priv *priv = netdev_priv(ndev); | 111 | struct stmmac_priv *priv = netdev_priv(ndev); |
| 114 | unsigned long ioaddr = ndev->base_addr; | ||
| 115 | unsigned int mii_address = priv->hw->mii.addr; | 112 | unsigned int mii_address = priv->hw->mii.addr; |
| 116 | 113 | ||
| 117 | if (priv->phy_reset) { | 114 | if (priv->phy_reset) { |
| @@ -123,7 +120,7 @@ static int stmmac_mdio_reset(struct mii_bus *bus) | |||
| 123 | * It doesn't complete its reset until at least one clock cycle | 120 | * It doesn't complete its reset until at least one clock cycle |
| 124 | * on MDC, so perform a dummy mdio read. | 121 | * on MDC, so perform a dummy mdio read. |
| 125 | */ | 122 | */ |
| 126 | writel(0, ioaddr + mii_address); | 123 | writel(0, priv->ioaddr + mii_address); |
| 127 | 124 | ||
| 128 | return 0; | 125 | return 0; |
| 129 | } | 126 | } |