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authorGiuseppe CAVALLARO <peppe.cavallaro@st.com>2010-04-13 16:21:13 -0400
committerDavid S. Miller <davem@davemloft.net>2010-04-14 07:49:51 -0400
commit688911c2f5e5e4f33b5a1c32839184f1fdf814ee (patch)
tree8fc98665157406601001822c5cd8d65f4c5ce457 /drivers/net/stmmac/dwmac1000_dma.c
parent56b106ae7b1f6b7cef4ef7e79a03b59cfc940923 (diff)
stmmac: fix Transmit FIFO flush operation
Fix the Transmit FIFO flush operation; it was disabled while reworking the descriptor structures. Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/stmmac/dwmac1000_dma.c')
-rw-r--r--drivers/net/stmmac/dwmac1000_dma.c9
1 files changed, 0 insertions, 9 deletions
diff --git a/drivers/net/stmmac/dwmac1000_dma.c b/drivers/net/stmmac/dwmac1000_dma.c
index 8d3ea99d8adf..a547aa99e114 100644
--- a/drivers/net/stmmac/dwmac1000_dma.c
+++ b/drivers/net/stmmac/dwmac1000_dma.c
@@ -58,15 +58,6 @@ static int dwmac1000_dma_init(unsigned long ioaddr, int pbl, u32 dma_tx,
58 return 0; 58 return 0;
59} 59}
60 60
61/* Transmit FIFO flush operation */
62static void dwmac1000_flush_tx_fifo(unsigned long ioaddr)
63{
64 u32 csr6 = readl(ioaddr + DMA_CONTROL);
65 writel((csr6 | DMA_CONTROL_FTF), ioaddr + DMA_CONTROL);
66
67 do {} while ((readl(ioaddr + DMA_CONTROL) & DMA_CONTROL_FTF));
68}
69
70static void dwmac1000_dma_operation_mode(unsigned long ioaddr, int txmode, 61static void dwmac1000_dma_operation_mode(unsigned long ioaddr, int txmode,
71 int rxmode) 62 int rxmode)
72{ 63{