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authorJens Osterkamp <jens@de.ibm.com>2006-07-13 05:54:08 -0400
committerJeff Garzik <jeff@garzik.org>2006-07-17 13:30:12 -0400
commitbdd01503c3e4e9827df015bc7e440d5498308fdd (patch)
treedf479cded65bfcd23bdb2b46ad17f20bb5c8660c /drivers/net/spider_net.h
parentee962a5cee5b534666dbfa5e3ec3c633c90c6b1a (diff)
[PATCH] spidernet: rework tx queue handling
With this patch TX queue descriptors are not chained per default any more. The pointer to next descriptor is set only when next descriptor is prepaired for transfer. Also the mechanism of checking wether Spider is ready has been changed: it checks not for CARDOWNED flag in status of previous descriptor but for a TXDMAENABLED flag in Spider's register. Signed-off-by: Maxim Shchetynin <maxim@de.ibm.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Jens Osterkamp <Jens.Osterkamp@de.ibm.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
Diffstat (limited to 'drivers/net/spider_net.h')
-rw-r--r--drivers/net/spider_net.h73
1 files changed, 21 insertions, 52 deletions
diff --git a/drivers/net/spider_net.h b/drivers/net/spider_net.h
index 3b8d951cf73c..f6dcf180ae3d 100644
--- a/drivers/net/spider_net.h
+++ b/drivers/net/spider_net.h
@@ -208,7 +208,10 @@ extern char spider_net_driver_name[];
208#define SPIDER_NET_DMA_RX_VALUE 0x80000000 208#define SPIDER_NET_DMA_RX_VALUE 0x80000000
209#define SPIDER_NET_DMA_RX_FEND_VALUE 0x00030003 209#define SPIDER_NET_DMA_RX_FEND_VALUE 0x00030003
210/* to set TX_DMA_EN */ 210/* to set TX_DMA_EN */
211#define SPIDER_NET_DMA_TX_VALUE 0x80000000 211#define SPIDER_NET_TX_DMA_EN 0x80000000
212#define SPIDER_NET_GDTDCEIDIS 0x00000002
213#define SPIDER_NET_DMA_TX_VALUE SPIDER_NET_TX_DMA_EN | \
214 SPIDER_NET_GDTDCEIDIS
212#define SPIDER_NET_DMA_TX_FEND_VALUE 0x00030003 215#define SPIDER_NET_DMA_TX_FEND_VALUE 0x00030003
213 216
214/* SPIDER_NET_UA_DESCR_VALUE is OR'ed with the unicast address */ 217/* SPIDER_NET_UA_DESCR_VALUE is OR'ed with the unicast address */
@@ -329,55 +332,23 @@ enum spider_net_int2_status {
329 (~SPIDER_NET_TXINT) & \ 332 (~SPIDER_NET_TXINT) & \
330 (~SPIDER_NET_RXINT) ) 333 (~SPIDER_NET_RXINT) )
331 334
332#define SPIDER_NET_GPREXEC 0x80000000 335#define SPIDER_NET_GPREXEC 0x80000000
333#define SPIDER_NET_GPRDAT_MASK 0x0000ffff 336#define SPIDER_NET_GPRDAT_MASK 0x0000ffff
334 337
335/* descriptor bits 338#define SPIDER_NET_DMAC_NOINTR_COMPLETE 0x00800000
336 * 339#define SPIDER_NET_DMAC_NOCS 0x00040000
337 * 1010 descriptor ready 340#define SPIDER_NET_DMAC_TCP 0x00020000
338 * 0 descr in middle of chain 341#define SPIDER_NET_DMAC_UDP 0x00030000
339 * 000 fixed to 0 342#define SPIDER_NET_TXDCEST 0x08000000
340 * 343
341 * 0 no interrupt on completion 344#define SPIDER_NET_DESCR_IND_PROC_MASK 0xF0000000
342 * 000 fixed to 0 345#define SPIDER_NET_DESCR_COMPLETE 0x00000000 /* used in rx and tx */
343 * 1 no ipsec processing 346#define SPIDER_NET_DESCR_RESPONSE_ERROR 0x10000000 /* used in rx and tx */
344 * 1 last descriptor for this frame 347#define SPIDER_NET_DESCR_PROTECTION_ERROR 0x20000000 /* used in rx and tx */
345 * 00 no checksum 348#define SPIDER_NET_DESCR_FRAME_END 0x40000000 /* used in rx */
346 * 10 tcp checksum 349#define SPIDER_NET_DESCR_FORCE_END 0x50000000 /* used in rx and tx */
347 * 11 udp checksum 350#define SPIDER_NET_DESCR_CARDOWNED 0xA0000000 /* used in rx and tx */
348 * 351#define SPIDER_NET_DESCR_NOT_IN_USE 0xF0000000
349 * 00 fixed to 0
350 * 0 fixed to 0
351 * 0 no interrupt on response errors
352 * 0 no interrupt on invalid descr
353 * 0 no interrupt on dma process termination
354 * 0 no interrupt on descr chain end
355 * 0 no interrupt on descr complete
356 *
357 * 000 fixed to 0
358 * 0 response error interrupt status
359 * 0 invalid descr status
360 * 0 dma termination status
361 * 0 descr chain end status
362 * 0 descr complete status */
363#define SPIDER_NET_DMAC_CMDSTAT_NOCS 0xa00c0000
364#define SPIDER_NET_DMAC_CMDSTAT_TCPCS 0xa00e0000
365#define SPIDER_NET_DMAC_CMDSTAT_UDPCS 0xa00f0000
366#define SPIDER_NET_DESCR_IND_PROC_SHIFT 28
367#define SPIDER_NET_DESCR_IND_PROC_MASKO 0x0fffffff
368
369/* descr ready, descr is in middle of chain, get interrupt on completion */
370#define SPIDER_NET_DMAC_RX_CARDOWNED 0xa0800000
371
372enum spider_net_descr_status {
373 SPIDER_NET_DESCR_COMPLETE = 0x00, /* used in rx and tx */
374 SPIDER_NET_DESCR_RESPONSE_ERROR = 0x01, /* used in rx and tx */
375 SPIDER_NET_DESCR_PROTECTION_ERROR = 0x02, /* used in rx and tx */
376 SPIDER_NET_DESCR_FRAME_END = 0x04, /* used in rx */
377 SPIDER_NET_DESCR_FORCE_END = 0x05, /* used in rx and tx */
378 SPIDER_NET_DESCR_CARDOWNED = 0x0a, /* used in rx and tx */
379 SPIDER_NET_DESCR_NOT_IN_USE /* any other value */
380};
381 352
382struct spider_net_descr { 353struct spider_net_descr {
383 /* as defined by the hardware */ 354 /* as defined by the hardware */
@@ -398,7 +369,7 @@ struct spider_net_descr {
398} __attribute__((aligned(32))); 369} __attribute__((aligned(32)));
399 370
400struct spider_net_descr_chain { 371struct spider_net_descr_chain {
401 /* we walk from tail to head */ 372 spinlock_t lock;
402 struct spider_net_descr *head; 373 struct spider_net_descr *head;
403 struct spider_net_descr *tail; 374 struct spider_net_descr *tail;
404}; 375};
@@ -453,8 +424,6 @@ struct spider_net_card {
453 424
454 struct spider_net_descr_chain tx_chain; 425 struct spider_net_descr_chain tx_chain;
455 struct spider_net_descr_chain rx_chain; 426 struct spider_net_descr_chain rx_chain;
456 atomic_t rx_chain_refill;
457 atomic_t tx_chain_release;
458 427
459 struct net_device_stats netdev_stats; 428 struct net_device_stats netdev_stats;
460 429