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authorStephen Hemminger <shemminger@linux-foundation.org>2007-08-29 15:58:14 -0400
committerDavid S. Miller <davem@sunset.davemloft.net>2007-10-10 19:50:53 -0400
commit555382cbfc6d2187b53888190755e56f52308cd6 (patch)
tree70ffd0257aff8a18b721f813a05ef15cf63f2f48 /drivers/net/sky2.h
parent8c4c00f3710f9e5653ed465e88271664f3163930 (diff)
sky2: advanced error reporting
Use the kernel interfaces for advanced error reporting. This should be cleaner and clear up errors on boot. For those systems with busted BIOS's that don't correctly support mmconfig, advanced error reporting will be disabled. The PCI registers for advanced error reporting start at 0x100 which is too large to be accessed by legacy functions. Signed-off-by: Stephen Hemminger <shemminger@linux-foundation.org> Signed-off-by: Jeff Garzik <jeff@garzik.org>
Diffstat (limited to 'drivers/net/sky2.h')
-rw-r--r--drivers/net/sky2.h41
1 files changed, 0 insertions, 41 deletions
diff --git a/drivers/net/sky2.h b/drivers/net/sky2.h
index 3d4f1903d62c..6f5e162709b6 100644
--- a/drivers/net/sky2.h
+++ b/drivers/net/sky2.h
@@ -18,14 +18,6 @@ enum {
18 PCI_CFG_REG_1 = 0x94, 18 PCI_CFG_REG_1 = 0x94,
19}; 19};
20 20
21enum {
22 PEX_DEV_CAP = 0xe4,
23 PEX_DEV_CTRL = 0xe8,
24 PEX_DEV_STA = 0xea,
25 PEX_LNK_STAT = 0xf2,
26 PEX_UNC_ERR_STAT= 0x104,
27};
28
29/* Yukon-2 */ 21/* Yukon-2 */
30enum pci_dev_reg_1 { 22enum pci_dev_reg_1 {
31 PCI_Y2_PIG_ENA = 1<<31, /* Enable Plug-in-Go (YUKON-2) */ 23 PCI_Y2_PIG_ENA = 1<<31, /* Enable Plug-in-Go (YUKON-2) */
@@ -151,38 +143,6 @@ enum pci_cfg_reg1 {
151 PCI_STATUS_REC_TARGET_ABORT | \ 143 PCI_STATUS_REC_TARGET_ABORT | \
152 PCI_STATUS_PARITY) 144 PCI_STATUS_PARITY)
153 145
154enum pex_dev_ctrl {
155 PEX_DC_MAX_RRS_MSK = 7<<12, /* Bit 14..12: Max. Read Request Size */
156 PEX_DC_EN_NO_SNOOP = 1<<11,/* Enable No Snoop */
157 PEX_DC_EN_AUX_POW = 1<<10,/* Enable AUX Power */
158 PEX_DC_EN_PHANTOM = 1<<9, /* Enable Phantom Functions */
159 PEX_DC_EN_EXT_TAG = 1<<8, /* Enable Extended Tag Field */
160 PEX_DC_MAX_PLS_MSK = 7<<5, /* Bit 7.. 5: Max. Payload Size Mask */
161 PEX_DC_EN_REL_ORD = 1<<4, /* Enable Relaxed Ordering */
162 PEX_DC_EN_UNS_RQ_RP = 1<<3, /* Enable Unsupported Request Reporting */
163 PEX_DC_EN_FAT_ER_RP = 1<<2, /* Enable Fatal Error Reporting */
164 PEX_DC_EN_NFA_ER_RP = 1<<1, /* Enable Non-Fatal Error Reporting */
165 PEX_DC_EN_COR_ER_RP = 1<<0, /* Enable Correctable Error Reporting */
166};
167#define PEX_DC_MAX_RD_RQ_SIZE(x) (((x)<<12) & PEX_DC_MAX_RRS_MSK)
168
169/* PEX_UNC_ERR_STAT PEX Uncorrectable Errors Status Register (Yukon-2) */
170enum pex_err {
171 PEX_UNSUP_REQ = 1<<20, /* Unsupported Request Error */
172
173 PEX_MALFOR_TLP = 1<<18, /* Malformed TLP */
174
175 PEX_UNEXP_COMP = 1<<16, /* Unexpected Completion */
176
177 PEX_COMP_TO = 1<<14, /* Completion Timeout */
178 PEX_FLOW_CTRL_P = 1<<13, /* Flow Control Protocol Error */
179 PEX_POIS_TLP = 1<<12, /* Poisoned TLP */
180
181 PEX_DATA_LINK_P = 1<<4, /* Data Link Protocol Error */
182 PEX_FATAL_ERRORS= (PEX_MALFOR_TLP | PEX_FLOW_CTRL_P | PEX_DATA_LINK_P),
183};
184
185
186enum csr_regs { 146enum csr_regs {
187 B0_RAP = 0x0000, 147 B0_RAP = 0x0000,
188 B0_CTST = 0x0004, 148 B0_CTST = 0x0004,
@@ -419,7 +379,6 @@ enum {
419 Y2_IS_PAR_RX2 | Y2_IS_TCP_TXS2| Y2_IS_TCP_TXA2, 379 Y2_IS_PAR_RX2 | Y2_IS_TCP_TXS2| Y2_IS_TCP_TXA2,
420 380
421 Y2_HWE_ALL_MASK = Y2_IS_TIST_OV | Y2_IS_MST_ERR | Y2_IS_IRQ_STAT | 381 Y2_HWE_ALL_MASK = Y2_IS_TIST_OV | Y2_IS_MST_ERR | Y2_IS_IRQ_STAT |
422 Y2_IS_PCI_EXP |
423 Y2_HWE_L1_MASK | Y2_HWE_L2_MASK, 382 Y2_HWE_L1_MASK | Y2_HWE_L2_MASK,
424}; 383};
425 384