diff options
author | stephen hemminger <shemminger@vyatta.com> | 2010-03-29 03:36:19 -0400 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2010-03-30 22:43:48 -0400 |
commit | 4b7c47aa221191b2bd62c653ea851afe5b625162 (patch) | |
tree | a8c3440e2a8a1d7c6184fb1526b643a8ae27dc7a /drivers/net/sky2.c | |
parent | c1cd0a859a01ed0591cb2d8931bdd283542c0252 (diff) |
sky2: add XL revisions
Add definitions for Yukon XL revisions.
Signed-off-by: Stephen Hemminger <shemminger@vyatta.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/sky2.c')
-rw-r--r-- | drivers/net/sky2.c | 10 |
1 files changed, 6 insertions, 4 deletions
diff --git a/drivers/net/sky2.c b/drivers/net/sky2.c index 4b403bd7870d..eec36995af22 100644 --- a/drivers/net/sky2.c +++ b/drivers/net/sky2.c | |||
@@ -226,7 +226,7 @@ static void sky2_power_on(struct sky2_hw *hw) | |||
226 | /* disable Core Clock Division, */ | 226 | /* disable Core Clock Division, */ |
227 | sky2_write32(hw, B2_Y2_CLK_CTRL, Y2_CLK_DIV_DIS); | 227 | sky2_write32(hw, B2_Y2_CLK_CTRL, Y2_CLK_DIV_DIS); |
228 | 228 | ||
229 | if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev > 1) | 229 | if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev > CHIP_REV_YU_XL_A1) |
230 | /* enable bits are inverted */ | 230 | /* enable bits are inverted */ |
231 | sky2_write8(hw, B2_Y2_CLK_GATE, | 231 | sky2_write8(hw, B2_Y2_CLK_GATE, |
232 | Y2_PCI_CLK_LNK1_DIS | Y2_COR_CLK_LNK1_DIS | | 232 | Y2_PCI_CLK_LNK1_DIS | Y2_COR_CLK_LNK1_DIS | |
@@ -268,7 +268,7 @@ static void sky2_power_on(struct sky2_hw *hw) | |||
268 | 268 | ||
269 | static void sky2_power_aux(struct sky2_hw *hw) | 269 | static void sky2_power_aux(struct sky2_hw *hw) |
270 | { | 270 | { |
271 | if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev > 1) | 271 | if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev > CHIP_REV_YU_XL_A1) |
272 | sky2_write8(hw, B2_Y2_CLK_GATE, 0); | 272 | sky2_write8(hw, B2_Y2_CLK_GATE, 0); |
273 | else | 273 | else |
274 | /* enable bits are inverted */ | 274 | /* enable bits are inverted */ |
@@ -651,7 +651,7 @@ static void sky2_phy_power_up(struct sky2_hw *hw, unsigned port) | |||
651 | reg1 = sky2_pci_read32(hw, PCI_DEV_REG1); | 651 | reg1 = sky2_pci_read32(hw, PCI_DEV_REG1); |
652 | reg1 &= ~phy_power[port]; | 652 | reg1 &= ~phy_power[port]; |
653 | 653 | ||
654 | if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev > 1) | 654 | if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev > CHIP_REV_YU_XL_A1) |
655 | reg1 |= coma_mode[port]; | 655 | reg1 |= coma_mode[port]; |
656 | 656 | ||
657 | sky2_pci_write32(hw, PCI_DEV_REG1, reg1); | 657 | sky2_pci_write32(hw, PCI_DEV_REG1, reg1); |
@@ -823,7 +823,9 @@ static void sky2_mac_init(struct sky2_hw *hw, unsigned port) | |||
823 | 823 | ||
824 | sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_RST_CLR); | 824 | sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_RST_CLR); |
825 | 825 | ||
826 | if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev == 0 && port == 1) { | 826 | if (hw->chip_id == CHIP_ID_YUKON_XL && |
827 | hw->chip_rev == CHIP_REV_YU_XL_A0 && | ||
828 | port == 1) { | ||
827 | /* WA DEV_472 -- looks like crossed wires on port 2 */ | 829 | /* WA DEV_472 -- looks like crossed wires on port 2 */ |
828 | /* clear GMAC 1 Control reset */ | 830 | /* clear GMAC 1 Control reset */ |
829 | sky2_write8(hw, SK_REG(0, GMAC_CTRL), GMC_RST_CLR); | 831 | sky2_write8(hw, SK_REG(0, GMAC_CTRL), GMC_RST_CLR); |