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authorStephen Hemminger <shemminger@linux-foundation.org>2007-09-25 22:01:02 -0400
committerDavid S. Miller <davem@sunset.davemloft.net>2007-10-10 19:50:54 -0400
commit167f53d05fccb47b6eeadac7f6705b3f2f042d03 (patch)
treeec3fe33aae26b5ec35e32bb710430300d91b0a6f /drivers/net/sky2.c
parent555382cbfc6d2187b53888190755e56f52308cd6 (diff)
sky2: use pci_config access functions
Use the PCI layer config access functions. The driver was using the memory mapped window in device, to workaround issues accessing the advanced error reporting registers. Signed-off-by: Stephen Hemminger <shemminger@linux-foundation.org> Signed-off-by: Jeff Garzik <jeff@garzik.org> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/sky2.c')
-rw-r--r--drivers/net/sky2.c93
1 files changed, 51 insertions, 42 deletions
diff --git a/drivers/net/sky2.c b/drivers/net/sky2.c
index b81d81746c2c..941a60882526 100644
--- a/drivers/net/sky2.c
+++ b/drivers/net/sky2.c
@@ -223,21 +223,22 @@ static void sky2_power_on(struct sky2_hw *hw)
223 sky2_write8(hw, B2_Y2_CLK_GATE, 0); 223 sky2_write8(hw, B2_Y2_CLK_GATE, 0);
224 224
225 if (hw->flags & SKY2_HW_ADV_POWER_CTL) { 225 if (hw->flags & SKY2_HW_ADV_POWER_CTL) {
226 struct pci_dev *pdev = hw->pdev;
226 u32 reg; 227 u32 reg;
227 228
228 sky2_pci_write32(hw, PCI_DEV_REG3, 0); 229 pci_write_config_dword(pdev, PCI_DEV_REG3, 0);
229 230
230 reg = sky2_pci_read32(hw, PCI_DEV_REG4); 231 pci_read_config_dword(pdev, PCI_DEV_REG4, &reg);
231 /* set all bits to 0 except bits 15..12 and 8 */ 232 /* set all bits to 0 except bits 15..12 and 8 */
232 reg &= P_ASPM_CONTROL_MSK; 233 reg &= P_ASPM_CONTROL_MSK;
233 sky2_pci_write32(hw, PCI_DEV_REG4, reg); 234 pci_write_config_dword(pdev, PCI_DEV_REG4, reg);
234 235
235 reg = sky2_pci_read32(hw, PCI_DEV_REG5); 236 pci_read_config_dword(pdev, PCI_DEV_REG5, &reg);
236 /* set all bits to 0 except bits 28 & 27 */ 237 /* set all bits to 0 except bits 28 & 27 */
237 reg &= P_CTL_TIM_VMAIN_AV_MSK; 238 reg &= P_CTL_TIM_VMAIN_AV_MSK;
238 sky2_pci_write32(hw, PCI_DEV_REG5, reg); 239 pci_write_config_dword(pdev, PCI_DEV_REG5, reg);
239 240
240 sky2_pci_write32(hw, PCI_CFG_REG_1, 0); 241 pci_write_config_dword(pdev, PCI_CFG_REG_1, 0);
241 242
242 /* Enable workaround for dev 4.107 on Yukon-Ultra & Extreme */ 243 /* Enable workaround for dev 4.107 on Yukon-Ultra & Extreme */
243 reg = sky2_read32(hw, B2_GP_IO); 244 reg = sky2_read32(hw, B2_GP_IO);
@@ -603,6 +604,7 @@ static void sky2_phy_init(struct sky2_hw *hw, unsigned port)
603 604
604static void sky2_phy_power(struct sky2_hw *hw, unsigned port, int onoff) 605static void sky2_phy_power(struct sky2_hw *hw, unsigned port, int onoff)
605{ 606{
607 struct pci_dev *pdev = hw->pdev;
606 u32 reg1; 608 u32 reg1;
607 static const u32 phy_power[] 609 static const u32 phy_power[]
608 = { PCI_Y2_PHY1_POWD, PCI_Y2_PHY2_POWD }; 610 = { PCI_Y2_PHY1_POWD, PCI_Y2_PHY2_POWD };
@@ -611,15 +613,16 @@ static void sky2_phy_power(struct sky2_hw *hw, unsigned port, int onoff)
611 if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev > 1) 613 if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev > 1)
612 onoff = !onoff; 614 onoff = !onoff;
613 615
614 reg1 = sky2_pci_read32(hw, PCI_DEV_REG1); 616 pci_read_config_dword(pdev, PCI_DEV_REG1, &reg1);
615 if (onoff) 617 if (onoff)
616 /* Turn off phy power saving */ 618 /* Turn off phy power saving */
617 reg1 &= ~phy_power[port]; 619 reg1 &= ~phy_power[port];
618 else 620 else
619 reg1 |= phy_power[port]; 621 reg1 |= phy_power[port];
620 622
621 sky2_pci_write32(hw, PCI_DEV_REG1, reg1); 623 pci_write_config_dword(pdev, PCI_DEV_REG1, reg1);
622 sky2_pci_read32(hw, PCI_DEV_REG1); 624 pci_read_config_dword(pdev, PCI_DEV_REG1, &reg1);
625
623 udelay(100); 626 udelay(100);
624} 627}
625 628
@@ -687,9 +690,9 @@ static void sky2_wol_init(struct sky2_port *sky2)
687 sky2_write16(hw, WOL_REGS(port, WOL_CTRL_STAT), ctrl); 690 sky2_write16(hw, WOL_REGS(port, WOL_CTRL_STAT), ctrl);
688 691
689 /* Turn on legacy PCI-Express PME mode */ 692 /* Turn on legacy PCI-Express PME mode */
690 reg1 = sky2_pci_read32(hw, PCI_DEV_REG1); 693 pci_read_config_dword(hw->pdev, PCI_DEV_REG1, &reg1);
691 reg1 |= PCI_Y2_PME_LEGACY; 694 reg1 |= PCI_Y2_PME_LEGACY;
692 sky2_pci_write32(hw, PCI_DEV_REG1, reg1); 695 pci_write_config_dword(hw->pdev, PCI_DEV_REG1, reg1);
693 696
694 /* block receiver */ 697 /* block receiver */
695 sky2_write8(hw, SK_REG(port, RX_GMF_CTRL_T), GMF_RST_SET); 698 sky2_write8(hw, SK_REG(port, RX_GMF_CTRL_T), GMF_RST_SET);
@@ -1306,9 +1309,9 @@ static int sky2_up(struct net_device *dev)
1306 struct sky2_port *osky2 = netdev_priv(otherdev); 1309 struct sky2_port *osky2 = netdev_priv(otherdev);
1307 u16 cmd; 1310 u16 cmd;
1308 1311
1309 cmd = sky2_pci_read16(hw, cap + PCI_X_CMD); 1312 pci_read_config_word(hw->pdev, cap + PCI_X_CMD, &cmd);
1310 cmd &= ~PCI_X_CMD_MAX_SPLIT; 1313 cmd &= ~PCI_X_CMD_MAX_SPLIT;
1311 sky2_pci_write16(hw, cap + PCI_X_CMD, cmd); 1314 pci_write_config_word(hw->pdev, cap + PCI_X_CMD, cmd);
1312 1315
1313 sky2->rx_csum = 0; 1316 sky2->rx_csum = 0;
1314 osky2->rx_csum = 0; 1317 osky2->rx_csum = 0;
@@ -2434,13 +2437,13 @@ static void sky2_hw_intr(struct sky2_hw *hw)
2434 if (status & (Y2_IS_MST_ERR | Y2_IS_IRQ_STAT)) { 2437 if (status & (Y2_IS_MST_ERR | Y2_IS_IRQ_STAT)) {
2435 u16 pci_err; 2438 u16 pci_err;
2436 2439
2437 pci_err = sky2_pci_read16(hw, PCI_STATUS); 2440 pci_read_config_word(pdev, PCI_STATUS, &pci_err);
2438 if (net_ratelimit()) 2441 if (net_ratelimit())
2439 dev_err(&pdev->dev, "PCI hardware error (0x%x)\n", 2442 dev_err(&pdev->dev, "PCI hardware error (0x%x)\n",
2440 pci_err); 2443 pci_err);
2441 2444
2442 sky2_pci_write16(hw, PCI_STATUS, 2445 pci_write_config_word(pdev, PCI_STATUS,
2443 pci_err | PCI_STATUS_ERROR_BITS); 2446 pci_err | PCI_STATUS_ERROR_BITS);
2444 } 2447 }
2445 2448
2446 if (status & Y2_IS_PCI_EXP) { 2449 if (status & Y2_IS_PCI_EXP) {
@@ -2694,10 +2697,13 @@ static inline u32 sky2_clk2us(const struct sky2_hw *hw, u32 clk)
2694 2697
2695static int __devinit sky2_init(struct sky2_hw *hw) 2698static int __devinit sky2_init(struct sky2_hw *hw)
2696{ 2699{
2700 int rc;
2697 u8 t8; 2701 u8 t8;
2698 2702
2699 /* Enable all clocks */ 2703 /* Enable all clocks and check for bad PCI access */
2700 sky2_pci_write32(hw, PCI_DEV_REG3, 0); 2704 rc = pci_write_config_dword(hw->pdev, PCI_DEV_REG3, 0);
2705 if (rc)
2706 return rc;
2701 2707
2702 sky2_write8(hw, B0_CTST, CS_RST_CLR); 2708 sky2_write8(hw, B0_CTST, CS_RST_CLR);
2703 2709
@@ -2791,10 +2797,9 @@ static void sky2_reset(struct sky2_hw *hw)
2791 sky2_write8(hw, B0_CTST, CS_RST_CLR); 2797 sky2_write8(hw, B0_CTST, CS_RST_CLR);
2792 2798
2793 /* clear PCI errors, if any */ 2799 /* clear PCI errors, if any */
2794 status = sky2_pci_read16(hw, PCI_STATUS); 2800 pci_read_config_word(pdev, PCI_STATUS, &status);
2795 2801 status |= PCI_STATUS_ERROR_BITS;
2796 sky2_pci_write16(hw, PCI_STATUS, status | PCI_STATUS_ERROR_BITS); 2802 pci_write_config_word(pdev, PCI_STATUS, status);
2797
2798 2803
2799 sky2_write8(hw, B0_CTST, CS_MRST_CLR); 2804 sky2_write8(hw, B0_CTST, CS_MRST_CLR);
2800 2805
@@ -3606,26 +3611,31 @@ static int sky2_get_eeprom_len(struct net_device *dev)
3606 struct sky2_port *sky2 = netdev_priv(dev); 3611 struct sky2_port *sky2 = netdev_priv(dev);
3607 u16 reg2; 3612 u16 reg2;
3608 3613
3609 reg2 = sky2_pci_read32(sky2->hw, PCI_DEV_REG2); 3614 pci_read_config_word(sky2->hw->pdev, PCI_DEV_REG2, &reg2);
3610 return 1 << ( ((reg2 & PCI_VPD_ROM_SZ) >> 14) + 8); 3615 return 1 << ( ((reg2 & PCI_VPD_ROM_SZ) >> 14) + 8);
3611} 3616}
3612 3617
3613static u32 sky2_vpd_read(struct sky2_hw *hw, int cap, u16 offset) 3618static u32 sky2_vpd_read(struct pci_dev *pdev, int cap, u16 offset)
3614{ 3619{
3615 sky2_pci_write16(hw, cap + PCI_VPD_ADDR, offset); 3620 u32 val;
3616 3621
3617 while (!(sky2_pci_read16(hw, cap + PCI_VPD_ADDR) & PCI_VPD_ADDR_F)) 3622 pci_write_config_word(pdev, cap + PCI_VPD_ADDR, offset);
3618 cpu_relax(); 3623
3619 return sky2_pci_read32(hw, cap + PCI_VPD_DATA); 3624 do {
3625 pci_read_config_word(pdev, cap + PCI_VPD_ADDR, &offset);
3626 } while (!(offset & PCI_VPD_ADDR_F));
3627
3628 pci_read_config_dword(pdev, cap + PCI_VPD_DATA, &val);
3629 return val;
3620} 3630}
3621 3631
3622static void sky2_vpd_write(struct sky2_hw *hw, int cap, u16 offset, u32 val) 3632static void sky2_vpd_write(struct pci_dev *pdev, int cap, u16 offset, u32 val)
3623{ 3633{
3624 sky2_pci_write32(hw, cap + PCI_VPD_DATA, val); 3634 pci_write_config_word(pdev, cap + PCI_VPD_DATA, val);
3625 sky2_pci_write16(hw, cap + PCI_VPD_ADDR, offset | PCI_VPD_ADDR_F); 3635 pci_write_config_dword(pdev, cap + PCI_VPD_ADDR, offset | PCI_VPD_ADDR_F);
3626 do { 3636 do {
3627 cpu_relax(); 3637 pci_read_config_word(pdev, cap + PCI_VPD_ADDR, &offset);
3628 } while (sky2_pci_read16(hw, cap + PCI_VPD_ADDR) & PCI_VPD_ADDR_F); 3638 } while (offset & PCI_VPD_ADDR_F);
3629} 3639}
3630 3640
3631static int sky2_get_eeprom(struct net_device *dev, struct ethtool_eeprom *eeprom, 3641static int sky2_get_eeprom(struct net_device *dev, struct ethtool_eeprom *eeprom,
@@ -3642,7 +3652,7 @@ static int sky2_get_eeprom(struct net_device *dev, struct ethtool_eeprom *eeprom
3642 eeprom->magic = SKY2_EEPROM_MAGIC; 3652 eeprom->magic = SKY2_EEPROM_MAGIC;
3643 3653
3644 while (length > 0) { 3654 while (length > 0) {
3645 u32 val = sky2_vpd_read(sky2->hw, cap, offset); 3655 u32 val = sky2_vpd_read(sky2->hw->pdev, cap, offset);
3646 int n = min_t(int, length, sizeof(val)); 3656 int n = min_t(int, length, sizeof(val));
3647 3657
3648 memcpy(data, &val, n); 3658 memcpy(data, &val, n);
@@ -3672,10 +3682,10 @@ static int sky2_set_eeprom(struct net_device *dev, struct ethtool_eeprom *eeprom
3672 int n = min_t(int, length, sizeof(val)); 3682 int n = min_t(int, length, sizeof(val));
3673 3683
3674 if (n < sizeof(val)) 3684 if (n < sizeof(val))
3675 val = sky2_vpd_read(sky2->hw, cap, offset); 3685 val = sky2_vpd_read(sky2->hw->pdev, cap, offset);
3676 memcpy(&val, data, n); 3686 memcpy(&val, data, n);
3677 3687
3678 sky2_vpd_write(sky2->hw, cap, offset, val); 3688 sky2_vpd_write(sky2->hw->pdev, cap, offset, val);
3679 3689
3680 length -= n; 3690 length -= n;
3681 data += n; 3691 data += n;
@@ -4116,15 +4126,14 @@ static int __devinit sky2_probe(struct pci_dev *pdev,
4116 */ 4126 */
4117 { 4127 {
4118 u32 reg; 4128 u32 reg;
4119 reg = sky2_pci_read32(hw, PCI_DEV_REG2); 4129 pci_read_config_dword(pdev,PCI_DEV_REG2, &reg);
4120 reg &= ~PCI_REV_DESC; 4130 reg &= ~PCI_REV_DESC;
4121 sky2_pci_write32(hw, PCI_DEV_REG2, reg); 4131 pci_write_config_dword(pdev, PCI_DEV_REG2, reg);
4122 } 4132 }
4123#endif 4133#endif
4124 4134
4125 /* ring for status responses */ 4135 /* ring for status responses */
4126 hw->st_le = pci_alloc_consistent(hw->pdev, STATUS_LE_BYTES, 4136 hw->st_le = pci_alloc_consistent(pdev, STATUS_LE_BYTES, &hw->st_dma);
4127 &hw->st_dma);
4128 if (!hw->st_le) 4137 if (!hw->st_le)
4129 goto err_out_iounmap; 4138 goto err_out_iounmap;
4130 4139
@@ -4201,7 +4210,7 @@ err_out_free_netdev:
4201 free_netdev(dev); 4210 free_netdev(dev);
4202err_out_free_pci: 4211err_out_free_pci:
4203 sky2_write8(hw, B0_CTST, CS_RST_SET); 4212 sky2_write8(hw, B0_CTST, CS_RST_SET);
4204 pci_free_consistent(hw->pdev, STATUS_LE_BYTES, hw->st_le, hw->st_dma); 4213 pci_free_consistent(pdev, STATUS_LE_BYTES, hw->st_le, hw->st_dma);
4205err_out_iounmap: 4214err_out_iounmap:
4206 iounmap(hw->regs); 4215 iounmap(hw->regs);
4207err_out_free_hw: 4216err_out_free_hw:
@@ -4312,7 +4321,7 @@ static int sky2_resume(struct pci_dev *pdev)
4312 if (hw->chip_id == CHIP_ID_YUKON_EX || 4321 if (hw->chip_id == CHIP_ID_YUKON_EX ||
4313 hw->chip_id == CHIP_ID_YUKON_EC_U || 4322 hw->chip_id == CHIP_ID_YUKON_EC_U ||
4314 hw->chip_id == CHIP_ID_YUKON_FE_P) 4323 hw->chip_id == CHIP_ID_YUKON_FE_P)
4315 sky2_pci_write32(hw, PCI_DEV_REG3, 0); 4324 pci_write_config_dword(pdev, PCI_DEV_REG3, 0);
4316 4325
4317 sky2_reset(hw); 4326 sky2_reset(hw);
4318 4327