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authorStephen Hemminger <shemminger@osdl.org>2006-10-09 17:40:38 -0400
committerJeff Garzik <jeff@garzik.org>2006-10-11 04:07:45 -0400
commit7bd656d12119708b37414bf909ab2995473da818 (patch)
treeef32cd6d47d0f3eef843fd239be6f660c0cc0af6 /drivers/net/sky2.c
parent370de6cdc2ed27c41b313c031e4258ffa32272bc (diff)
[PATCH] sky2: revert pci express extensions
The pci express error handling extensions don't work unless PCI access is via mmconfig. Otherwise, all accesses to pci config registers greater than 256 fail. Since the sky2 driver has other ways of getting to PCI config space, it works around this short coming, but the pci_find_ext_capablity doesn't work. This backs out commit 91aeb3edbcf4e6ed72d138ac8c22fd68e6d717c3 Go back to hardcoding, since we know where the error registers are anyway. Fixes http://bugzilla.kernel.org/show_bug.cgi?id=7222 Signed-off-by: Stephen Hemminger <shemmminger@osdl.org> Signed-off-by: Jeff Garzik <jeff@garzik.org>
Diffstat (limited to 'drivers/net/sky2.c')
-rw-r--r--drivers/net/sky2.c30
1 files changed, 8 insertions, 22 deletions
diff --git a/drivers/net/sky2.c b/drivers/net/sky2.c
index 5a5289b7a885..1f91f30f4c6d 100644
--- a/drivers/net/sky2.c
+++ b/drivers/net/sky2.c
@@ -2220,8 +2220,7 @@ static void sky2_hw_intr(struct sky2_hw *hw)
2220 /* PCI-Express uncorrectable Error occurred */ 2220 /* PCI-Express uncorrectable Error occurred */
2221 u32 pex_err; 2221 u32 pex_err;
2222 2222
2223 pex_err = sky2_pci_read32(hw, 2223 pex_err = sky2_pci_read32(hw, PEX_UNC_ERR_STAT);
2224 hw->err_cap + PCI_ERR_UNCOR_STATUS);
2225 2224
2226 if (net_ratelimit()) 2225 if (net_ratelimit())
2227 printk(KERN_ERR PFX "%s: pci express error (0x%x)\n", 2226 printk(KERN_ERR PFX "%s: pci express error (0x%x)\n",
@@ -2229,20 +2228,15 @@ static void sky2_hw_intr(struct sky2_hw *hw)
2229 2228
2230 /* clear the interrupt */ 2229 /* clear the interrupt */
2231 sky2_write32(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON); 2230 sky2_write32(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
2232 sky2_pci_write32(hw, 2231 sky2_pci_write32(hw, PEX_UNC_ERR_STAT,
2233 hw->err_cap + PCI_ERR_UNCOR_STATUS, 2232 0xffffffffUL);
2234 0xffffffffUL);
2235 sky2_write32(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF); 2233 sky2_write32(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
2236 2234
2237 2235 if (pex_err & PEX_FATAL_ERRORS) {
2238 /* In case of fatal error mask off to keep from getting stuck */
2239 if (pex_err & (PCI_ERR_UNC_POISON_TLP | PCI_ERR_UNC_FCP
2240 | PCI_ERR_UNC_DLP)) {
2241 u32 hwmsk = sky2_read32(hw, B0_HWE_IMSK); 2236 u32 hwmsk = sky2_read32(hw, B0_HWE_IMSK);
2242 hwmsk &= ~Y2_IS_PCI_EXP; 2237 hwmsk &= ~Y2_IS_PCI_EXP;
2243 sky2_write32(hw, B0_HWE_IMSK, hwmsk); 2238 sky2_write32(hw, B0_HWE_IMSK, hwmsk);
2244 } 2239 }
2245
2246 } 2240 }
2247 2241
2248 if (status & Y2_HWE_L1_MASK) 2242 if (status & Y2_HWE_L1_MASK)
@@ -2423,7 +2417,6 @@ static int sky2_reset(struct sky2_hw *hw)
2423 u16 status; 2417 u16 status;
2424 u8 t8; 2418 u8 t8;
2425 int i; 2419 int i;
2426 u32 msk;
2427 2420
2428 sky2_write8(hw, B0_CTST, CS_RST_CLR); 2421 sky2_write8(hw, B0_CTST, CS_RST_CLR);
2429 2422
@@ -2464,13 +2457,9 @@ static int sky2_reset(struct sky2_hw *hw)
2464 sky2_write8(hw, B0_CTST, CS_MRST_CLR); 2457 sky2_write8(hw, B0_CTST, CS_MRST_CLR);
2465 2458
2466 /* clear any PEX errors */ 2459 /* clear any PEX errors */
2467 if (pci_find_capability(hw->pdev, PCI_CAP_ID_EXP)) { 2460 if (pci_find_capability(hw->pdev, PCI_CAP_ID_EXP))
2468 hw->err_cap = pci_find_ext_capability(hw->pdev, PCI_EXT_CAP_ID_ERR); 2461 sky2_pci_write32(hw, PEX_UNC_ERR_STAT, 0xffffffffUL);
2469 if (hw->err_cap) 2462
2470 sky2_pci_write32(hw,
2471 hw->err_cap + PCI_ERR_UNCOR_STATUS,
2472 0xffffffffUL);
2473 }
2474 2463
2475 hw->pmd_type = sky2_read8(hw, B2_PMD_TYP); 2464 hw->pmd_type = sky2_read8(hw, B2_PMD_TYP);
2476 hw->ports = 1; 2465 hw->ports = 1;
@@ -2527,10 +2516,7 @@ static int sky2_reset(struct sky2_hw *hw)
2527 sky2_write8(hw, RAM_BUFFER(i, B3_RI_RTO_XS2), SK_RI_TO_53); 2516 sky2_write8(hw, RAM_BUFFER(i, B3_RI_RTO_XS2), SK_RI_TO_53);
2528 } 2517 }
2529 2518
2530 msk = Y2_HWE_ALL_MASK; 2519 sky2_write32(hw, B0_HWE_IMSK, Y2_HWE_ALL_MASK);
2531 if (!hw->err_cap)
2532 msk &= ~Y2_IS_PCI_EXP;
2533 sky2_write32(hw, B0_HWE_IMSK, msk);
2534 2520
2535 for (i = 0; i < hw->ports; i++) 2521 for (i = 0; i < hw->ports; i++)
2536 sky2_gmac_reset(hw, i); 2522 sky2_gmac_reset(hw, i);