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authorStephen Hemminger <shemminger@osdl.org>2005-07-22 19:26:05 -0400
committerJeff Garzik <jgarzik@pobox.com>2005-07-31 00:40:53 -0400
commit4ff6ac052b90ee4dfee92f8e2c5cb7ef8a4d8f13 (patch)
treeab81d2c692be6fb3f8e207238ff283401b8cafe4 /drivers/net/skge.c
parent0eedf4ac5b536c7922263adf1b1d991d2e2397b9 (diff)
[PATCH] skge: phy lock deadlock
Cleanup the phy_lock deadlock because of relocking in the nway_reset path. Reported by Francois Romieu. Also, don't need to do irqsave/restore for blink, just excluding bh is good enough. Signed-off-by: Stephen Hemminger <shemminger@osdl.org> Signed-off-by: Jeff Garzik <jgarzik@pobox.com>
Diffstat (limited to 'drivers/net/skge.c')
-rw-r--r--drivers/net/skge.c11
1 files changed, 4 insertions, 7 deletions
diff --git a/drivers/net/skge.c b/drivers/net/skge.c
index 3adef3c8797a..9fa519574203 100644
--- a/drivers/net/skge.c
+++ b/drivers/net/skge.c
@@ -668,14 +668,13 @@ static void skge_blink_timer(unsigned long data)
668{ 668{
669 struct skge_port *skge = (struct skge_port *) data; 669 struct skge_port *skge = (struct skge_port *) data;
670 struct skge_hw *hw = skge->hw; 670 struct skge_hw *hw = skge->hw;
671 unsigned long flags;
672 671
673 spin_lock_irqsave(&hw->phy_lock, flags); 672 spin_lock_bh(&hw->phy_lock);
674 if (skge->blink_on) 673 if (skge->blink_on)
675 skge_led_on(hw, skge->port); 674 skge_led_on(hw, skge->port);
676 else 675 else
677 skge_led_off(hw, skge->port); 676 skge_led_off(hw, skge->port);
678 spin_unlock_irqrestore(&hw->phy_lock, flags); 677 spin_unlock_bh(&hw->phy_lock);
679 678
680 skge->blink_on = !skge->blink_on; 679 skge->blink_on = !skge->blink_on;
681 mod_timer(&skge->led_blink, jiffies + BLINK_HZ); 680 mod_timer(&skge->led_blink, jiffies + BLINK_HZ);
@@ -1208,7 +1207,6 @@ static void genesis_mac_init(struct skge_hw *hw, int port)
1208 * namely for the 1000baseTX cards that use the XMAC's 1207 * namely for the 1000baseTX cards that use the XMAC's
1209 * GMII mode. 1208 * GMII mode.
1210 */ 1209 */
1211 spin_lock_bh(&hw->phy_lock);
1212 /* Take external Phy out of reset */ 1210 /* Take external Phy out of reset */
1213 r = skge_read32(hw, B2_GP_IO); 1211 r = skge_read32(hw, B2_GP_IO);
1214 if (port == 0) 1212 if (port == 0)
@@ -1218,7 +1216,6 @@ static void genesis_mac_init(struct skge_hw *hw, int port)
1218 1216
1219 skge_write32(hw, B2_GP_IO, r); 1217 skge_write32(hw, B2_GP_IO, r);
1220 skge_read32(hw, B2_GP_IO); 1218 skge_read32(hw, B2_GP_IO);
1221 spin_unlock_bh(&hw->phy_lock);
1222 1219
1223 /* Enable GMII interfac */ 1220 /* Enable GMII interfac */
1224 xm_write16(hw, port, XM_HW_CFG, XM_HW_GMII_MD); 1221 xm_write16(hw, port, XM_HW_CFG, XM_HW_GMII_MD);
@@ -1744,9 +1741,7 @@ static void yukon_mac_init(struct skge_hw *hw, int port)
1744 gma_write16(hw, port, GM_GP_CTRL, reg); 1741 gma_write16(hw, port, GM_GP_CTRL, reg);
1745 skge_read16(hw, GMAC_IRQ_SRC); 1742 skge_read16(hw, GMAC_IRQ_SRC);
1746 1743
1747 spin_lock_bh(&hw->phy_lock);
1748 yukon_init(hw, port); 1744 yukon_init(hw, port);
1749 spin_unlock_bh(&hw->phy_lock);
1750 1745
1751 /* MIB clear */ 1746 /* MIB clear */
1752 reg = gma_read16(hw, port, GM_PHY_ADDR); 1747 reg = gma_read16(hw, port, GM_PHY_ADDR);
@@ -2096,10 +2091,12 @@ static int skge_up(struct net_device *dev)
2096 skge_write32(hw, B0_IMSK, hw->intr_mask); 2091 skge_write32(hw, B0_IMSK, hw->intr_mask);
2097 2092
2098 /* Initialze MAC */ 2093 /* Initialze MAC */
2094 spin_lock_bh(&hw->phy_lock);
2099 if (hw->chip_id == CHIP_ID_GENESIS) 2095 if (hw->chip_id == CHIP_ID_GENESIS)
2100 genesis_mac_init(hw, port); 2096 genesis_mac_init(hw, port);
2101 else 2097 else
2102 yukon_mac_init(hw, port); 2098 yukon_mac_init(hw, port);
2099 spin_unlock_bh(&hw->phy_lock);
2103 2100
2104 /* Configure RAMbuffers */ 2101 /* Configure RAMbuffers */
2105 chunk = hw->ram_size / ((hw->ports + 1)*2); 2102 chunk = hw->ram_size / ((hw->ports + 1)*2);