diff options
author | Stephen Hemminger <shemminger@osdl.org> | 2005-06-27 14:33:09 -0400 |
---|---|---|
committer | Jeff Garzik <jgarzik@pobox.com> | 2005-06-27 18:05:06 -0400 |
commit | c506a5090272752932be6ac0c29ffcbca38f2404 (patch) | |
tree | 22f94d161da13f66f2d28602d5953e4773fb4429 /drivers/net/skge.c | |
parent | b18f2091bc9f93548ea63752278fceaeacedab20 (diff) |
[PATCH] skge: remove Yukon2 related special cases
Remove the bits and pieces added relating to Yukon II chipset.
The Yukon 2 will be in a separate driver.
Signed-off-by: Stephen Hemminger <shemminger@osdl.org>
Diffstat (limited to 'drivers/net/skge.c')
-rw-r--r-- | drivers/net/skge.c | 54 |
1 files changed, 7 insertions, 47 deletions
diff --git a/drivers/net/skge.c b/drivers/net/skge.c index 8fd7981e95a8..c29e187f90c6 100644 --- a/drivers/net/skge.c +++ b/drivers/net/skge.c | |||
@@ -205,9 +205,6 @@ static int skge_get_settings(struct net_device *dev, | |||
205 | if (hw->chip_id == CHIP_ID_YUKON) | 205 | if (hw->chip_id == CHIP_ID_YUKON) |
206 | ecmd->supported &= ~SUPPORTED_1000baseT_Half; | 206 | ecmd->supported &= ~SUPPORTED_1000baseT_Half; |
207 | 207 | ||
208 | else if (hw->chip_id == CHIP_ID_YUKON_FE) | ||
209 | ecmd->supported &= ~(SUPPORTED_1000baseT_Half | ||
210 | | SUPPORTED_1000baseT_Full); | ||
211 | } | 208 | } |
212 | 209 | ||
213 | ecmd->port = PORT_TP; | 210 | ecmd->port = PORT_TP; |
@@ -248,9 +245,6 @@ static u32 skge_modes(const struct skge_hw *hw) | |||
248 | modes &= ~ADVERTISED_1000baseT_Half; | 245 | modes &= ~ADVERTISED_1000baseT_Half; |
249 | break; | 246 | break; |
250 | 247 | ||
251 | case CHIP_ID_YUKON_FE: | ||
252 | modes &= ~(ADVERTISED_1000baseT_Half|ADVERTISED_1000baseT_Full); | ||
253 | break; | ||
254 | } | 248 | } |
255 | } else { | 249 | } else { |
256 | modes |= ADVERTISED_FIBRE; | 250 | modes |= ADVERTISED_FIBRE; |
@@ -270,8 +264,6 @@ static int skge_set_settings(struct net_device *dev, struct ethtool_cmd *ecmd) | |||
270 | } else { | 264 | } else { |
271 | switch (ecmd->speed) { | 265 | switch (ecmd->speed) { |
272 | case SPEED_1000: | 266 | case SPEED_1000: |
273 | if (hw->chip_id == CHIP_ID_YUKON_FE) | ||
274 | return -EINVAL; | ||
275 | break; | 267 | break; |
276 | case SPEED_100: | 268 | case SPEED_100: |
277 | case SPEED_10: | 269 | case SPEED_10: |
@@ -540,8 +532,6 @@ static inline u32 hwkhz(const struct skge_hw *hw) | |||
540 | { | 532 | { |
541 | if (hw->chip_id == CHIP_ID_GENESIS) | 533 | if (hw->chip_id == CHIP_ID_GENESIS) |
542 | return 53215; /* or: 53.125 MHz */ | 534 | return 53215; /* or: 53.125 MHz */ |
543 | else if (hw->chip_id == CHIP_ID_YUKON_EC) | ||
544 | return 125000; /* or: 125.000 MHz */ | ||
545 | else | 535 | else |
546 | return 78215; /* or: 78.125 MHz */ | 536 | return 78215; /* or: 78.125 MHz */ |
547 | } | 537 | } |
@@ -1598,11 +1588,7 @@ static void yukon_init(struct skge_hw *hw, int port) | |||
1598 | PHY_M_EC_MAC_S_MSK); | 1588 | PHY_M_EC_MAC_S_MSK); |
1599 | ectrl |= PHY_M_EC_MAC_S(MAC_TX_CLK_25_MHZ); | 1589 | ectrl |= PHY_M_EC_MAC_S(MAC_TX_CLK_25_MHZ); |
1600 | 1590 | ||
1601 | /* on PHY 88E1111 there is a change for downshift control */ | 1591 | ectrl |= PHY_M_EC_M_DSC(0) | PHY_M_EC_S_DSC(1); |
1602 | if (hw->chip_id == CHIP_ID_YUKON_EC) | ||
1603 | ectrl |= PHY_M_EC_M_DSC_2(0) | PHY_M_EC_DOWN_S_ENA; | ||
1604 | else | ||
1605 | ectrl |= PHY_M_EC_M_DSC(0) | PHY_M_EC_S_DSC(1); | ||
1606 | 1592 | ||
1607 | gm_phy_write(hw, port, PHY_MARV_EXT_CTRL, ectrl); | 1593 | gm_phy_write(hw, port, PHY_MARV_EXT_CTRL, ectrl); |
1608 | } | 1594 | } |
@@ -1688,8 +1674,7 @@ static void yukon_init(struct skge_hw *hw, int port) | |||
1688 | ctrl |= PHY_CT_RESET; | 1674 | ctrl |= PHY_CT_RESET; |
1689 | } | 1675 | } |
1690 | 1676 | ||
1691 | if (hw->chip_id != CHIP_ID_YUKON_FE) | 1677 | gm_phy_write(hw, port, PHY_MARV_1000T_CTRL, ct1000); |
1692 | gm_phy_write(hw, port, PHY_MARV_1000T_CTRL, ct1000); | ||
1693 | 1678 | ||
1694 | gm_phy_write(hw, port, PHY_MARV_AUNE_ADV, adv); | 1679 | gm_phy_write(hw, port, PHY_MARV_AUNE_ADV, adv); |
1695 | gm_phy_write(hw, port, PHY_MARV_CTRL, ctrl); | 1680 | gm_phy_write(hw, port, PHY_MARV_CTRL, ctrl); |
@@ -1698,22 +1683,10 @@ static void yukon_init(struct skge_hw *hw, int port) | |||
1698 | ledctrl = PHY_M_LED_PULS_DUR(PULS_170MS); | 1683 | ledctrl = PHY_M_LED_PULS_DUR(PULS_170MS); |
1699 | ledover = 0; | 1684 | ledover = 0; |
1700 | 1685 | ||
1701 | if (hw->chip_id == CHIP_ID_YUKON_FE) { | 1686 | ledctrl |= PHY_M_LED_BLINK_RT(BLINK_84MS) | PHY_M_LEDC_TX_CTRL; |
1702 | /* on 88E3082 these bits are at 11..9 (shifted left) */ | ||
1703 | ledctrl |= PHY_M_LED_BLINK_RT(BLINK_84MS) << 1; | ||
1704 | 1687 | ||
1705 | gm_phy_write(hw, port, PHY_MARV_FE_LED_PAR, | 1688 | /* turn off the Rx LED (LED_RX) */ |
1706 | ((gm_phy_read(hw, port, PHY_MARV_FE_LED_PAR) | 1689 | ledover |= PHY_M_LED_MO_RX(MO_LED_OFF); |
1707 | |||
1708 | & ~PHY_M_FELP_LED1_MSK) | ||
1709 | | PHY_M_FELP_LED1_CTRL(LED_PAR_CTRL_ACT_BL))); | ||
1710 | } else { | ||
1711 | /* set Tx LED (LED_TX) to blink mode on Rx OR Tx activity */ | ||
1712 | ledctrl |= PHY_M_LED_BLINK_RT(BLINK_84MS) | PHY_M_LEDC_TX_CTRL; | ||
1713 | |||
1714 | /* turn off the Rx LED (LED_RX) */ | ||
1715 | ledover |= PHY_M_LED_MO_RX(MO_LED_OFF); | ||
1716 | } | ||
1717 | 1690 | ||
1718 | /* disable blink mode (LED_DUPLEX) on collisions */ | 1691 | /* disable blink mode (LED_DUPLEX) on collisions */ |
1719 | ctrl |= PHY_M_LEDC_DP_CTRL; | 1692 | ctrl |= PHY_M_LEDC_DP_CTRL; |
@@ -1928,9 +1901,6 @@ static void yukon_mac_intr(struct skge_hw *hw, int port) | |||
1928 | 1901 | ||
1929 | static u16 yukon_speed(const struct skge_hw *hw, u16 aux) | 1902 | static u16 yukon_speed(const struct skge_hw *hw, u16 aux) |
1930 | { | 1903 | { |
1931 | if (hw->chip_id == CHIP_ID_YUKON_FE) | ||
1932 | return (aux & PHY_M_PS_SPEED_100) ? SPEED_100 : SPEED_10; | ||
1933 | |||
1934 | switch (aux & PHY_M_PS_SPEED_MSK) { | 1904 | switch (aux & PHY_M_PS_SPEED_MSK) { |
1935 | case PHY_M_PS_SPEED_1000: | 1905 | case PHY_M_PS_SPEED_1000: |
1936 | return SPEED_1000; | 1906 | return SPEED_1000; |
@@ -1975,8 +1945,7 @@ static void yukon_link_down(struct skge_port *skge) | |||
1975 | gm_phy_read(hw, port, GM_GP_CTRL) | 1945 | gm_phy_read(hw, port, GM_GP_CTRL) |
1976 | & ~(GM_GPCR_RX_ENA | GM_GPCR_TX_ENA)); | 1946 | & ~(GM_GPCR_RX_ENA | GM_GPCR_TX_ENA)); |
1977 | 1947 | ||
1978 | if (hw->chip_id != CHIP_ID_YUKON_FE && | 1948 | if (skge->flow_control == FLOW_MODE_REM_SEND) { |
1979 | skge->flow_control == FLOW_MODE_REM_SEND) { | ||
1980 | /* restore Asymmetric Pause bit */ | 1949 | /* restore Asymmetric Pause bit */ |
1981 | gm_phy_write(hw, port, PHY_MARV_AUNE_ADV, | 1950 | gm_phy_write(hw, port, PHY_MARV_AUNE_ADV, |
1982 | gm_phy_read(hw, port, | 1951 | gm_phy_read(hw, port, |
@@ -2009,9 +1978,7 @@ static void yukon_phy_intr(struct skge_port *skge) | |||
2009 | goto failed; | 1978 | goto failed; |
2010 | } | 1979 | } |
2011 | 1980 | ||
2012 | if (!(hw->chip_id == CHIP_ID_YUKON_FE || hw->chip_id == CHIP_ID_YUKON_EC) | 1981 | if (gm_phy_read(hw, port, PHY_MARV_1000T_STAT) & PHY_B_1000S_MSF) { |
2013 | && (gm_phy_read(hw, port, PHY_MARV_1000T_STAT) | ||
2014 | & PHY_B_1000S_MSF)) { | ||
2015 | reason = "master/slave fault"; | 1982 | reason = "master/slave fault"; |
2016 | goto failed; | 1983 | goto failed; |
2017 | } | 1984 | } |
@@ -2025,10 +1992,6 @@ static void yukon_phy_intr(struct skge_port *skge) | |||
2025 | ? DUPLEX_FULL : DUPLEX_HALF; | 1992 | ? DUPLEX_FULL : DUPLEX_HALF; |
2026 | skge->speed = yukon_speed(hw, phystat); | 1993 | skge->speed = yukon_speed(hw, phystat); |
2027 | 1994 | ||
2028 | /* Tx & Rx Pause Enabled bits are at 9..8 */ | ||
2029 | if (hw->chip_id == CHIP_ID_YUKON_XL) | ||
2030 | phystat >>= 6; | ||
2031 | |||
2032 | /* We are using IEEE 802.3z/D5.0 Table 37-4 */ | 1995 | /* We are using IEEE 802.3z/D5.0 Table 37-4 */ |
2033 | switch (phystat & PHY_M_PS_PAUSE_MSK) { | 1996 | switch (phystat & PHY_M_PS_PAUSE_MSK) { |
2034 | case PHY_M_PS_PAUSE_MSK: | 1997 | case PHY_M_PS_PAUSE_MSK: |
@@ -2875,9 +2838,6 @@ static const struct { | |||
2875 | { CHIP_ID_YUKON, "Yukon" }, | 2838 | { CHIP_ID_YUKON, "Yukon" }, |
2876 | { CHIP_ID_YUKON_LITE, "Yukon-Lite"}, | 2839 | { CHIP_ID_YUKON_LITE, "Yukon-Lite"}, |
2877 | { CHIP_ID_YUKON_LP, "Yukon-LP"}, | 2840 | { CHIP_ID_YUKON_LP, "Yukon-LP"}, |
2878 | { CHIP_ID_YUKON_XL, "Yukon-2 XL"}, | ||
2879 | { CHIP_ID_YUKON_EC, "YUKON-2 EC"}, | ||
2880 | { CHIP_ID_YUKON_FE, "YUKON-2 FE"}, | ||
2881 | }; | 2841 | }; |
2882 | 2842 | ||
2883 | static const char *skge_board_name(const struct skge_hw *hw) | 2843 | static const char *skge_board_name(const struct skge_hw *hw) |